git: ee776a8e291c - main - pci: Permit function-level reset of 82599 VFs

The branch main has been updated by kbowling:

URL: https://cgit.FreeBSD.org/src/commit/?id=ee776a8e291cb73845a8611d3dec5a2a966106b9

commit ee776a8e291cb73845a8611d3dec5a2a966106b9
Author:     Kevin Bowling <kbowling@FreeBSD.org>
AuthorDate: 2026-08-06 06:38:06 +0000
Commit:     Kevin Bowling <kbowling@FreeBSD.org>
CommitDate: 2026-08-07 06:24:46 +0000

    pci: Permit function-level reset of 82599 VFs
    
    Intel 82599 supports FLR on VFs but reports FLR support only in the PF
    Device Capabilities register.  The VF register therefore leaves the FLR
    Capable bit clear, and pcie_flr() rejects the reset.
    
    Intel documents the zeroed VF PCIe capability structure as erratum 35
    in the 82599 Specification Update (B0=Yes; NoFix).
    
    Add a positive FLR quirk for the 82599 VF.  Keep the capability check
    for every other function, so an unknown nonconforming VF cannot make
    pcie_flr() report success when its reset request was ignored.
    
    SR-IOV requires VFs to support FLR, but a clear capability bit cannot
    distinguish the 82599's misadvertisement from a VF that fails to
    implement it.
    
    MFC after:      1 week
---
 sys/dev/pci/pci.c | 14 +++++++++++---
 1 file changed, 11 insertions(+), 3 deletions(-)

diff --git a/sys/dev/pci/pci.c b/sys/dev/pci/pci.c
index 4663fe043073..749ee71b195f 100644
--- a/sys/dev/pci/pci.c
+++ b/sys/dev/pci/pci.c
@@ -241,6 +241,7 @@ struct pci_quirk {
 #define	PCI_QUIRK_MSI_INTX_BUG	6 /* PCIM_CMD_INTxDIS disables MSI */
 #define	PCI_QUIRK_REALLOC_BAR	7 /* Can't allocate memory at the default address */
 #define	PCI_QUIRK_DISABLE_FLR	8 /* Function-Level Reset (FLR) not working. */
+#define	PCI_QUIRK_ENABLE_FLR	9 /* FLR works but is not advertised. */
 	int	arg1;
 	int	arg2;
 };
@@ -321,6 +322,12 @@ static const struct pci_quirk pci_quirks[] = {
 	 */
 	{ 0x98741002, PCI_QUIRK_REALLOC_BAR,	0, 	0 },
 
+	/*
+	 * The Intel 82599 VF implements FLR without advertising it; see
+	 * 82599 Specification Update, erratum 35.
+	 */
+	{ 0x10ed8086, PCI_QUIRK_ENABLE_FLR,	0,	0 },
+
 	/*
 	 * With some MediaTek mt76 WiFi FLR does not work despite advertised.
 	 */
@@ -7061,8 +7068,8 @@ pcie_apei_error(device_t dev, int sev, uint8_t *aerp)
  * still pending, the function will return false without attempting a
  * reset.
  *
- * If dev is not a PCI-express function or does not support FLR, this
- * function returns false.
+ * If dev is not a PCI-express function, or neither advertises FLR nor
+ * has a quirk enabling FLR, this function returns false.
  *
  * Note that no registers are saved or restored.  The caller is
  * responsible for saving and restoring any registers including
@@ -7081,7 +7088,8 @@ pcie_flr(device_t dev, u_int max_delay, bool force)
 	if (cap == 0)
 		return (false);
 
-	if (!(pci_read_config(dev, cap + PCIER_DEVICE_CAP, 4) & PCIEM_CAP_FLR))
+	if (!(pci_read_config(dev, cap + PCIER_DEVICE_CAP, 4) & PCIEM_CAP_FLR) &&
+	    !pci_has_quirk(pci_get_devid(dev), PCI_QUIRK_ENABLE_FLR))
 		return (false);
 	if (pci_has_quirk(pci_get_devid(dev), PCI_QUIRK_DISABLE_FLR))
 		return (false);