git: 319a1dbcf46f - main - intr/powerpc: cleanup extraneous spaces in PowerMAC CPC HT driver

The branch main has been updated by jhibbits:

URL: https://cgit.FreeBSD.org/src/commit/?id=319a1dbcf46f4afd2d32234d6936bb9e9e006a74

commit 319a1dbcf46f4afd2d32234d6936bb9e9e006a74
Author:     Elliott Mitchell <ehem+freebsd@m5p.com>
AuthorDate: 2025-01-10 00:52:52 +0000
Commit:     Justin Hibbits <jhibbits@FreeBSD.org>
CommitDate: 2025-10-30 01:01:00 +0000

    intr/powerpc: cleanup extraneous spaces in PowerMAC CPC HT driver
    
    Spotted while examing this driver.  Remove some end of line spaces/tabs.
    Replace some spaces which should instead be tabs.
    
    Reviewed by:    jhibbits
    MFC after:      2 weeks
---
 sys/powerpc/powermac/cpcht.c | 20 ++++++++++----------
 1 file changed, 10 insertions(+), 10 deletions(-)

diff --git a/sys/powerpc/powermac/cpcht.c b/sys/powerpc/powermac/cpcht.c
index 138aefda5cdb..5b5c03cf83f6 100644
--- a/sys/powerpc/powermac/cpcht.c
+++ b/sys/powerpc/powermac/cpcht.c
@@ -113,7 +113,7 @@ static device_method_t	cpcht_methods[] = {
 struct cpcht_irq {
 	enum {
 	    IRQ_NONE, IRQ_HT, IRQ_MSI, IRQ_INTERNAL
-	}		irq_type; 
+	}		irq_type;
 
 	int		ht_source;
 
@@ -287,7 +287,7 @@ cpcht_configure_htbridge(device_t dev, phandle_t child)
 
 			sc->htirq_map[irq].irq_type = IRQ_HT;
 			sc->htirq_map[irq].ht_source = i;
-			sc->htirq_map[irq].ht_base = sc->sc_data + 
+			sc->htirq_map[irq].ht_base = sc->sc_data +
 			    (((((s & 0x1f) << 3) | (f & 0x07)) << 8) | (ptr));
 
 			PCIB_WRITE_CONFIG(dev, b, s, f,
@@ -298,13 +298,13 @@ cpcht_configure_htbridge(device_t dev, phandle_t child)
 
 			/*
 			 * Apple uses a non-compliant IO/APIC that differs
-			 * in how we signal EOIs. Check if this device was 
+			 * in how we signal EOIs. Check if this device was
 			 * made by Apple, and act accordingly.
 			 */
 			vend = PCIB_READ_CONFIG(dev, b, s, f,
 			    PCIR_DEVVENDOR, 4);
 			if ((vend & 0xffff) == 0x106b)
-				sc->htirq_map[irq].apple_eoi = 
+				sc->htirq_map[irq].apple_eoi =
 				 (sc->htirq_map[irq].ht_base - ptr) + 0x60;
 		}
 	}
@@ -318,7 +318,7 @@ cpcht_read_config(device_t dev, u_int bus, u_int slot, u_int func, u_int reg,
 	vm_offset_t	caoff;
 
 	sc = device_get_softc(dev);
-	caoff = sc->sc_data + 
+	caoff = sc->sc_data +
 		(((((slot & 0x1f) << 3) | (func & 0x07)) << 8) | reg);
 
 	if (bus == 0 && (!(sc->sc_populated_slots & (1 << slot)) || func > 0))
@@ -350,7 +350,7 @@ cpcht_write_config(device_t dev, u_int bus, u_int slot, u_int func,
 	vm_offset_t	caoff;
 
 	sc = device_get_softc(dev);
-	caoff = sc->sc_data + 
+	caoff = sc->sc_data +
 		(((((slot & 0x1f) << 3) | (func & 0x07)) << 8) | reg);
 
 	if (bus == 0 && (!(sc->sc_populated_slots & (1 << slot)) || func > 0))
@@ -553,7 +553,7 @@ openpic_cpcht_probe(device_t dev)
 	const char *type = ofw_bus_get_type(dev);
 
 	if (strcmp(type, "open-pic") != 0)
-                return (ENXIO);
+		return (ENXIO);
 
 	device_set_desc(dev, OPENPIC_DEVSTR);
 	return (0);
@@ -582,7 +582,7 @@ openpic_cpcht_attach(device_t dev)
 	 * Interrupts 0-3 are internally sourced and are level triggered
 	 * active low. Interrupts 4-123 are connected to a pulse generator
 	 * and should be programmed as edge triggered low-to-high.
-	 * 
+	 *
 	 * IBM CPC945 Manual, Section 9.3.
 	 */
 
@@ -631,7 +631,7 @@ openpic_cpcht_config(device_t dev, u_int irq, enum intr_trigger trig,
 
 		/* Mask the IRQ while we fiddle settings */
 		out32rb(cpcht_irqmap[irq].ht_base + 4, ht_irq | HTAPIC_MASK);
-		
+
 		/* Program the interrupt sense */
 		ht_irq &= ~(HTAPIC_TRIGGER_LEVEL | HTAPIC_REQUEST_EOI);
 		if (trig == INTR_TRIGGER_EDGE) {
@@ -671,7 +671,7 @@ openpic_cpcht_enable(device_t dev, u_int irq, u_int vec, void **priv)
 
 		mtx_unlock_spin(&sc->sc_ht_mtx);
 	}
-		
+
 	openpic_cpcht_eoi(dev, irq, *priv);
 }