git: 0b521e322c32 - main - arm: Switch the timer to the new sys handler

The branch main has been updated by andrew:

URL: https://cgit.FreeBSD.org/src/commit/?id=0b521e322c32a16e1ae91d88d9e5ea32775af110

commit 0b521e322c32a16e1ae91d88d9e5ea32775af110
Author:     Andrew Turner <andrew@FreeBSD.org>
AuthorDate: 2025-05-12 11:06:53 +0000
Commit:     Andrew Turner <andrew@FreeBSD.org>
CommitDate: 2025-05-12 11:06:53 +0000

    arm: Switch the timer to the new sys handler
    
    Use the new sys handling to implement the trapped cntpct_el0 support.
    
    Reviewed by:    harry.moulton_arm.com
    Sponsored by:   Arm Ltd
    Differential Revision:  https://reviews.freebsd.org/D50209
---
 sys/arm/arm/generic_timer.c | 22 ++++++++++++----------
 sys/arm64/include/armreg.h  |  1 +
 2 files changed, 13 insertions(+), 10 deletions(-)

diff --git a/sys/arm/arm/generic_timer.c b/sys/arm/arm/generic_timer.c
index a82f8756b806..a8c779dcba6d 100644
--- a/sys/arm/arm/generic_timer.c
+++ b/sys/arm/arm/generic_timer.c
@@ -289,20 +289,22 @@ setup_user_access(void *arg __unused)
 }
 
 #ifdef __aarch64__
-static int
-cntpct_handler(vm_offset_t va, uint32_t insn, struct trapframe *frame,
-    uint32_t esr)
+static bool
+cntpct_handler(uint64_t esr, struct trapframe *frame)
 {
 	uint64_t val;
 	int reg;
 
-	if ((insn & MRS_MASK) != MRS_VALUE)
-		return (0);
+	if (ESR_ELx_EXCEPTION(esr) != EXCP_MSR)
+		return (false);
 
-	if (MRS_SPECIAL(insn) != MRS_SPECIAL(CNTPCT_EL0))
-		return (0);
+	if ((esr & ISS_MSR_DIR) == 0)
+		return (false);
+
+	if ((esr & ISS_MSR_REG_MASK) != CNTPCT_EL0_ISS)
+		return (false);
 
-	reg = MRS_REGISTER(insn);
+	reg = ISS_MSR_Rt(esr);
 	val = READ_SPECIALREG(cntvct_el0);
 	if (reg < nitems(frame->tf_x)) {
 		frame->tf_x[reg] = val;
@@ -316,7 +318,7 @@ cntpct_handler(vm_offset_t va, uint32_t insn, struct trapframe *frame,
 	 */
 	frame->tf_elr += INSN_SIZE;
 
-	return (1);
+	return (true);
 }
 #endif
 
@@ -332,7 +334,7 @@ tmr_setup_user_access(void *arg __unused)
 #ifdef __aarch64__
 		if (TUNABLE_INT_FETCH("hw.emulate_phys_counter", &emulate) &&
 		    emulate != 0) {
-			install_undef_handler(cntpct_handler);
+			install_sys_handler(cntpct_handler);
 		}
 #endif
 	}
diff --git a/sys/arm64/include/armreg.h b/sys/arm64/include/armreg.h
index aff33055a51d..8691e4b89649 100644
--- a/sys/arm64/include/armreg.h
+++ b/sys/arm64/include/armreg.h
@@ -278,6 +278,7 @@
 
 /* CNTPCT_EL0 - Counter-timer Physical Count register */
 #define	CNTPCT_EL0		MRS_REG(CNTPCT_EL0)
+#define	CNTPCT_EL0_ISS		ISS_MSR_REG(CNTPCT_EL0)
 #define	CNTPCT_EL0_op0		3
 #define	CNTPCT_EL0_op1		3
 #define	CNTPCT_EL0_CRn		14