git: 4b6308416e3e - main - arm64: Allow building the MSR ISS from raw values

The branch main has been updated by andrew:

URL: https://cgit.FreeBSD.org/src/commit/?id=4b6308416e3e710448a636a9702c27e3a3f70c6e

commit 4b6308416e3e710448a636a9702c27e3a3f70c6e
Author:     Andrew Turner <andrew@FreeBSD.org>
AuthorDate: 2025-05-12 11:06:17 +0000
Commit:     Andrew Turner <andrew@FreeBSD.org>
CommitDate: 2025-05-12 11:06:17 +0000

    arm64: Allow building the MSR ISS from raw values
    
    This will be used in improved MSR/MRS instruction handling from
    userspace.
    
    Reviewed by:    harry.moulton_arm.com
    Sponsored by:   Arm Ltd
    Differential Revision:  https://reviews.freebsd.org/D50206
---
 sys/arm64/include/armreg.h | 12 +++++++-----
 1 file changed, 7 insertions(+), 5 deletions(-)

diff --git a/sys/arm64/include/armreg.h b/sys/arm64/include/armreg.h
index a72e1ea99793..0e89ad57440f 100644
--- a/sys/arm64/include/armreg.h
+++ b/sys/arm64/include/armreg.h
@@ -604,12 +604,14 @@
 #define	 ISS_MSR_REG_MASK	\
     (ISS_MSR_OP0_MASK | ISS_MSR_OP2_MASK | ISS_MSR_OP1_MASK | 	\
      ISS_MSR_CRn_MASK | ISS_MSR_CRm_MASK)
+#define	 __ISS_MSR_REG(op0, op1, crn, crm, op2)		\
+    (((op0) << ISS_MSR_OP0_SHIFT) |			\
+     ((op1) << ISS_MSR_OP1_SHIFT) |			\
+     ((crn) << ISS_MSR_CRn_SHIFT) |			\
+     ((crm) << ISS_MSR_CRm_SHIFT) |			\
+     ((op2) << ISS_MSR_OP2_SHIFT))
 #define	 ISS_MSR_REG(reg)				\
-    (((reg ## _op0) << ISS_MSR_OP0_SHIFT) |		\
-     ((reg ## _op1) << ISS_MSR_OP1_SHIFT) |		\
-     ((reg ## _CRn) << ISS_MSR_CRn_SHIFT) |		\
-     ((reg ## _CRm) << ISS_MSR_CRm_SHIFT) |		\
-     ((reg ## _op2) << ISS_MSR_OP2_SHIFT))
+    __ISS_MSR_REG(reg##_op0, reg##_op1, reg##_CRn, reg##_CRm, reg##_op2)
 
 #define	 ISS_DATA_ISV_SHIFT	24
 #define	 ISS_DATA_ISV		(0x01 << ISS_DATA_ISV_SHIFT)