git: efedac28c7ce - main - ig4(4): Add several PCI IDs for Intel Jasper Lake controllers
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Date: Thu, 08 May 2025 08:51:53 UTC
The branch main has been updated by dumbbell:
URL: https://cgit.FreeBSD.org/src/commit/?id=efedac28c7ce4bef9d9b09b7901f1cb35babc2c4
commit efedac28c7ce4bef9d9b09b7901f1cb35babc2c4
Author: Jean-Sébastien Pédron <dumbbell@FreeBSD.org>
AuthorDate: 2025-04-17 10:02:15 +0000
Commit: Jean-Sébastien Pédron <dumbbell@FreeBSD.org>
CommitDate: 2025-05-08 08:50:17 +0000
ig4(4): Add several PCI IDs for Intel Jasper Lake controllers
The first added ID was found in a Asus E510KA laptop by the reporter.
They tested the patch successfully: with that patch, the Elantech
touchpad was properly detected and worked fine.
Other PCI IDs were not tested but they are from the same family.
Reported by: Lukas Friedrich
Tested by: Lukas Friedrich
Reviewed by: wulf
MFC after: 3 days
Differential Revision: https://reviews.freebsd.org/D49879
---
sys/dev/ichiic/ig4_pci.c | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/sys/dev/ichiic/ig4_pci.c b/sys/dev/ichiic/ig4_pci.c
index 4674f2615648..0195466150eb 100644
--- a/sys/dev/ichiic/ig4_pci.c
+++ b/sys/dev/ichiic/ig4_pci.c
@@ -148,6 +148,12 @@ static int ig4iic_pci_detach(device_t dev);
#define PCI_CHIP_GEMINILAKE_I2C_5 0x31b68086
#define PCI_CHIP_GEMINILAKE_I2C_6 0x31b88086
#define PCI_CHIP_GEMINILAKE_I2C_7 0x31ba8086
+#define PCI_CHIP_JASPERLAKE_I2C_0 0x4de88086
+#define PCI_CHIP_JASPERLAKE_I2C_1 0x4de98086
+#define PCI_CHIP_JASPERLAKE_I2C_2 0x4dea8086
+#define PCI_CHIP_JASPERLAKE_I2C_3 0x4deb8086
+#define PCI_CHIP_JASPERLAKE_I2C_4 0x4dc58086
+#define PCI_CHIP_JASPERLAKE_I2C_5 0x4dc68086
#define PCI_CHIP_ALDERLAKE_P_I2C_0 0x51e88086
#define PCI_CHIP_ALDERLAKE_P_I2C_1 0x51e98086
#define PCI_CHIP_ALDERLAKE_P_I2C_2 0x51ea8086
@@ -272,6 +278,12 @@ static struct ig4iic_pci_device ig4iic_pci_devices[] = {
{ PCI_CHIP_GEMINILAKE_I2C_5, "Intel Gemini Lake I2C Controller-5", IG4_GEMINILAKE},
{ PCI_CHIP_GEMINILAKE_I2C_6, "Intel Gemini Lake I2C Controller-6", IG4_GEMINILAKE},
{ PCI_CHIP_GEMINILAKE_I2C_7, "Intel Gemini Lake I2C Controller-7", IG4_GEMINILAKE},
+ { PCI_CHIP_JASPERLAKE_I2C_0, "Intel Jasper Lake I2C Controller-0", IG4_TIGERLAKE},
+ { PCI_CHIP_JASPERLAKE_I2C_1, "Intel Jasper Lake I2C Controller-1", IG4_TIGERLAKE},
+ { PCI_CHIP_JASPERLAKE_I2C_2, "Intel Jasper Lake I2C Controller-2", IG4_TIGERLAKE},
+ { PCI_CHIP_JASPERLAKE_I2C_3, "Intel Jasper Lake I2C Controller-3", IG4_TIGERLAKE},
+ { PCI_CHIP_JASPERLAKE_I2C_4, "Intel Jasper Lake I2C Controller-4", IG4_TIGERLAKE},
+ { PCI_CHIP_JASPERLAKE_I2C_5, "Intel Jasper Lake I2C Controller-5", IG4_TIGERLAKE},
{ PCI_CHIP_ALDERLAKE_P_I2C_0, "Intel Alder Lake-P I2C Controller-0", IG4_TIGERLAKE},
{ PCI_CHIP_ALDERLAKE_P_I2C_1, "Intel Alder Lake-P I2C Controller-1", IG4_TIGERLAKE},
{ PCI_CHIP_ALDERLAKE_P_I2C_2, "Intel Alder Lake-P I2C Controller-2", IG4_TIGERLAKE},