git: 118bfc9f53ac - main - arm64: Fix the sign in ID registers

The branch main has been updated by andrew:

URL: https://cgit.FreeBSD.org/src/commit/?id=118bfc9f53ac9abfc58078195b35e293bbfb8136

commit 118bfc9f53ac9abfc58078195b35e293bbfb8136
Author:     Andrew Turner <andrew@FreeBSD.org>
AuthorDate: 2025-07-30 10:51:20 +0000
Commit:     Andrew Turner <andrew@FreeBSD.org>
CommitDate: 2025-07-30 12:46:22 +0000

    arm64: Fix the sign in ID registers
    
    Some ID registers use 0b0000 to indicate a feature is enabled, and
    0b1111 to indicate it's not. In these cases we need to tell the kernel
    to treat the value as a signed field.
    
    Set the signed flag in fields we decode that should be signed.
    
    Sponsored by:   Arm Ltd
    Differential Revision:  https://reviews.freebsd.org/D51369
---
 sys/arm64/arm64/identcpu.c | 11 ++++++-----
 1 file changed, 6 insertions(+), 5 deletions(-)

diff --git a/sys/arm64/arm64/identcpu.c b/sys/arm64/arm64/identcpu.c
index 49b4b25b51bb..55f7e98a1b1b 100644
--- a/sys/arm64/arm64/identcpu.c
+++ b/sys/arm64/arm64/identcpu.c
@@ -618,7 +618,7 @@ static const struct mrs_field id_aa64dfr0_fields[] = {
 	    id_aa64dfr0_tracebuffer),
 	MRS_FIELD(ID_AA64DFR0, TraceFilt, false, MRS_LOWER, 0,
 	    id_aa64dfr0_tracefilt),
-	MRS_FIELD(ID_AA64DFR0, DoubleLock, false, MRS_LOWER, 0,
+	MRS_FIELD(ID_AA64DFR0, DoubleLock, true, MRS_LOWER, 0,
 	    id_aa64dfr0_doublelock),
 	MRS_FIELD(ID_AA64DFR0, PMSVer, false, MRS_LOWER, 0, id_aa64dfr0_pmsver),
 	MRS_FIELD(ID_AA64DFR0, CTX_CMPs, false, MRS_LOWER, 0,
@@ -628,7 +628,7 @@ static const struct mrs_field id_aa64dfr0_fields[] = {
 	MRS_FIELD(ID_AA64DFR0, PMSS, false, MRS_LOWER, 0, id_aa64dfr0_pmss),
 	MRS_FIELD(ID_AA64DFR0, BRPs, false, MRS_LOWER, MRS_USERSPACE,
 	    id_aa64dfr0_brps),
-	MRS_FIELD(ID_AA64DFR0, PMUVer, false, MRS_LOWER, 0, id_aa64dfr0_pmuver),
+	MRS_FIELD(ID_AA64DFR0, PMUVer, true, MRS_LOWER, 0, id_aa64dfr0_pmuver),
 	MRS_FIELD(ID_AA64DFR0, TraceVer, false, MRS_LOWER, 0,
 	    id_aa64dfr0_tracever),
 	MRS_FIELD(ID_AA64DFR0, DebugVer, false, MRS_LOWER | MRS_SAFE(0x6), 0,
@@ -1259,9 +1259,9 @@ static const struct mrs_field id_aa64mmfr0_fields[] = {
 	    id_aa64mmfr0_tgran64_2),
 	MRS_FIELD(ID_AA64MMFR0, TGran16_2, false, MRS_LOWER, 0,
 	    id_aa64mmfr0_tgran16_2),
-	MRS_FIELD(ID_AA64MMFR0, TGran4, false, MRS_LOWER, 0,
+	MRS_FIELD(ID_AA64MMFR0, TGran4, true, MRS_LOWER, 0,
 	    id_aa64mmfr0_tgran4),
-	MRS_FIELD(ID_AA64MMFR0, TGran64, false, MRS_LOWER, 0,
+	MRS_FIELD(ID_AA64MMFR0, TGran64, true, MRS_LOWER, 0,
 	    id_aa64mmfr0_tgran64),
 	MRS_FIELD(ID_AA64MMFR0, TGran16, false, MRS_LOWER, 0,
 	    id_aa64mmfr0_tgran16),
@@ -1856,7 +1856,8 @@ static const struct mrs_field id_aa64pfr1_fields[] = {
 	MRS_FIELD(ID_AA64PFR1, DF2, false, MRS_LOWER, 0, id_aa64pfr1_df2),
 	MRS_FIELD(ID_AA64PFR1, MTEX, false, MRS_LOWER, 0, id_aa64pfr1_mtex),
 	MRS_FIELD(ID_AA64PFR1, THE, false, MRS_LOWER, 0, id_aa64pfr1_the),
-	MRS_FIELD(ID_AA64PFR1, MTE_frac, false, MRS_LOWER, 0, id_aa64pfr1_mtefrac),
+	MRS_FIELD(ID_AA64PFR1, MTE_frac, true, MRS_LOWER, 0,
+	    id_aa64pfr1_mtefrac),
 	MRS_FIELD(ID_AA64PFR1, NMI, false, MRS_LOWER, 0, id_aa64pfr1_nmi),
 	MRS_FIELD(ID_AA64PFR1, CSV2_frac, false, MRS_LOWER, 0,
 	    id_aa64pfr1_csv2_frac),