git: 45e161020c2d - stable/14 - bnxt_en: Add 5760X (Thor2) PCI IDs support
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Date: Sun, 27 Apr 2025 22:06:08 UTC
The branch stable/14 has been updated by imp:
URL: https://cgit.FreeBSD.org/src/commit/?id=45e161020c2da04edeeeebc72598af839e41d609
commit 45e161020c2da04edeeeebc72598af839e41d609
Author: Sreekanth Reddy <sreekanth.reddy@broadcom.com>
AuthorDate: 2025-04-09 06:01:31 +0000
Commit: Warner Losh <imp@FreeBSD.org>
CommitDate: 2025-04-27 22:02:58 +0000
bnxt_en: Add 5760X (Thor2) PCI IDs support
Add Thor2 PCI IDs.
Reviewed-by: Warner Losh <imp@FreeBSD.org>
Reviewed-by: Sumit Saxena <sumit.saxena@broadcom.com>
MFC-After: 3 days
Differential-Revision: https://reviews.freebsd.org/D49725
(cherry picked from commit 26bd37da01cff2b2024f3f63b9ca318bf3a01669)
---
sys/dev/bnxt/bnxt_en/bnxt.h | 12 +++++
sys/dev/bnxt/bnxt_en/bnxt_hwrm.c | 32 +++++++-----
sys/dev/bnxt/bnxt_en/bnxt_sysctl.c | 6 +--
sys/dev/bnxt/bnxt_en/bnxt_ulp.c | 2 +-
sys/dev/bnxt/bnxt_en/if_bnxt.c | 101 ++++++++++++++++++++++---------------
5 files changed, 93 insertions(+), 60 deletions(-)
diff --git a/sys/dev/bnxt/bnxt_en/bnxt.h b/sys/dev/bnxt/bnxt_en/bnxt.h
index b0c3a8913622..815fe68233c6 100644
--- a/sys/dev/bnxt/bnxt_en/bnxt.h
+++ b/sys/dev/bnxt/bnxt_en/bnxt.h
@@ -88,6 +88,10 @@
#define BCM57504 0x1751
#define BCM57504_NPAR 0x1801
#define BCM57502 0x1752
+#define BCM57608 0x1760
+#define BCM57604 0x1761
+#define BCM57602 0x1762
+#define BCM57601 0x1763
#define NETXTREME_C_VF1 0x16cb
#define NETXTREME_C_VF2 0x16e1
#define NETXTREME_C_VF3 0x16e5
@@ -225,6 +229,13 @@
/* Chip class phase 5 */
#define BNXT_CHIP_P5(sc) ((sc->flags & BNXT_FLAG_CHIP_P5))
+/* Chip class phase 7 */
+#define BNXT_CHIP_P7(sc) ((sc->flags & BNXT_FLAG_CHIP_P7))
+
+/* Chip class phase 5 plus */
+#define BNXT_CHIP_P5_PLUS(sc) \
+ (BNXT_CHIP_P5(sc) || BNXT_CHIP_P7(sc))
+
#define DB_PF_OFFSET_P5 0x10000
#define DB_VF_OFFSET_P5 0x4000
#define NQ_VALID(cmp, v_bit) \
@@ -1002,6 +1013,7 @@ struct bnxt_softc {
#define BNXT_FLAG_ROCEV1_CAP 0x0400
#define BNXT_FLAG_ROCEV2_CAP 0x0800
#define BNXT_FLAG_ROCE_CAP (BNXT_FLAG_ROCEV1_CAP | BNXT_FLAG_ROCEV2_CAP)
+#define BNXT_FLAG_CHIP_P7 0x1000
uint32_t flags;
#define BNXT_STATE_LINK_CHANGE (0)
#define BNXT_STATE_MAX (BNXT_STATE_LINK_CHANGE + 1)
diff --git a/sys/dev/bnxt/bnxt_en/bnxt_hwrm.c b/sys/dev/bnxt/bnxt_en/bnxt_hwrm.c
index 9252964900ff..b8336eda229e 100644
--- a/sys/dev/bnxt/bnxt_en/bnxt_hwrm.c
+++ b/sys/dev/bnxt/bnxt_en/bnxt_hwrm.c
@@ -691,7 +691,7 @@ int bnxt_hwrm_func_resc_qcaps(struct bnxt_softc *softc, bool all)
hw_resc->min_stat_ctxs = le16toh(resp->min_stat_ctx);
hw_resc->max_stat_ctxs = le16toh(resp->max_stat_ctx);
- if (BNXT_CHIP_P5(softc)) {
+ if (BNXT_CHIP_P5_PLUS(softc)) {
hw_resc->max_nqs = le16toh(resp->max_msix);
hw_resc->max_hw_ring_grps = hw_resc->max_rx_rings;
}
@@ -1087,7 +1087,7 @@ bnxt_hwrm_func_qcaps(struct bnxt_softc *softc)
softc->flags |= BNXT_FLAG_FW_CAP_EXT_STATS;
/* Enable RoCE only on Thor devices */
- if (BNXT_CHIP_P5(softc)) {
+ if (BNXT_CHIP_P5_PLUS(softc)) {
if (flags & HWRM_FUNC_QCAPS_OUTPUT_FLAGS_ROCE_V1_SUPPORTED)
softc->flags |= BNXT_FLAG_ROCEV1_CAP;
if (flags & HWRM_FUNC_QCAPS_OUTPUT_FLAGS_ROCE_V2_SUPPORTED)
@@ -1244,9 +1244,10 @@ bnxt_hwrm_func_qcfg(struct bnxt_softc *softc)
if (BNXT_CHIP_P5(softc)) {
if (BNXT_PF(softc))
- min_db_offset = DB_PF_OFFSET_P5;
+ min_db_offset = DB_PF_OFFSET_P5;
else
min_db_offset = DB_VF_OFFSET_P5;
+ softc->legacy_db_size = min_db_offset;
}
softc->db_size = roundup2(le16_to_cpu(resp->l2_doorbell_bar_size_kb) *
@@ -1420,7 +1421,7 @@ bnxt_hwrm_vnic_set_hds(struct bnxt_softc *softc, struct bnxt_vnic_info *vnic)
{
struct hwrm_vnic_plcmodes_cfg_input req = {0};
- if (!BNXT_CHIP_P5(softc))
+ if (!BNXT_CHIP_P5_PLUS(softc))
return 0;
bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_VNIC_PLCMODES_CFG);
@@ -1444,7 +1445,7 @@ bnxt_hwrm_vnic_cfg(struct bnxt_softc *softc, struct bnxt_vnic_info *vnic)
req.flags |= htole32(HWRM_VNIC_CFG_INPUT_FLAGS_BD_STALL_MODE);
if (vnic->flags & BNXT_VNIC_FLAG_VLAN_STRIP)
req.flags |= htole32(HWRM_VNIC_CFG_INPUT_FLAGS_VLAN_STRIP_MODE);
- if (BNXT_CHIP_P5 (softc)) {
+ if (BNXT_CHIP_P5_PLUS (softc)) {
req.default_rx_ring_id =
htole16(softc->rx_rings[0].phys_id);
req.default_cmpl_ring_id =
@@ -1584,7 +1585,7 @@ bnxt_hwrm_ring_grp_alloc(struct bnxt_softc *softc, struct bnxt_grp_info *grp)
return EDOOFUS;
}
- if (BNXT_CHIP_P5 (softc))
+ if (BNXT_CHIP_P5_PLUS (softc))
return 0;
resp = (void *)softc->hwrm_cmd_resp.idi_vaddr;
@@ -1615,7 +1616,7 @@ bnxt_hwrm_ring_grp_free(struct bnxt_softc *softc, struct bnxt_grp_info *grp)
if (grp->grp_id == (uint16_t)HWRM_NA_SIGNATURE)
return 0;
- if (BNXT_CHIP_P5 (softc))
+ if (BNXT_CHIP_P5_PLUS (softc))
return 0;
bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_RING_GRP_FREE);
@@ -1705,7 +1706,7 @@ bnxt_hwrm_ring_alloc(struct bnxt_softc *softc, uint8_t type,
HWRM_RING_ALLOC_INPUT_ENABLES_STAT_CTX_ID_VALID);
break;
case HWRM_RING_ALLOC_INPUT_RING_TYPE_RX:
- if (!BNXT_CHIP_P5(softc))
+ if (!BNXT_CHIP_P5_PLUS(softc))
break;
cp_ring = &softc->rx_cp_rings[idx];
@@ -1717,7 +1718,7 @@ bnxt_hwrm_ring_alloc(struct bnxt_softc *softc, uint8_t type,
HWRM_RING_ALLOC_INPUT_ENABLES_STAT_CTX_ID_VALID);
break;
case HWRM_RING_ALLOC_INPUT_RING_TYPE_RX_AGG:
- if (!BNXT_CHIP_P5(softc)) {
+ if (!BNXT_CHIP_P5_PLUS(softc)) {
req.ring_type = HWRM_RING_ALLOC_INPUT_RING_TYPE_RX;
break;
}
@@ -1733,7 +1734,7 @@ bnxt_hwrm_ring_alloc(struct bnxt_softc *softc, uint8_t type,
HWRM_RING_ALLOC_INPUT_ENABLES_STAT_CTX_ID_VALID);
break;
case HWRM_RING_ALLOC_INPUT_RING_TYPE_L2_CMPL:
- if (!BNXT_CHIP_P5(softc)) {
+ if (!BNXT_CHIP_P5_PLUS(softc)) {
req.int_mode = HWRM_RING_ALLOC_INPUT_INT_MODE_MSIX;
break;
}
@@ -1807,7 +1808,7 @@ bnxt_hwrm_stat_ctx_alloc(struct bnxt_softc *softc, struct bnxt_cp_ring *cpr,
req.update_period_ms = htole32(1000);
req.stats_dma_addr = htole64(paddr);
- if (BNXT_CHIP_P5(softc))
+ if (BNXT_CHIP_P5_PLUS(softc))
req.stats_dma_length = htole16(sizeof(struct ctx_hw_stats_ext) - 8);
else
req.stats_dma_length = htole16(sizeof(struct ctx_hw_stats));
@@ -1919,7 +1920,7 @@ bnxt_hwrm_port_qstats_ext(struct bnxt_softc *softc)
if (!rc) {
softc->fw_rx_stats_ext_size =
le16toh(resp->rx_stat_size) / 8;
- if (BNXT_FW_MAJ(softc) < 220 &&
+ if (BNXT_FW_MAJ(softc) < 220 && !BNXT_CHIP_P7(softc) &&
softc->fw_rx_stats_ext_size > BNXT_RX_STATS_EXT_NUM_LEGACY)
softc->fw_rx_stats_ext_size = BNXT_RX_STATS_EXT_NUM_LEGACY;
@@ -2123,12 +2124,15 @@ bnxt_hwrm_rss_cfg(struct bnxt_softc *softc, struct bnxt_vnic_info *vnic,
bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_VNIC_RSS_CFG);
+ if (BNXT_CHIP_P7(softc))
+ req.flags |= HWRM_VNIC_RSS_CFG_INPUT_FLAGS_IPSEC_HASH_TYPE_CFG_SUPPORT;
+
req.hash_type = htole32(hash_type);
req.ring_grp_tbl_addr = htole64(vnic->rss_grp_tbl.idi_paddr);
req.hash_key_tbl_addr = htole64(vnic->rss_hash_key_tbl.idi_paddr);
req.rss_ctx_idx = htole16(vnic->rss_id);
req.hash_mode_flags = HWRM_FUNC_SPD_CFG_INPUT_HASH_MODE_FLAGS_DEFAULT;
- if (BNXT_CHIP_P5(softc)) {
+ if (BNXT_CHIP_P5_PLUS(softc)) {
req.vnic_id = htole16(vnic->id);
req.ring_table_pair_index = 0x0;
}
@@ -2175,7 +2179,7 @@ bnxt_cfg_async_cr(struct bnxt_softc *softc)
req.fid = htole16(0xffff);
req.enables = htole32(HWRM_FUNC_CFG_INPUT_ENABLES_ASYNC_EVENT_CR);
- if (BNXT_CHIP_P5(softc))
+ if (BNXT_CHIP_P5_PLUS(softc))
req.async_event_cr = htole16(softc->nq_rings[0].ring.phys_id);
else
req.async_event_cr = htole16(softc->def_cp_ring.ring.phys_id);
diff --git a/sys/dev/bnxt/bnxt_en/bnxt_sysctl.c b/sys/dev/bnxt/bnxt_en/bnxt_sysctl.c
index 5a2e3f656278..561cfc34ab9c 100644
--- a/sys/dev/bnxt/bnxt_en/bnxt_sysctl.c
+++ b/sys/dev/bnxt/bnxt_en/bnxt_sysctl.c
@@ -554,7 +554,7 @@ bnxt_create_port_stats_sysctls(struct bnxt_softc *softc)
"rx_stat_err", CTLFLAG_RD,
&softc->rx_port_stats->rx_stat_err, "Received stat err");
- if (BNXT_CHIP_P5(softc) &&
+ if (BNXT_CHIP_P5_PLUS(softc) &&
(softc->flags & BNXT_FLAG_FW_CAP_EXT_STATS)) {
SYSCTL_ADD_QUAD(&softc->hw_stats, SYSCTL_CHILDREN(oid), OID_AUTO,
"tx_bytes_cos0", CTLFLAG_RD,
@@ -1003,7 +1003,7 @@ bnxt_create_rx_sysctls(struct bnxt_softc *softc, int rxr)
if (!oid)
return ENOMEM;
- if (BNXT_CHIP_P5(softc))
+ if (BNXT_CHIP_P5_PLUS(softc))
SYSCTL_ADD_QUAD(&softc->hw_stats, SYSCTL_CHILDREN(oid), OID_AUTO,
"nq_num_ints", CTLFLAG_RD, &softc->nq_rings[rxr].int_count,
"Num Interrupts");
@@ -1590,7 +1590,7 @@ bnxt_reset_ctrl(SYSCTL_HANDLER_ARGS) {
if (rc || req->newptr == NULL)
return rc;
- if (BNXT_CHIP_P5(softc))
+ if (BNXT_CHIP_P5_PLUS(softc))
simulate_reset(softc, buf);
return rc;
diff --git a/sys/dev/bnxt/bnxt_en/bnxt_ulp.c b/sys/dev/bnxt/bnxt_en/bnxt_ulp.c
index 17ae916052f4..3c1f62cb4da3 100644
--- a/sys/dev/bnxt/bnxt_en/bnxt_ulp.c
+++ b/sys/dev/bnxt/bnxt_en/bnxt_ulp.c
@@ -124,7 +124,7 @@ static void bnxt_fill_msix_vecs(struct bnxt_softc *bp, struct bnxt_msix_entry *e
for (i = 0; i < num_msix; i++) {
ent[i].vector = bp->irq_tbl[idx + i].vector;
ent[i].ring_idx = idx + i;
- if (BNXT_CHIP_P5(bp))
+ if (BNXT_CHIP_P5_PLUS(bp))
ent[i].db_offset = DB_PF_OFFSET_P5;
else
ent[i].db_offset = (idx + i) * 0x80;
diff --git a/sys/dev/bnxt/bnxt_en/if_bnxt.c b/sys/dev/bnxt/bnxt_en/if_bnxt.c
index 3a2c18b32e10..fe718c14b24f 100644
--- a/sys/dev/bnxt/bnxt_en/if_bnxt.c
+++ b/sys/dev/bnxt/bnxt_en/if_bnxt.c
@@ -148,6 +148,14 @@ static const pci_vendor_info_t bnxt_vendor_info_array[] =
"Broadcom BCM57504 NetXtreme-E Ethernet Partition"),
PVID(BROADCOM_VENDOR_ID, BCM57502,
"Broadcom BCM57502 NetXtreme-E 10Gb/25Gb/50Gb/100Gb/200Gb Ethernet"),
+ PVID(BROADCOM_VENDOR_ID, BCM57608,
+ "Broadcom BCM57608 NetXtreme-E 25Gb/50Gb/100Gb/200Gb/400Gb Ethernet"),
+ PVID(BROADCOM_VENDOR_ID, BCM57604,
+ "Broadcom BCM57604 NetXtreme-E 25Gb/50Gb/100Gb/200Gb Ethernet"),
+ PVID(BROADCOM_VENDOR_ID, BCM57602,
+ "Broadcom BCM57602 NetXtreme-E 25Gb/50Gb Ethernet"),
+ PVID(BROADCOM_VENDOR_ID, BCM57601,
+ "Broadcom BCM57601 NetXtreme-E 25Gb/50Gb Ethernet"),
PVID(BROADCOM_VENDOR_ID, NETXTREME_C_VF1,
"Broadcom NetXtreme-C Ethernet Virtual Function"),
PVID(BROADCOM_VENDOR_ID, NETXTREME_C_VF2,
@@ -435,7 +443,7 @@ bnxt_tx_queues_alloc(if_ctx_t ctx, caddr_t *vaddrs,
softc = iflib_get_softc(ctx);
- if (BNXT_CHIP_P5(softc)) {
+ if (BNXT_CHIP_P5_PLUS(softc)) {
bnxt_nq_alloc(softc, ntxqsets);
if (!softc->nq_rings) {
device_printf(iflib_get_dev(ctx),
@@ -480,28 +488,29 @@ bnxt_tx_queues_alloc(if_ctx_t ctx, caddr_t *vaddrs,
softc->tx_cp_rings[i].ring.idx = i;
softc->tx_cp_rings[i].ring.id =
(softc->scctx->isc_nrxqsets * 2) + 1 + i;
- softc->tx_cp_rings[i].ring.doorbell = (BNXT_CHIP_P5(softc)) ?
- DB_PF_OFFSET_P5: softc->tx_cp_rings[i].ring.id * 0x80;
+ softc->tx_cp_rings[i].ring.doorbell = (BNXT_CHIP_P5_PLUS(softc)) ?
+ softc->legacy_db_size: softc->tx_cp_rings[i].ring.id * 0x80;
softc->tx_cp_rings[i].ring.ring_size =
softc->scctx->isc_ntxd[0];
softc->tx_cp_rings[i].ring.vaddr = vaddrs[i * ntxqs];
softc->tx_cp_rings[i].ring.paddr = paddrs[i * ntxqs];
+
/* Set up the TX ring */
softc->tx_rings[i].phys_id = (uint16_t)HWRM_NA_SIGNATURE;
softc->tx_rings[i].softc = softc;
softc->tx_rings[i].idx = i;
softc->tx_rings[i].id =
(softc->scctx->isc_nrxqsets * 2) + 1 + i;
- softc->tx_rings[i].doorbell = (BNXT_CHIP_P5(softc)) ?
- DB_PF_OFFSET_P5 : softc->tx_rings[i].id * 0x80;
+ softc->tx_rings[i].doorbell = (BNXT_CHIP_P5_PLUS(softc)) ?
+ softc->legacy_db_size : softc->tx_rings[i].id * 0x80;
softc->tx_rings[i].ring_size = softc->scctx->isc_ntxd[1];
softc->tx_rings[i].vaddr = vaddrs[i * ntxqs + 1];
softc->tx_rings[i].paddr = paddrs[i * ntxqs + 1];
bnxt_create_tx_sysctls(softc, i);
- if (BNXT_CHIP_P5(softc)) {
+ if (BNXT_CHIP_P5_PLUS(softc)) {
/* Set up the Notification ring (NQ) */
softc->nq_rings[i].stats_ctx_id = HWRM_NA_SIGNATURE;
softc->nq_rings[i].ring.phys_id =
@@ -509,8 +518,8 @@ bnxt_tx_queues_alloc(if_ctx_t ctx, caddr_t *vaddrs,
softc->nq_rings[i].ring.softc = softc;
softc->nq_rings[i].ring.idx = i;
softc->nq_rings[i].ring.id = i;
- softc->nq_rings[i].ring.doorbell = (BNXT_CHIP_P5(softc)) ?
- DB_PF_OFFSET_P5 : softc->nq_rings[i].ring.id * 0x80;
+ softc->nq_rings[i].ring.doorbell = (BNXT_CHIP_P5_PLUS(softc)) ?
+ softc->legacy_db_size : softc->nq_rings[i].ring.id * 0x80;
softc->nq_rings[i].ring.ring_size = softc->scctx->isc_ntxd[2];
softc->nq_rings[i].ring.vaddr = vaddrs[i * ntxqs + 2];
softc->nq_rings[i].ring.paddr = paddrs[i * ntxqs + 2];
@@ -668,13 +677,14 @@ bnxt_rx_queues_alloc(if_ctx_t ctx, caddr_t *vaddrs,
softc->rx_cp_rings[i].ring.softc = softc;
softc->rx_cp_rings[i].ring.idx = i;
softc->rx_cp_rings[i].ring.id = i + 1;
- softc->rx_cp_rings[i].ring.doorbell = (BNXT_CHIP_P5(softc)) ?
- DB_PF_OFFSET_P5 : softc->rx_cp_rings[i].ring.id * 0x80;
+ softc->rx_cp_rings[i].ring.doorbell = (BNXT_CHIP_P5_PLUS(softc)) ?
+ softc->legacy_db_size : softc->rx_cp_rings[i].ring.id * 0x80;
/*
* If this ring overflows, RX stops working.
*/
softc->rx_cp_rings[i].ring.ring_size =
softc->scctx->isc_nrxd[0];
+
softc->rx_cp_rings[i].ring.vaddr = vaddrs[i * nrxqs];
softc->rx_cp_rings[i].ring.paddr = paddrs[i * nrxqs];
@@ -683,8 +693,8 @@ bnxt_rx_queues_alloc(if_ctx_t ctx, caddr_t *vaddrs,
softc->rx_rings[i].softc = softc;
softc->rx_rings[i].idx = i;
softc->rx_rings[i].id = i + 1;
- softc->rx_rings[i].doorbell = (BNXT_CHIP_P5(softc)) ?
- DB_PF_OFFSET_P5 : softc->rx_rings[i].id * 0x80;
+ softc->rx_rings[i].doorbell = (BNXT_CHIP_P5_PLUS(softc)) ?
+ softc->legacy_db_size : softc->rx_rings[i].id * 0x80;
softc->rx_rings[i].ring_size = softc->scctx->isc_nrxd[1];
softc->rx_rings[i].vaddr = vaddrs[i * nrxqs + 1];
softc->rx_rings[i].paddr = paddrs[i * nrxqs + 1];
@@ -704,8 +714,8 @@ bnxt_rx_queues_alloc(if_ctx_t ctx, caddr_t *vaddrs,
softc->ag_rings[i].softc = softc;
softc->ag_rings[i].idx = i;
softc->ag_rings[i].id = nrxqsets + i + 1;
- softc->ag_rings[i].doorbell = (BNXT_CHIP_P5(softc)) ?
- DB_PF_OFFSET_P5 : softc->ag_rings[i].id * 0x80;
+ softc->ag_rings[i].doorbell = (BNXT_CHIP_P5_PLUS(softc)) ?
+ softc->legacy_db_size : softc->ag_rings[i].id * 0x80;
softc->ag_rings[i].ring_size = softc->scctx->isc_nrxd[2];
softc->ag_rings[i].vaddr = vaddrs[i * nrxqs + 2];
softc->ag_rings[i].paddr = paddrs[i * nrxqs + 2];
@@ -1090,7 +1100,7 @@ static int bnxt_alloc_ctx_mem(struct bnxt_softc *softc)
u8 pg_lvl = 1;
int i, rc;
- if (!BNXT_CHIP_P5(softc))
+ if (!BNXT_CHIP_P5_PLUS(softc))
return 0;
rc = bnxt_hwrm_func_backing_store_qcaps(softc);
@@ -1481,7 +1491,7 @@ static void bnxt_fw_reset_close(struct bnxt_softc *bp)
bnxt_hwrm_func_drv_unrgtr(bp, false);
for (i = bp->nrxqsets-1; i>=0; i--) {
- if (BNXT_CHIP_P5(bp))
+ if (BNXT_CHIP_P5_PLUS(bp))
iflib_irq_free(bp->ctx, &bp->nq_rings[i].irq);
else
iflib_irq_free(bp->ctx, &bp->rx_cp_rings[i].irq);
@@ -1832,7 +1842,7 @@ static int bnxt_open(struct bnxt_softc *bp)
bp->flags |= BNXT_FLAG_FW_CAP_NEW_RM;
}
- if (BNXT_CHIP_P5(bp))
+ if (BNXT_CHIP_P5_PLUS(bp))
bnxt_hwrm_reserve_pf_rings(bp);
/* Get the current configuration of this function */
rc = bnxt_hwrm_func_qcfg(bp);
@@ -2175,16 +2185,22 @@ bnxt_attach_pre(if_ctx_t ctx)
if ((softc->ver_info->chip_num == BCM57508) ||
(softc->ver_info->chip_num == BCM57504) ||
(softc->ver_info->chip_num == BCM57504_NPAR) ||
- (softc->ver_info->chip_num == BCM57502))
+ (softc->ver_info->chip_num == BCM57502) ||
+ (softc->ver_info->chip_num == BCM57601) ||
+ (softc->ver_info->chip_num == BCM57602) ||
+ (softc->ver_info->chip_num == BCM57604))
softc->flags |= BNXT_FLAG_CHIP_P5;
+ if (softc->ver_info->chip_num == BCM57608)
+ softc->flags |= BNXT_FLAG_CHIP_P7;
+
softc->flags |= BNXT_FLAG_TPA;
- if (BNXT_CHIP_P5(softc) && (!softc->ver_info->chip_rev) &&
+ if (BNXT_CHIP_P5_PLUS(softc) && (!softc->ver_info->chip_rev) &&
(!softc->ver_info->chip_metal))
softc->flags &= ~BNXT_FLAG_TPA;
- if (BNXT_CHIP_P5(softc))
+ if (BNXT_CHIP_P5_PLUS(softc))
softc->flags &= ~BNXT_FLAG_TPA;
/* Get NVRAM info */
@@ -2303,7 +2319,7 @@ bnxt_attach_pre(if_ctx_t ctx)
/* Get the queue config */
bnxt_get_wol_settings(softc);
- if (BNXT_CHIP_P5(softc))
+ if (BNXT_CHIP_P5_PLUS(softc))
bnxt_hwrm_reserve_pf_rings(softc);
rc = bnxt_hwrm_func_qcfg(softc);
if (rc) {
@@ -2376,8 +2392,8 @@ bnxt_attach_pre(if_ctx_t ctx)
softc->def_cp_ring.ring.phys_id = (uint16_t)HWRM_NA_SIGNATURE;
softc->def_cp_ring.ring.softc = softc;
softc->def_cp_ring.ring.id = 0;
- softc->def_cp_ring.ring.doorbell = (BNXT_CHIP_P5(softc)) ?
- DB_PF_OFFSET_P5 : softc->def_cp_ring.ring.id * 0x80;
+ softc->def_cp_ring.ring.doorbell = (BNXT_CHIP_P5_PLUS(softc)) ?
+ softc->legacy_db_size : softc->def_cp_ring.ring.id * 0x80;
softc->def_cp_ring.ring.ring_size = PAGE_SIZE /
sizeof(struct cmpl_base);
rc = iflib_dma_alloc(ctx,
@@ -2514,7 +2530,7 @@ bnxt_detach(if_ctx_t ctx)
iflib_irq_free(ctx, &softc->def_cp_ring.irq);
/* We need to free() these here... */
for (i = softc->nrxqsets-1; i>=0; i--) {
- if (BNXT_CHIP_P5(softc))
+ if (BNXT_CHIP_P5_PLUS(softc))
iflib_irq_free(ctx, &softc->nq_rings[i].irq);
else
iflib_irq_free(ctx, &softc->rx_cp_rings[i].irq);
@@ -2620,7 +2636,7 @@ bnxt_hwrm_resource_free(struct bnxt_softc *softc)
if (rc)
goto fail;
- if (BNXT_CHIP_P5(softc)) {
+ if (BNXT_CHIP_P5_PLUS(softc)) {
rc = bnxt_hwrm_ring_free(softc,
HWRM_RING_ALLOC_INPUT_RING_TYPE_NQ,
&softc->nq_rings[i].ring,
@@ -2643,7 +2659,7 @@ static void
bnxt_func_reset(struct bnxt_softc *softc)
{
- if (!BNXT_CHIP_P5(softc)) {
+ if (!BNXT_CHIP_P5_PLUS(softc)) {
bnxt_hwrm_func_reset(softc);
return;
}
@@ -2659,7 +2675,7 @@ bnxt_rss_grp_tbl_init(struct bnxt_softc *softc)
int i, j;
for (i = 0, j = 0; i < HW_HASH_INDEX_SIZE; i++) {
- if (BNXT_CHIP_P5(softc)) {
+ if (BNXT_CHIP_P5_PLUS(softc)) {
rgt[i++] = htole16(softc->rx_rings[j].phys_id);
rgt[i] = htole16(softc->rx_cp_rings[j].ring.phys_id);
} else {
@@ -2777,7 +2793,7 @@ bnxt_init(if_ctx_t ctx)
int i;
int rc;
- if (!BNXT_CHIP_P5(softc)) {
+ if (!BNXT_CHIP_P5_PLUS(softc)) {
rc = bnxt_hwrm_func_reset(softc);
if (rc)
return;
@@ -2788,7 +2804,7 @@ bnxt_init(if_ctx_t ctx)
softc->is_dev_init = true;
bnxt_clear_ids(softc);
- if (BNXT_CHIP_P5(softc))
+ if (BNXT_CHIP_P5_PLUS(softc))
goto skip_def_cp_ring;
/* Allocate the default completion ring */
softc->def_cp_ring.cons = UINT32_MAX;
@@ -3243,11 +3259,11 @@ bnxt_update_admin_status(if_ctx_t ctx)
bnxt_hwrm_port_qstats(softc);
- if (BNXT_CHIP_P5(softc) &&
+ if (BNXT_CHIP_P5_PLUS(softc) &&
(softc->flags & BNXT_FLAG_FW_CAP_EXT_STATS))
bnxt_hwrm_port_qstats_ext(softc);
- if (BNXT_CHIP_P5(softc)) {
+ if (BNXT_CHIP_P5_PLUS(softc)) {
struct ifmediareq ifmr;
if (bit_test(softc->state_bv, BNXT_STATE_LINK_CHANGE)) {
@@ -3280,10 +3296,11 @@ bnxt_do_enable_intr(struct bnxt_cp_ring *cpr)
{
struct bnxt_softc *softc = cpr->ring.softc;
+
if (cpr->ring.phys_id == (uint16_t)HWRM_NA_SIGNATURE)
return;
- if (BNXT_CHIP_P5(softc))
+ if (BNXT_CHIP_P5_PLUS(softc))
softc->db_ops.bnxt_db_nq(cpr, 1);
else
softc->db_ops.bnxt_db_rx_cq(cpr, 1);
@@ -3297,7 +3314,7 @@ bnxt_do_disable_intr(struct bnxt_cp_ring *cpr)
if (cpr->ring.phys_id == (uint16_t)HWRM_NA_SIGNATURE)
return;
- if (BNXT_CHIP_P5(softc))
+ if (BNXT_CHIP_P5_PLUS(softc))
softc->db_ops.bnxt_db_nq(cpr, 0);
else
softc->db_ops.bnxt_db_rx_cq(cpr, 0);
@@ -3312,7 +3329,7 @@ bnxt_intr_enable(if_ctx_t ctx)
bnxt_do_enable_intr(&softc->def_cp_ring);
for (i = 0; i < softc->nrxqsets; i++)
- if (BNXT_CHIP_P5(softc))
+ if (BNXT_CHIP_P5_PLUS(softc))
softc->db_ops.bnxt_db_nq(&softc->nq_rings[i], 1);
else
softc->db_ops.bnxt_db_rx_cq(&softc->rx_cp_rings[i], 1);
@@ -3326,7 +3343,7 @@ bnxt_tx_queue_intr_enable(if_ctx_t ctx, uint16_t qid)
{
struct bnxt_softc *softc = iflib_get_softc(ctx);
- if (BNXT_CHIP_P5(softc))
+ if (BNXT_CHIP_P5_PLUS(softc))
softc->db_ops.bnxt_db_nq(&softc->nq_rings[qid], 1);
else
softc->db_ops.bnxt_db_rx_cq(&softc->tx_cp_rings[qid], 1);
@@ -3395,7 +3412,7 @@ bnxt_rx_queue_intr_enable(if_ctx_t ctx, uint16_t qid)
{
struct bnxt_softc *softc = iflib_get_softc(ctx);
- if (BNXT_CHIP_P5(softc)) {
+ if (BNXT_CHIP_P5_PLUS(softc)) {
process_nq(softc, qid);
softc->db_ops.bnxt_db_nq(&softc->nq_rings[qid], 1);
}
@@ -3415,7 +3432,7 @@ bnxt_disable_intr(if_ctx_t ctx)
* update the index
*/
for (i = 0; i < softc->nrxqsets; i++)
- if (BNXT_CHIP_P5(softc))
+ if (BNXT_CHIP_P5_PLUS(softc))
softc->db_ops.bnxt_db_nq(&softc->nq_rings[i], 0);
else
softc->db_ops.bnxt_db_rx_cq(&softc->rx_cp_rings[i], 0);
@@ -3435,7 +3452,7 @@ bnxt_msix_intr_assign(if_ctx_t ctx, int msix)
int i;
char irq_name[16];
- if (BNXT_CHIP_P5(softc))
+ if (BNXT_CHIP_P5_PLUS(softc))
goto skip_default_cp;
rc = iflib_irq_alloc_generic(ctx, &softc->def_cp_ring.irq,
@@ -3449,7 +3466,7 @@ bnxt_msix_intr_assign(if_ctx_t ctx, int msix)
skip_default_cp:
for (i=0; i<softc->scctx->isc_nrxqsets; i++) {
- if (BNXT_CHIP_P5(softc)) {
+ if (BNXT_CHIP_P5_PLUS(softc)) {
irq = &softc->nq_rings[i].irq;
id = softc->nq_rings[i].ring.id;
ring = &softc->nq_rings[i];
@@ -3896,7 +3913,7 @@ bnxt_i2c_req(if_ctx_t ctx, struct ifi2creq *i2c)
return -EOPNOTSUPP;
/* This feature is not supported in older firmware versions */
- if (!BNXT_CHIP_P5(softc) ||
+ if (!BNXT_CHIP_P5_PLUS(softc) ||
(softc->hwrm_spec_code < 0x10202))
return -EOPNOTSUPP;
@@ -4335,7 +4352,7 @@ bnxt_handle_isr(void *arg)
cpr->int_count++;
/* Disable further interrupts for this queue */
- if (!BNXT_CHIP_P5(softc))
+ if (!BNXT_CHIP_P5_PLUS(softc))
softc->db_ops.bnxt_db_rx_cq(cpr, 0);
return FILTER_SCHEDULE_THREAD;
@@ -4494,7 +4511,7 @@ bnxt_handle_async_event(struct bnxt_softc *softc, struct cmpl_base *cmpl)
case HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_STATUS_CHANGE:
case HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_SPEED_CHANGE:
case HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_SPEED_CFG_CHANGE:
- if (BNXT_CHIP_P5(softc))
+ if (BNXT_CHIP_P5_PLUS(softc))
bit_set(softc->state_bv, BNXT_STATE_LINK_CHANGE);
else
bnxt_media_status(softc->ctx, &ifmr);