git: eb7a4b35de89 - main - mpi3mr: Update consumer index of admin and operational reply queues after every 100 replies

The branch main has been updated by ssaxena:

URL: https://cgit.FreeBSD.org/src/commit/?id=eb7a4b35de89a0e22f1fb373df33d79135b68dd8

commit eb7a4b35de89a0e22f1fb373df33d79135b68dd8
Author:     Chandrakanth patil <chandrakanth.patil@broadcom.com>
AuthorDate: 2024-03-14 18:41:07 +0000
Commit:     Sumit Saxena <ssaxena@FreeBSD.org>
CommitDate: 2024-06-06 10:39:15 +0000

    mpi3mr: Update consumer index of admin and operational reply queues after every 100 replies
    
    Instead of updating the ConsumerIndex of the Admin and Operational ReplyQueues
    after processing all replies in the queue, it will now be periodically updated
    after processing every 100 replies.
    
    Reviewed by:            imp
    Approved by:            imp
    Differential revision:  https://reviews.freebsd.org/D44425
---
 sys/dev/mpi3mr/mpi3mr.c | 14 +++++++++++++-
 sys/dev/mpi3mr/mpi3mr.h |  2 ++
 2 files changed, 15 insertions(+), 1 deletion(-)

diff --git a/sys/dev/mpi3mr/mpi3mr.c b/sys/dev/mpi3mr/mpi3mr.c
index ba649edbe070..1adc19f49dea 100644
--- a/sys/dev/mpi3mr/mpi3mr.c
+++ b/sys/dev/mpi3mr/mpi3mr.c
@@ -4388,6 +4388,7 @@ static int mpi3mr_complete_admin_cmd(struct mpi3mr_softc *sc)
 	U32 num_adm_reply = 0;
 	U64 reply_dma = 0;
 	Mpi3DefaultReplyDescriptor_t *reply_desc;
+	U16 threshold_comps = 0;
 	
 	mtx_lock_spin(&sc->admin_reply_lock);
 	if (sc->admin_in_use == false) {
@@ -4425,6 +4426,11 @@ static int mpi3mr_complete_admin_cmd(struct mpi3mr_softc *sc)
 		if ((reply_desc->ReplyFlags &
 		     MPI3_REPLY_DESCRIPT_FLAGS_PHASE_MASK) != exp_phase)
 			break;
+
+		if (++threshold_comps == MPI3MR_THRESHOLD_REPLY_COUNT) {
+			mpi3mr_regwrite(sc, MPI3_SYSIF_ADMIN_REPLY_Q_CI_OFFSET, adm_reply_ci);
+			threshold_comps = 0;
+		}
 	} while (1);
 
 	mpi3mr_regwrite(sc, MPI3_SYSIF_ADMIN_REPLY_Q_CI_OFFSET, adm_reply_ci);
@@ -4837,7 +4843,7 @@ int mpi3mr_complete_io_cmd(struct mpi3mr_softc *sc,
 	U32 num_op_replies = 0;
 	U64 reply_dma = 0;
 	Mpi3DefaultReplyDescriptor_t *reply_desc;
-	U16 req_qid = 0;
+	U16 req_qid = 0, threshold_comps = 0;
 
 	mtx_lock_spin(&op_reply_q->q_lock);
 	if (op_reply_q->in_use == false) {
@@ -4882,6 +4888,12 @@ int mpi3mr_complete_io_cmd(struct mpi3mr_softc *sc,
 		if ((reply_desc->ReplyFlags &
 		     MPI3_REPLY_DESCRIPT_FLAGS_PHASE_MASK) != exp_phase)
 			break;
+
+		if (++threshold_comps == MPI3MR_THRESHOLD_REPLY_COUNT) {
+			mpi3mr_regwrite(sc, MPI3_SYSIF_OPER_REPLY_Q_N_CI_OFFSET(op_reply_q->qid), reply_ci);
+			threshold_comps = 0;
+		}
+
 	} while (1);
 
 
diff --git a/sys/dev/mpi3mr/mpi3mr.h b/sys/dev/mpi3mr/mpi3mr.h
index 1cf6718d9047..f8f562184aae 100644
--- a/sys/dev/mpi3mr/mpi3mr.h
+++ b/sys/dev/mpi3mr/mpi3mr.h
@@ -123,6 +123,8 @@
 #define MPI3MR_OP_REP_Q_QD		1024
 #define MPI3MR_OP_REP_Q_QD_A0		4096
 
+#define MPI3MR_THRESHOLD_REPLY_COUNT	100
+
 #define MPI3MR_CHAINSGE_SIZE	MPI3MR_4K_PGSZ
 
 #define MPI3MR_SGEFLAGS_SYSTEM_SIMPLE_END_OF_LIST	\