git: c1a1e8368b53 - stable/13 - Mark arm64 mair_el1 fields as unsigned long

The branch stable/13 has been updated by andrew:

URL: https://cgit.FreeBSD.org/src/commit/?id=c1a1e8368b53009efe11fd31990182de2d9f5962

commit c1a1e8368b53009efe11fd31990182de2d9f5962
Author:     Andrew Turner <andrew@FreeBSD.org>
AuthorDate: 2023-03-16 16:19:21 +0000
Commit:     Andrew Turner <andrew@FreeBSD.org>
CommitDate: 2023-09-25 08:41:15 +0000

    Mark arm64 mair_el1 fields as unsigned long
    
    The register is 64-bit so the upper bits could be shifted past the
    signed 32-bit size of an int the values were before.
    
    Sponsored by:   Arm Ltd
    
    (cherry picked from commit a671f96d9319d63e4a634f88ae277c4d682bba69)
---
 sys/arm64/include/armreg.h | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/sys/arm64/include/armreg.h b/sys/arm64/include/armreg.h
index 6ca4454a3806..6996ea4556ae 100644
--- a/sys/arm64/include/armreg.h
+++ b/sys/arm64/include/armreg.h
@@ -1173,13 +1173,13 @@
 #define	 ID_ISAR5_VCMA_IMPL		(UL(0x1) << ID_ISAR5_VCMA_SHIFT)
 
 /* MAIR_EL1 - Memory Attribute Indirection Register */
-#define	MAIR_ATTR_MASK(idx)	(0xff << ((n)* 8))
+#define	MAIR_ATTR_MASK(idx)	(UL(0xff) << ((n)* 8))
 #define	MAIR_ATTR(attr, idx) ((attr) << ((idx) * 8))
-#define	 MAIR_DEVICE_nGnRnE	0x00
-#define	 MAIR_DEVICE_nGnRE	0x04
-#define	 MAIR_NORMAL_NC		0x44
-#define	 MAIR_NORMAL_WT		0xbb
-#define	 MAIR_NORMAL_WB		0xff
+#define	 MAIR_DEVICE_nGnRnE	UL(0x00)
+#define	 MAIR_DEVICE_nGnRE	UL(0x04)
+#define	 MAIR_NORMAL_NC		UL(0x44)
+#define	 MAIR_NORMAL_WT		UL(0xbb)
+#define	 MAIR_NORMAL_WB		UL(0xff)
 
 /* MDCCINT_EL1 */
 #define	MDCCINT_EL1			MRS_REG(MDCCINT_EL1)