From nobody Wed May 24 10:59:24 2023 X-Original-To: dev-commits-src-all@mlmmj.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mlmmj.nyi.freebsd.org (Postfix) with ESMTP id 4QR7VP1bwJz4CXxQ; Wed, 24 May 2023 10:59:25 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "R3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 4QR7VP16Qvz4Hfm; Wed, 24 May 2023 10:59:25 +0000 (UTC) (envelope-from git@FreeBSD.org) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1684925965; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=5Y9EGO9UO3+9e9INV3gGzO8+LDc2HNSQG5v/+zg97UU=; b=kXb+eaQZ/mn3kLU3ewaX/VbOfhTkJIoFRA49WRw7qzD26wPzUQAVY8/phBFBD/khzOla/T K4aDUb/gXHYnAkaZE8jKM/sELFDxYCb/MvlDctuBetPicWkdcMkgxwRJFGqmLvX4xuytpl sTGSR0WGCoxQ+0x4rXbQ/S5OLCXrtV3tcH/+cd3A9sejHDdpSNfGs1IXDOnW1FdQGsPFHK 9JqRSz62ybrvLuNUXyTmo/ohdtJqbN5SV/OkiPRNS6RfCxRuJfpGrUcTnBXU7qwTGEUcF1 eF5VmJzo1Upy1TLV2/5S63Y5XCSqO2/+nBWHc6gEyaG5mIilINpl+QIx0fQr3A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1684925965; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=5Y9EGO9UO3+9e9INV3gGzO8+LDc2HNSQG5v/+zg97UU=; b=uGOzmCh5fA6LalYNY6p+GsTmbsK7aXpl1xWz7qKb60aprufF9yOhLZJpr+9Xmv/uSm3qcC latRDfxM330DTKVCyYlqsul7Tmn2q6DAMeTrh9X866wwq8uG6yn6glMQv9d61WwHs7Ru+l LoYNLABjPkhoKnSlVmRzR/XMN4q8LCjfHKxDuyolTGfIIscgGFJYBwBw7Ofp5GPbagtJ7I YL6YhDXA9UHX25Ge8StzR/Nu3iYKg2m4WG04ILGFdouiyjVCXfx8PKKjJhAGt5mWROnC5x gY9vdjp7x3AqU2A96xhu3dwa3tSFaH/fFR2TFDnKn5asklLDwfSApvTOvUrZ8g== ARC-Authentication-Results: i=1; mx1.freebsd.org; none ARC-Seal: i=1; s=dkim; d=freebsd.org; t=1684925965; a=rsa-sha256; cv=none; b=r07CcnobEQwASjZLI6v6DXi5PIeps2O/C5k3qWGcvDW6qYJt9CZHCDZy1IpSNBEWmuUyaZ 9CWJmppKFG2x0oxMRigN9VH/crttP1k4JocDBNyCDF0OuC2YWA6xnpznbBb6//ikP2xaAH BXAkwRS3mha8IFeVo7gaCky7N4PJQVPZcIWOgOFmlMUNhnult2H15KRaStmkHHbXoqb7Fx Iev+auU63tjtGKmM3V7YqWzN3wlz62yEfnPNXgKi4gnUbb5EK1dHa5baKrk4EbmXohkbYC rOssSvwlH+n1XGmZ6M/WP9k13jnjDDLzao0zf2dWVLQIgK4V+y5AXKsrK7dDMQ== Received: from gitrepo.freebsd.org (gitrepo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:5]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 4QR7VP0BMlzfyk; Wed, 24 May 2023 10:59:25 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from gitrepo.freebsd.org ([127.0.1.44]) by gitrepo.freebsd.org (8.16.1/8.16.1) with ESMTP id 34OAxOgl042355; Wed, 24 May 2023 10:59:24 GMT (envelope-from git@gitrepo.freebsd.org) Received: (from git@localhost) by gitrepo.freebsd.org (8.16.1/8.16.1/Submit) id 34OAxO0D042354; Wed, 24 May 2023 10:59:24 GMT (envelope-from git) Date: Wed, 24 May 2023 10:59:24 GMT Message-Id: <202305241059.34OAxO0D042354@gitrepo.freebsd.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-main@FreeBSD.org From: Andrew Turner Subject: git: 419f8fc7fbc8 - main - Add more arm64 special registers List-Id: Commit messages for all branches of the src repository List-Archive: https://lists.freebsd.org/archives/dev-commits-src-all List-Help: List-Post: List-Subscribe: List-Unsubscribe: Sender: owner-dev-commits-src-all@freebsd.org X-BeenThere: dev-commits-src-all@freebsd.org MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit X-Git-Committer: andrew X-Git-Repository: src X-Git-Refname: refs/heads/main X-Git-Reftype: branch X-Git-Commit: 419f8fc7fbc8b860df92db58d13ac9c9aafa1c10 Auto-Submitted: auto-generated X-ThisMailContainsUnwantedMimeParts: N The branch main has been updated by andrew: URL: https://cgit.FreeBSD.org/src/commit/?id=419f8fc7fbc8b860df92db58d13ac9c9aafa1c10 commit 419f8fc7fbc8b860df92db58d13ac9c9aafa1c10 Author: Andrew Turner AuthorDate: 2023-05-04 10:30:57 +0000 Commit: Andrew Turner CommitDate: 2023-05-24 10:55:38 +0000 Add more arm64 special registers These will be used by bhyve Reviewed by: markj Sponsored by: Arm Ltd Sponsored by: Innovate UK Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D40128 --- sys/arm64/include/armreg.h | 48 ++++++++++++++++++++++++++++++++++++++++++++-- 1 file changed, 46 insertions(+), 2 deletions(-) diff --git a/sys/arm64/include/armreg.h b/sys/arm64/include/armreg.h index 45f6145de8bd..5c174bcbc838 100644 --- a/sys/arm64/include/armreg.h +++ b/sys/arm64/include/armreg.h @@ -435,12 +435,24 @@ #define ICC_SGI1R_EL1_CRn 12 #define ICC_SGI1R_EL1_CRm 11 #define ICC_SGI1R_EL1_op2 5 -#define ICC_SGI1R_EL1_TL_MASK 0xffffUL +#define ICC_SGI1R_EL1_TL_SHIFT 0 +#define ICC_SGI1R_EL1_TL_MASK (0xffffUL << ICC_SGI1R_EL1_TL_SHIFT) +#define ICC_SGI1R_EL1_TL_VAL(x) ((x) & ICC_SGI1R_EL1_TL_MASK) #define ICC_SGI1R_EL1_AFF1_SHIFT 16 +#define ICC_SGI1R_EL1_AFF1_MASK (0xfful << ICC_SGI1R_EL1_AFF1_SHIFT) +#define ICC_SGI1R_EL1_AFF1_VAL(x) ((x) & ICC_SGI1R_EL1_AFF1_MASK) #define ICC_SGI1R_EL1_SGIID_SHIFT 24 +#define ICC_SGI1R_EL1_SGIID_MASK (0xfUL << ICC_SGI1R_EL1_SGIID_SHIFT) +#define ICC_SGI1R_EL1_SGIID_VAL(x) ((x) & ICC_SGI1R_EL1_SGIID_MASK) #define ICC_SGI1R_EL1_AFF2_SHIFT 32 +#define ICC_SGI1R_EL1_AFF2_MASK (0xfful << ICC_SGI1R_EL1_AFF2_SHIFT) +#define ICC_SGI1R_EL1_AFF2_VAL(x) ((x) & ICC_SGI1R_EL1_AFF2_MASK) +#define ICC_SGI1R_EL1_RS_SHIFT 44 +#define ICC_SGI1R_EL1_RS_MASK (0xful << ICC_SGI1R_EL1_RS_SHIFT) +#define ICC_SGI1R_EL1_RS_VAL(x) ((x) & ICC_SGI1R_EL1_RS_MASK) #define ICC_SGI1R_EL1_AFF3_SHIFT 48 -#define ICC_SGI1R_EL1_SGIID_MASK 0xfUL +#define ICC_SGI1R_EL1_AFF3_MASK (0xfful << ICC_SGI1R_EL1_AFF3_SHIFT) +#define ICC_SGI1R_EL1_AFF3_VAL(x) ((x) & ICC_SGI1R_EL1_AFF3_MASK) #define ICC_SGI1R_EL1_IRM (0x1UL << 40) /* ICC_SRE_EL1 */ @@ -503,6 +515,14 @@ #define ID_AA64DFR0_TraceFilt_NONE (UL(0x0) << ID_AA64DFR0_TraceFilt_SHIFT) #define ID_AA64DFR0_TraceFilt_8_4 (UL(0x1) << ID_AA64DFR0_TraceFilt_SHIFT) +/* ID_AA64DFR1_EL1 */ +#define ID_AA64DFR1_EL1 MRS_REG(ID_AA64DFR0_EL1) +#define ID_AA64DFR1_EL1_op0 3 +#define ID_AA64DFR1_EL1_op1 0 +#define ID_AA64DFR1_EL1_CRn 0 +#define ID_AA64DFR1_EL1_CRm 5 +#define ID_AA64DFR1_EL1_op2 1 + /* ID_AA64ISAR0_EL1 */ #define ID_AA64ISAR0_EL1 MRS_REG(ID_AA64ISAR0_EL1) #define ID_AA64ISAR0_EL1_op0 0x3 @@ -1193,6 +1213,30 @@ #define MDSCR_MDE_SHIFT 15 #define MDSCR_MDE (UL(0x1) << MDSCR_MDE_SHIFT) +/* MPIDR_EL1 - Multiprocessor Affinity Register */ +#define MPIDR_EL1 MRS_REG(MPIDR_EL1) +#define MPIDR_EL1_op0 3 +#define MPIDR_EL1_op1 0 +#define MPIDR_EL1_CRn 0 +#define MPIDR_EL1_CRm 0 +#define MPIDR_EL1_op2 5 +#define MPIDR_AFF0_SHIFT 0 +#define MPIDR_AFF0_MASK (UL(0xff) << MPIDR_AFF0_SHIFT) +#define MPIDR_AFF0_VAL(x) ((x) & MPIDR_AFF0_MASK) +#define MPIDR_AFF1_SHIFT 8 +#define MPIDR_AFF1_MASK (UL(0xff) << MPIDR_AFF1_SHIFT) +#define MPIDR_AFF1_VAL(x) ((x) & MPIDR_AFF1_MASK) +#define MPIDR_AFF2_SHIFT 16 +#define MPIDR_AFF2_MASK (UL(0xff) << MPIDR_AFF2_SHIFT) +#define MPIDR_AFF2_VAL(x) ((x) & MPIDR_AFF2_MASK) +#define MPIDR_MT_SHIFT 24 +#define MPIDR_MT_MASK (UL(0x1) << MPIDR_MT_SHIFT) +#define MPIDR_U_SHIFT 30 +#define MPIDR_U_MASK (UL(0x1) << MPIDR_U_SHIFT) +#define MPIDR_AFF3_SHIFT 32 +#define MPIDR_AFF3_MASK (UL(0xff) << MPIDR_AFF3_SHIFT) +#define MPIDR_AFF3_VAL(x) ((x) & MPIDR_AFF3_MASK) + /* MVFR0_EL1 */ #define MVFR0_EL1 MRS_REG(MVFR0_EL1) #define MVFR0_EL1_op0 0x3