git: 1ab9996fb5fa - main - libcompiler_rt/libgcc_s: Remove MIPS build glue.
- Go to: [ bottom of page ] [ top of archives ] [ this month ]
Date: Wed, 29 Mar 2023 22:07:15 UTC
The branch main has been updated by jhb: URL: https://cgit.FreeBSD.org/src/commit/?id=1ab9996fb5fafce958fc0d22f68ee16a50d56638 commit 1ab9996fb5fafce958fc0d22f68ee16a50d56638 Author: John Baldwin <jhb@FreeBSD.org> AuthorDate: 2023-03-29 22:05:42 +0000 Commit: John Baldwin <jhb@FreeBSD.org> CommitDate: 2023-03-29 22:05:42 +0000 libcompiler_rt/libgcc_s: Remove MIPS build glue. Reviewed by: emaste Differential Revision: https://reviews.freebsd.org/D39328 --- lib/libcompiler_rt/Makefile.inc | 9 ++------- lib/libgcc_s/Makefile | 3 +-- 2 files changed, 3 insertions(+), 9 deletions(-) diff --git a/lib/libcompiler_rt/Makefile.inc b/lib/libcompiler_rt/Makefile.inc index 4657ffe64abe..519ff0943ff3 100644 --- a/lib/libcompiler_rt/Makefile.inc +++ b/lib/libcompiler_rt/Makefile.inc @@ -189,8 +189,7 @@ SRCF+= trunctfsf2 .endif # These are already shipped by libc.a on some architectures. -.if ${MACHINE_CPUARCH} != "arm" && ${MACHINE_CPUARCH} != "mips" && \ - ${MACHINE_CPUARCH} != "riscv" +.if ${MACHINE_CPUARCH} != "arm" && ${MACHINE_CPUARCH} != "riscv" SRCF+= adddf3 SRCF+= addsf3 SRCF+= divdf3 @@ -207,7 +206,7 @@ SRCF+= subsf3 SRCF+= truncdfsf2 .endif -.if ${MACHINE_CPUARCH} != "arm" && ${MACHINE_CPUARCH} != "mips" +.if ${MACHINE_CPUARCH} != "arm" SRCF+= comparedf2 SRCF+= comparesf2 .endif @@ -218,10 +217,6 @@ SRCF+= comparesf2 SRCF+= stdatomic CFLAGS+= -DEMIT_SYNC_ATOMICS -.elif ${MACHINE_CPUARCH} == "mips" -.PATH: ${SRCTOP}/sys/mips/mips - -SRCF+= stdatomic .endif .for file in ${SRCF} diff --git a/lib/libgcc_s/Makefile b/lib/libgcc_s/Makefile index aa097d7255de..f1f94589376e 100644 --- a/lib/libgcc_s/Makefile +++ b/lib/libgcc_s/Makefile @@ -48,8 +48,7 @@ SRCS+= s_scalbnf.c # Don't include long double routines on architectures where long double # is the same size as double. -.if ${MACHINE_CPUARCH} != "mips" && ${MACHINE_CPUARCH} != "arm" && \ - ${MACHINE_CPUARCH} != "powerpc" +.if ${MACHINE_CPUARCH} != "arm" && ${MACHINE_CPUARCH} != "powerpc" SRCS+= s_fmaxl.c SRCS+= s_logbl.c SRCS+= s_scalbnl.c