git: e3f7087489c5 - main - Add more arm64 PAC identification fields

The branch main has been updated by andrew:

URL: https://cgit.FreeBSD.org/src/commit/?id=e3f7087489c55decf54161b25a5db20c2c93ff42

commit e3f7087489c55decf54161b25a5db20c2c93ff42
Author:     Andrew Turner <andrew@FreeBSD.org>
AuthorDate: 2022-03-08 12:46:47 +0000
Commit:     Andrew Turner <andrew@FreeBSD.org>
CommitDate: 2022-03-10 10:43:48 +0000

    Add more arm64 PAC identification fields
    
    Sponsored by:   The FreeBSD Foundation
---
 sys/arm64/arm64/identcpu.c | 8 ++++++++
 sys/arm64/include/armreg.h | 6 ++++++
 2 files changed, 14 insertions(+)

diff --git a/sys/arm64/arm64/identcpu.c b/sys/arm64/arm64/identcpu.c
index 1a1c80baddf0..f466055e0084 100644
--- a/sys/arm64/arm64/identcpu.c
+++ b/sys/arm64/arm64/identcpu.c
@@ -706,6 +706,10 @@ static struct mrs_field_value id_aa64isar1_api[] = {
 	MRS_FIELD_VALUE(ID_AA64ISAR1_API_NONE, ""),
 	MRS_FIELD_VALUE(ID_AA64ISAR1_API_PAC, "API PAC"),
 	MRS_FIELD_VALUE(ID_AA64ISAR1_API_EPAC, "API EPAC"),
+	MRS_FIELD_VALUE(ID_AA64ISAR1_API_EPAC2, "Impl PAuth+EPAC2"),
+	MRS_FIELD_VALUE(ID_AA64ISAR1_API_FPAC, "Impl PAuth+FPAC"),
+	MRS_FIELD_VALUE(ID_AA64ISAR1_API_FPAC_COMBINED,
+	    "Impl PAuth+FPAC+Combined"),
 	MRS_FIELD_VALUE_END,
 };
 
@@ -718,6 +722,10 @@ static struct mrs_field_value id_aa64isar1_apa[] = {
 	MRS_FIELD_VALUE(ID_AA64ISAR1_APA_NONE, ""),
 	MRS_FIELD_VALUE(ID_AA64ISAR1_APA_PAC, "APA PAC"),
 	MRS_FIELD_VALUE(ID_AA64ISAR1_APA_EPAC, "APA EPAC"),
+	MRS_FIELD_VALUE(ID_AA64ISAR1_APA_EPAC2, "PAuth+EPAC2"),
+	MRS_FIELD_VALUE(ID_AA64ISAR1_APA_FPAC, "PAuth+FPAC"),
+	MRS_FIELD_VALUE(ID_AA64ISAR1_APA_FPAC_COMBINED,
+	    "PAuth+FPAC+Combined"),
 	MRS_FIELD_VALUE_END,
 };
 
diff --git a/sys/arm64/include/armreg.h b/sys/arm64/include/armreg.h
index c1da3abbde0f..cd09807ec4be 100644
--- a/sys/arm64/include/armreg.h
+++ b/sys/arm64/include/armreg.h
@@ -462,12 +462,18 @@
 #define	 ID_AA64ISAR1_APA_NONE		(UL(0x0) << ID_AA64ISAR1_APA_SHIFT)
 #define	 ID_AA64ISAR1_APA_PAC		(UL(0x1) << ID_AA64ISAR1_APA_SHIFT)
 #define	 ID_AA64ISAR1_APA_EPAC		(UL(0x2) << ID_AA64ISAR1_APA_SHIFT)
+#define	 ID_AA64ISAR1_APA_EPAC2		(UL(0x3) << ID_AA64ISAR1_APA_SHIFT)
+#define	 ID_AA64ISAR1_APA_FPAC		(UL(0x4) << ID_AA64ISAR1_APA_SHIFT)
+#define	 ID_AA64ISAR1_APA_FPAC_COMBINED	(UL(0x5) << ID_AA64ISAR1_APA_SHIFT)
 #define	ID_AA64ISAR1_API_SHIFT		8
 #define	ID_AA64ISAR1_API_MASK		(UL(0xf) << ID_AA64ISAR1_API_SHIFT)
 #define	ID_AA64ISAR1_API_VAL(x)		((x) & ID_AA64ISAR1_API_MASK)
 #define	 ID_AA64ISAR1_API_NONE		(UL(0x0) << ID_AA64ISAR1_API_SHIFT)
 #define	 ID_AA64ISAR1_API_PAC		(UL(0x1) << ID_AA64ISAR1_API_SHIFT)
 #define	 ID_AA64ISAR1_API_EPAC		(UL(0x2) << ID_AA64ISAR1_API_SHIFT)
+#define	 ID_AA64ISAR1_API_EPAC2		(UL(0x3) << ID_AA64ISAR1_API_SHIFT)
+#define	 ID_AA64ISAR1_API_FPAC		(UL(0x4) << ID_AA64ISAR1_API_SHIFT)
+#define	 ID_AA64ISAR1_API_FPAC_COMBINED	(UL(0x5) << ID_AA64ISAR1_API_SHIFT)
 #define	ID_AA64ISAR1_JSCVT_SHIFT	12
 #define	ID_AA64ISAR1_JSCVT_MASK		(UL(0xf) << ID_AA64ISAR1_JSCVT_SHIFT)
 #define	ID_AA64ISAR1_JSCVT_VAL(x)	((x) & ID_AA64ISAR1_JSCVT_MASK)