git: 2f317e731297 - main - Add the SVE reigster definitions

The branch main has been updated by andrew:

URL: https://cgit.FreeBSD.org/src/commit/?id=2f317e7312971812bde8b8b0d9da21a2c1d378a3

commit 2f317e7312971812bde8b8b0d9da21a2c1d378a3
Author:     Andrew Turner <andrew@FreeBSD.org>
AuthorDate: 2022-06-24 11:51:26 +0000
Commit:     Andrew Turner <andrew@FreeBSD.org>
CommitDate: 2022-06-24 13:52:06 +0000

    Add the SVE reigster definitions
    
    Sponsored by:   The FreeBSD Foundation
---
 sys/arm64/include/armreg.h | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/sys/arm64/include/armreg.h b/sys/arm64/include/armreg.h
index c795db995ecf..02f45d66efde 100644
--- a/sys/arm64/include/armreg.h
+++ b/sys/arm64/include/armreg.h
@@ -138,6 +138,11 @@
 #define	CNTPCT_EL0_op2		1
 
 /* CPACR_EL1 */
+#define	CPACR_ZEN_MASK		(0x3 << 16)
+#define	 CPACR_ZEN_TRAP_ALL1	(0x0 << 16) /* Traps from EL0 and EL1 */
+#define	 CPACR_ZEN_TRAP_EL0	(0x1 << 16) /* Traps from EL0 */
+#define	 CPACR_ZEN_TRAP_ALL2	(0x2 << 16) /* Traps from EL0 and EL1 */
+#define	 CPACR_ZEN_TRAP_NONE	(0x3 << 16) /* No traps */
 #define	CPACR_FPEN_MASK		(0x3 << 20)
 #define	 CPACR_FPEN_TRAP_ALL1	(0x0 << 20) /* Traps from EL0 and EL1 */
 #define	 CPACR_FPEN_TRAP_EL0	(0x1 << 20) /* Traps from EL0 */
@@ -1805,4 +1810,9 @@
 #define	TTBR_CnP_SHIFT		0
 #define	TTBR_CnP		(1ul << TTBR_CnP_SHIFT)
 
+/* ZCR_EL1 - SVE Control Register */
+#define	ZCR_LEN_SHIFT		0
+#define	ZCR_LEN_MASK		(0xf << ZCR_LEN_SHIFT)
+#define	ZCR_LEN_BYTES(x)	((((x) & ZCR_LEN_MASK) + 1) * 16)
+
 #endif /* !_MACHINE_ARMREG_H_ */