git: 476438e81f1e - main - xen: remove public headers in sys/xen/interface
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Date: Mon, 07 Feb 2022 09:16:40 UTC
The branch main has been updated by royger:
URL: https://cgit.FreeBSD.org/src/commit/?id=476438e81f1ee4aee9065e44753fc66964221aa1
commit 476438e81f1ee4aee9065e44753fc66964221aa1
Author: Roger Pau Monné <royger@FreeBSD.org>
AuthorDate: 2022-02-04 15:28:39 +0000
Commit: Roger Pau Monné <royger@FreeBSD.org>
CommitDate: 2022-02-07 09:12:34 +0000
xen: remove public headers in sys/xen/interface
Those are superseded by the ones in sys/contrib/xen and no longer
used.
Sponsored by: Citrix Systems R&D
---
sys/xen/interface/COPYING | 38 -
sys/xen/interface/arch-arm.h | 484 ----------
sys/xen/interface/arch-arm/hvm/save.h | 39 -
sys/xen/interface/arch-arm/smccc.h | 66 --
sys/xen/interface/arch-x86/cpufeatureset.h | 295 ------
sys/xen/interface/arch-x86/cpuid.h | 118 ---
sys/xen/interface/arch-x86/hvm/save.h | 661 -------------
sys/xen/interface/arch-x86/hvm/start_info.h | 159 ----
sys/xen/interface/arch-x86/pmu.h | 159 ----
sys/xen/interface/arch-x86/xen-mca.h | 448 ---------
sys/xen/interface/arch-x86/xen-x86_32.h | 194 ----
sys/xen/interface/arch-x86/xen-x86_64.h | 241 -----
sys/xen/interface/arch-x86/xen.h | 384 --------
sys/xen/interface/arch-x86_32.h | 27 -
sys/xen/interface/arch-x86_64.h | 43 -
sys/xen/interface/argo.h | 255 -----
sys/xen/interface/callback.h | 121 ---
sys/xen/interface/device_tree_defs.h | 42 -
sys/xen/interface/dom0_ops.h | 120 ---
sys/xen/interface/domctl.h | 1298 -------------------------
sys/xen/interface/elfnote.h | 283 ------
sys/xen/interface/errno.h | 126 ---
sys/xen/interface/event_channel.h | 388 --------
sys/xen/interface/features.h | 129 ---
sys/xen/interface/gcov.h | 113 ---
sys/xen/interface/grant_table.h | 684 -------------
sys/xen/interface/hvm/dm_op.h | 480 ----------
sys/xen/interface/hvm/e820.h | 38 -
sys/xen/interface/hvm/hvm_info_table.h | 82 --
sys/xen/interface/hvm/hvm_op.h | 395 --------
sys/xen/interface/hvm/hvm_vcpu.h | 144 ---
sys/xen/interface/hvm/hvm_xs_strings.h | 89 --
sys/xen/interface/hvm/ioreq.h | 143 ---
sys/xen/interface/hvm/params.h | 305 ------
sys/xen/interface/hvm/pvdrivers.h | 49 -
sys/xen/interface/hvm/save.h | 113 ---
sys/xen/interface/hypfs.h | 129 ---
sys/xen/interface/io/9pfs.h | 49 -
sys/xen/interface/io/blkif.h | 722 --------------
sys/xen/interface/io/cameraif.h | 1374 ---------------------------
sys/xen/interface/io/console.h | 56 --
sys/xen/interface/io/displif.h | 872 -----------------
sys/xen/interface/io/fbif.h | 176 ----
sys/xen/interface/io/fsif.h | 192 ----
sys/xen/interface/io/kbdif.h | 576 -----------
sys/xen/interface/io/libxenvchan.h | 101 --
sys/xen/interface/io/netif.h | 1090 ---------------------
sys/xen/interface/io/pciif.h | 125 ---
sys/xen/interface/io/protocols.h | 42 -
sys/xen/interface/io/pvcalls.h | 160 ----
sys/xen/interface/io/ring.h | 488 ----------
sys/xen/interface/io/sndif.h | 1091 ---------------------
sys/xen/interface/io/tpmif.h | 143 ---
sys/xen/interface/io/usbif.h | 254 -----
sys/xen/interface/io/vscsiif.h | 330 -------
sys/xen/interface/io/xenbus.h | 80 --
sys/xen/interface/io/xs_wire.h | 153 ---
sys/xen/interface/kexec.h | 263 -----
sys/xen/interface/memory.h | 735 --------------
sys/xen/interface/nmi.h | 85 --
sys/xen/interface/physdev.h | 383 --------
sys/xen/interface/platform.h | 663 -------------
sys/xen/interface/pmu.h | 143 ---
sys/xen/interface/sched.h | 202 ----
sys/xen/interface/sysctl.h | 1141 ----------------------
sys/xen/interface/tmem.h | 122 ---
sys/xen/interface/trace.h | 341 -------
sys/xen/interface/vcpu.h | 248 -----
sys/xen/interface/version.h | 113 ---
sys/xen/interface/vm_event.h | 415 --------
sys/xen/interface/xen-compat.h | 46 -
sys/xen/interface/xen.h | 1048 --------------------
sys/xen/interface/xencomm.h | 41 -
sys/xen/interface/xenoprof.h | 152 ---
sys/xen/interface/xsm/flask_op.h | 216 -----
75 files changed, 23313 deletions(-)
diff --git a/sys/xen/interface/COPYING b/sys/xen/interface/COPYING
deleted file mode 100644
index ffc6d6166ffc..000000000000
--- a/sys/xen/interface/COPYING
+++ /dev/null
@@ -1,38 +0,0 @@
-XEN NOTICE
-==========
-
-This copyright applies to all files within this subdirectory and its
-subdirectories:
- include/public/*.h
- include/public/hvm/*.h
- include/public/io/*.h
-
-The intention is that these files can be freely copied into the source
-tree of an operating system when porting that OS to run on Xen. Doing
-so does *not* cause the OS to become subject to the terms of the GPL.
-
-All other files in the Xen source distribution are covered by version
-2 of the GNU General Public License except where explicitly stated
-otherwise within individual source files.
-
- -- Keir Fraser (on behalf of the Xen team)
-
-=====================================================================
-
-Permission is hereby granted, free of charge, to any person obtaining a copy
-of this software and associated documentation files (the "Software"), to
-deal in the Software without restriction, including without limitation the
-rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
-sell copies of the Software, and to permit persons to whom the Software is
-furnished to do so, subject to the following conditions:
-
-The above copyright notice and this permission notice shall be included in
-all copies or substantial portions of the Software.
-
-THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
-FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
-AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
-LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
-FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
-DEALINGS IN THE SOFTWARE.
diff --git a/sys/xen/interface/arch-arm.h b/sys/xen/interface/arch-arm.h
deleted file mode 100644
index c365b1b39eaa..000000000000
--- a/sys/xen/interface/arch-arm.h
+++ /dev/null
@@ -1,484 +0,0 @@
-/******************************************************************************
- * arch-arm.h
- *
- * Guest OS interface to ARM Xen.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to
- * deal in the Software without restriction, including without limitation the
- * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
- * sell copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- *
- * Copyright 2011 (C) Citrix Systems
- */
-
-#ifndef __XEN_PUBLIC_ARCH_ARM_H__
-#define __XEN_PUBLIC_ARCH_ARM_H__
-
-/*
- * `incontents 50 arm_abi Hypercall Calling Convention
- *
- * A hypercall is issued using the ARM HVC instruction.
- *
- * A hypercall can take up to 5 arguments. These are passed in
- * registers, the first argument in x0/r0 (for arm64/arm32 guests
- * respectively irrespective of whether the underlying hypervisor is
- * 32- or 64-bit), the second argument in x1/r1, the third in x2/r2,
- * the forth in x3/r3 and the fifth in x4/r4.
- *
- * The hypercall number is passed in r12 (arm) or x16 (arm64). In both
- * cases the relevant ARM procedure calling convention specifies this
- * is an inter-procedure-call scratch register (e.g. for use in linker
- * stubs). This use does not conflict with use during a hypercall.
- *
- * The HVC ISS must contain a Xen specific TAG: XEN_HYPERCALL_TAG.
- *
- * The return value is in x0/r0.
- *
- * The hypercall will clobber x16/r12 and the argument registers used
- * by that hypercall (except r0 which is the return value) i.e. in
- * addition to x16/r12 a 2 argument hypercall will clobber x1/r1 and a
- * 4 argument hypercall will clobber x1/r1, x2/r2 and x3/r3.
- *
- * Parameter structs passed to hypercalls are laid out according to
- * the Procedure Call Standard for the ARM Architecture (AAPCS, AKA
- * EABI) and Procedure Call Standard for the ARM 64-bit Architecture
- * (AAPCS64). Where there is a conflict the 64-bit standard should be
- * used regardless of guest type. Structures which are passed as
- * hypercall arguments are always little endian.
- *
- * All memory which is shared with other entities in the system
- * (including the hypervisor and other guests) must reside in memory
- * which is mapped as Normal Inner Write-Back Outer Write-Back Inner-Shareable.
- * This applies to:
- * - hypercall arguments passed via a pointer to guest memory.
- * - memory shared via the grant table mechanism (including PV I/O
- * rings etc).
- * - memory shared with the hypervisor (struct shared_info, struct
- * vcpu_info, the grant table, etc).
- *
- * Any cache allocation hints are acceptable.
- */
-
-/*
- * `incontents 55 arm_hcall Supported Hypercalls
- *
- * Xen on ARM makes extensive use of hardware facilities and therefore
- * only a subset of the potential hypercalls are required.
- *
- * Since ARM uses second stage paging any machine/physical addresses
- * passed to hypercalls are Guest Physical Addresses (Intermediate
- * Physical Addresses) unless otherwise noted.
- *
- * The following hypercalls (and sub operations) are supported on the
- * ARM platform. Other hypercalls should be considered
- * unavailable/unsupported.
- *
- * HYPERVISOR_memory_op
- * All generic sub-operations
- *
- * HYPERVISOR_domctl
- * All generic sub-operations, with the exception of:
- * * XEN_DOMCTL_irq_permission (not yet implemented)
- *
- * HYPERVISOR_sched_op
- * All generic sub-operations, with the exception of:
- * * SCHEDOP_block -- prefer wfi hardware instruction
- *
- * HYPERVISOR_console_io
- * All generic sub-operations
- *
- * HYPERVISOR_xen_version
- * All generic sub-operations
- *
- * HYPERVISOR_event_channel_op
- * All generic sub-operations
- *
- * HYPERVISOR_physdev_op
- * No sub-operations are currenty supported
- *
- * HYPERVISOR_sysctl
- * All generic sub-operations, with the exception of:
- * * XEN_SYSCTL_page_offline_op
- * * XEN_SYSCTL_get_pmstat
- * * XEN_SYSCTL_pm_op
- *
- * HYPERVISOR_hvm_op
- * Exactly these sub-operations are supported:
- * * HVMOP_set_param
- * * HVMOP_get_param
- *
- * HYPERVISOR_grant_table_op
- * All generic sub-operations
- *
- * HYPERVISOR_vcpu_op
- * Exactly these sub-operations are supported:
- * * VCPUOP_register_vcpu_info
- * * VCPUOP_register_runstate_memory_area
- *
- *
- * Other notes on the ARM ABI:
- *
- * - struct start_info is not exported to ARM guests.
- *
- * - struct shared_info is mapped by ARM guests using the
- * HYPERVISOR_memory_op sub-op XENMEM_add_to_physmap, passing
- * XENMAPSPACE_shared_info as space parameter.
- *
- * - All the per-cpu struct vcpu_info are mapped by ARM guests using the
- * HYPERVISOR_vcpu_op sub-op VCPUOP_register_vcpu_info, including cpu0
- * struct vcpu_info.
- *
- * - The grant table is mapped using the HYPERVISOR_memory_op sub-op
- * XENMEM_add_to_physmap, passing XENMAPSPACE_grant_table as space
- * parameter. The memory range specified under the Xen compatible
- * hypervisor node on device tree can be used as target gpfn for the
- * mapping.
- *
- * - Xenstore is initialized by using the two hvm_params
- * HVM_PARAM_STORE_PFN and HVM_PARAM_STORE_EVTCHN. They can be read
- * with the HYPERVISOR_hvm_op sub-op HVMOP_get_param.
- *
- * - The paravirtualized console is initialized by using the two
- * hvm_params HVM_PARAM_CONSOLE_PFN and HVM_PARAM_CONSOLE_EVTCHN. They
- * can be read with the HYPERVISOR_hvm_op sub-op HVMOP_get_param.
- *
- * - Event channel notifications are delivered using the percpu GIC
- * interrupt specified under the Xen compatible hypervisor node on
- * device tree.
- *
- * - The device tree Xen compatible node is fully described under Linux
- * at Documentation/devicetree/bindings/arm/xen.txt.
- */
-
-#define XEN_HYPERCALL_TAG 0XEA1
-
-#define int64_aligned_t int64_t __attribute__((aligned(8)))
-#define uint64_aligned_t uint64_t __attribute__((aligned(8)))
-
-#ifndef __ASSEMBLY__
-#define ___DEFINE_XEN_GUEST_HANDLE(name, type) \
- typedef union { type *p; unsigned long q; } \
- __guest_handle_ ## name; \
- typedef union { type *p; uint64_aligned_t q; } \
- __guest_handle_64_ ## name
-
-/*
- * XEN_GUEST_HANDLE represents a guest pointer, when passed as a field
- * in a struct in memory. On ARM is always 8 bytes sizes and 8 bytes
- * aligned.
- * XEN_GUEST_HANDLE_PARAM represents a guest pointer, when passed as an
- * hypercall argument. It is 4 bytes on aarch32 and 8 bytes on aarch64.
- */
-#define __DEFINE_XEN_GUEST_HANDLE(name, type) \
- ___DEFINE_XEN_GUEST_HANDLE(name, type); \
- ___DEFINE_XEN_GUEST_HANDLE(const_##name, const type)
-#define DEFINE_XEN_GUEST_HANDLE(name) __DEFINE_XEN_GUEST_HANDLE(name, name)
-#define __XEN_GUEST_HANDLE(name) __guest_handle_64_ ## name
-#define XEN_GUEST_HANDLE(name) __XEN_GUEST_HANDLE(name)
-#define XEN_GUEST_HANDLE_PARAM(name) __guest_handle_ ## name
-#define set_xen_guest_handle_raw(hnd, val) \
- do { \
- typeof(&(hnd)) _sxghr_tmp = &(hnd); \
- _sxghr_tmp->q = 0; \
- _sxghr_tmp->p = val; \
- } while ( 0 )
-#define set_xen_guest_handle(hnd, val) set_xen_guest_handle_raw(hnd, val)
-
-typedef uint64_t xen_pfn_t;
-#define PRI_xen_pfn PRIx64
-#define PRIu_xen_pfn PRIu64
-
-/*
- * Maximum number of virtual CPUs in legacy multi-processor guests.
- * Only one. All other VCPUS must use VCPUOP_register_vcpu_info.
- */
-#define XEN_LEGACY_MAX_VCPUS 1
-
-typedef uint64_t xen_ulong_t;
-#define PRI_xen_ulong PRIx64
-
-#if defined(__XEN__) || defined(__XEN_TOOLS__)
-#if defined(__GNUC__) && !defined(__STRICT_ANSI__)
-/* Anonymous union includes both 32- and 64-bit names (e.g., r0/x0). */
-# define __DECL_REG(n64, n32) union { \
- uint64_t n64; \
- uint32_t n32; \
- }
-#else
-/* Non-gcc sources must always use the proper 64-bit name (e.g., x0). */
-#define __DECL_REG(n64, n32) uint64_t n64
-#endif
-
-struct vcpu_guest_core_regs
-{
- /* Aarch64 Aarch32 */
- __DECL_REG(x0, r0_usr);
- __DECL_REG(x1, r1_usr);
- __DECL_REG(x2, r2_usr);
- __DECL_REG(x3, r3_usr);
- __DECL_REG(x4, r4_usr);
- __DECL_REG(x5, r5_usr);
- __DECL_REG(x6, r6_usr);
- __DECL_REG(x7, r7_usr);
- __DECL_REG(x8, r8_usr);
- __DECL_REG(x9, r9_usr);
- __DECL_REG(x10, r10_usr);
- __DECL_REG(x11, r11_usr);
- __DECL_REG(x12, r12_usr);
-
- __DECL_REG(x13, sp_usr);
- __DECL_REG(x14, lr_usr);
-
- __DECL_REG(x15, __unused_sp_hyp);
-
- __DECL_REG(x16, lr_irq);
- __DECL_REG(x17, sp_irq);
-
- __DECL_REG(x18, lr_svc);
- __DECL_REG(x19, sp_svc);
-
- __DECL_REG(x20, lr_abt);
- __DECL_REG(x21, sp_abt);
-
- __DECL_REG(x22, lr_und);
- __DECL_REG(x23, sp_und);
-
- __DECL_REG(x24, r8_fiq);
- __DECL_REG(x25, r9_fiq);
- __DECL_REG(x26, r10_fiq);
- __DECL_REG(x27, r11_fiq);
- __DECL_REG(x28, r12_fiq);
-
- __DECL_REG(x29, sp_fiq);
- __DECL_REG(x30, lr_fiq);
-
- /* Return address and mode */
- __DECL_REG(pc64, pc32); /* ELR_EL2 */
- uint32_t cpsr; /* SPSR_EL2 */
-
- union {
- uint32_t spsr_el1; /* AArch64 */
- uint32_t spsr_svc; /* AArch32 */
- };
-
- /* AArch32 guests only */
- uint32_t spsr_fiq, spsr_irq, spsr_und, spsr_abt;
-
- /* AArch64 guests only */
- uint64_t sp_el0;
- uint64_t sp_el1, elr_el1;
-};
-typedef struct vcpu_guest_core_regs vcpu_guest_core_regs_t;
-DEFINE_XEN_GUEST_HANDLE(vcpu_guest_core_regs_t);
-
-#undef __DECL_REG
-
-struct vcpu_guest_context {
-#define _VGCF_online 0
-#define VGCF_online (1<<_VGCF_online)
- uint32_t flags; /* VGCF_* */
-
- struct vcpu_guest_core_regs user_regs; /* Core CPU registers */
-
- uint64_t sctlr;
- uint64_t ttbcr, ttbr0, ttbr1;
-};
-typedef struct vcpu_guest_context vcpu_guest_context_t;
-DEFINE_XEN_GUEST_HANDLE(vcpu_guest_context_t);
-
-/*
- * struct xen_arch_domainconfig's ABI is covered by
- * XEN_DOMCTL_INTERFACE_VERSION.
- */
-#define XEN_DOMCTL_CONFIG_GIC_NATIVE 0
-#define XEN_DOMCTL_CONFIG_GIC_V2 1
-#define XEN_DOMCTL_CONFIG_GIC_V3 2
-
-#define XEN_DOMCTL_CONFIG_TEE_NONE 0
-#define XEN_DOMCTL_CONFIG_TEE_OPTEE 1
-
-struct xen_arch_domainconfig {
- /* IN/OUT */
- uint8_t gic_version;
- /* IN */
- uint16_t tee_type;
- /* IN */
- uint32_t nr_spis;
- /*
- * OUT
- * Based on the property clock-frequency in the DT timer node.
- * The property may be present when the bootloader/firmware doesn't
- * set correctly CNTFRQ which hold the timer frequency.
- *
- * As it's not possible to trap this register, we have to replicate
- * the value in the guest DT.
- *
- * = 0 => property not present
- * > 0 => Value of the property
- *
- */
- uint32_t clock_frequency;
-};
-#endif /* __XEN__ || __XEN_TOOLS__ */
-
-struct arch_vcpu_info {
-};
-typedef struct arch_vcpu_info arch_vcpu_info_t;
-
-struct arch_shared_info {
-};
-typedef struct arch_shared_info arch_shared_info_t;
-typedef uint64_t xen_callback_t;
-
-#endif
-
-#if defined(__XEN__) || defined(__XEN_TOOLS__)
-
-/* PSR bits (CPSR, SPSR) */
-
-#define PSR_THUMB (1<<5) /* Thumb Mode enable */
-#define PSR_FIQ_MASK (1<<6) /* Fast Interrupt mask */
-#define PSR_IRQ_MASK (1<<7) /* Interrupt mask */
-#define PSR_ABT_MASK (1<<8) /* Asynchronous Abort mask */
-#define PSR_BIG_ENDIAN (1<<9) /* arm32: Big Endian Mode */
-#define PSR_DBG_MASK (1<<9) /* arm64: Debug Exception mask */
-#define PSR_IT_MASK (0x0600fc00) /* Thumb If-Then Mask */
-#define PSR_JAZELLE (1<<24) /* Jazelle Mode */
-
-/* 32 bit modes */
-#define PSR_MODE_USR 0x10
-#define PSR_MODE_FIQ 0x11
-#define PSR_MODE_IRQ 0x12
-#define PSR_MODE_SVC 0x13
-#define PSR_MODE_MON 0x16
-#define PSR_MODE_ABT 0x17
-#define PSR_MODE_HYP 0x1a
-#define PSR_MODE_UND 0x1b
-#define PSR_MODE_SYS 0x1f
-
-/* 64 bit modes */
-#define PSR_MODE_BIT 0x10 /* Set iff AArch32 */
-#define PSR_MODE_EL3h 0x0d
-#define PSR_MODE_EL3t 0x0c
-#define PSR_MODE_EL2h 0x09
-#define PSR_MODE_EL2t 0x08
-#define PSR_MODE_EL1h 0x05
-#define PSR_MODE_EL1t 0x04
-#define PSR_MODE_EL0t 0x00
-
-#define PSR_GUEST32_INIT (PSR_ABT_MASK|PSR_FIQ_MASK|PSR_IRQ_MASK|PSR_MODE_SVC)
-#define PSR_GUEST64_INIT (PSR_ABT_MASK|PSR_FIQ_MASK|PSR_IRQ_MASK|PSR_MODE_EL1h)
-
-#define SCTLR_GUEST_INIT xen_mk_ullong(0x00c50078)
-
-/*
- * Virtual machine platform (memory layout, interrupts)
- *
- * These are defined for consistency between the tools and the
- * hypervisor. Guests must not rely on these hardcoded values but
- * should instead use the FDT.
- */
-
-/* Physical Address Space */
-
-/*
- * vGIC mappings: Only one set of mapping is used by the guest.
- * Therefore they can overlap.
- */
-
-/* vGIC v2 mappings */
-#define GUEST_GICD_BASE xen_mk_ullong(0x03001000)
-#define GUEST_GICD_SIZE xen_mk_ullong(0x00001000)
-#define GUEST_GICC_BASE xen_mk_ullong(0x03002000)
-#define GUEST_GICC_SIZE xen_mk_ullong(0x00002000)
-
-/* vGIC v3 mappings */
-#define GUEST_GICV3_GICD_BASE xen_mk_ullong(0x03001000)
-#define GUEST_GICV3_GICD_SIZE xen_mk_ullong(0x00010000)
-
-#define GUEST_GICV3_RDIST_REGIONS 1
-
-#define GUEST_GICV3_GICR0_BASE xen_mk_ullong(0x03020000) /* vCPU0..127 */
-#define GUEST_GICV3_GICR0_SIZE xen_mk_ullong(0x01000000)
-
-/* ACPI tables physical address */
-#define GUEST_ACPI_BASE xen_mk_ullong(0x20000000)
-#define GUEST_ACPI_SIZE xen_mk_ullong(0x02000000)
-
-/* PL011 mappings */
-#define GUEST_PL011_BASE xen_mk_ullong(0x22000000)
-#define GUEST_PL011_SIZE xen_mk_ullong(0x00001000)
-
-/*
- * 16MB == 4096 pages reserved for guest to use as a region to map its
- * grant table in.
- */
-#define GUEST_GNTTAB_BASE xen_mk_ullong(0x38000000)
-#define GUEST_GNTTAB_SIZE xen_mk_ullong(0x01000000)
-
-#define GUEST_MAGIC_BASE xen_mk_ullong(0x39000000)
-#define GUEST_MAGIC_SIZE xen_mk_ullong(0x01000000)
-
-#define GUEST_RAM_BANKS 2
-
-#define GUEST_RAM0_BASE xen_mk_ullong(0x40000000) /* 3GB of low RAM @ 1GB */
-#define GUEST_RAM0_SIZE xen_mk_ullong(0xc0000000)
-
-#define GUEST_RAM1_BASE xen_mk_ullong(0x0200000000) /* 1016GB of RAM @ 8GB */
-#define GUEST_RAM1_SIZE xen_mk_ullong(0xfe00000000)
-
-#define GUEST_RAM_BASE GUEST_RAM0_BASE /* Lowest RAM address */
-/* Largest amount of actual RAM, not including holes */
-#define GUEST_RAM_MAX (GUEST_RAM0_SIZE + GUEST_RAM1_SIZE)
-/* Suitable for e.g. const uint64_t ramfoo[] = GUEST_RAM_BANK_FOOS; */
-#define GUEST_RAM_BANK_BASES { GUEST_RAM0_BASE, GUEST_RAM1_BASE }
-#define GUEST_RAM_BANK_SIZES { GUEST_RAM0_SIZE, GUEST_RAM1_SIZE }
-
-/* Current supported guest VCPUs */
-#define GUEST_MAX_VCPUS 128
-
-/* Interrupts */
-#define GUEST_TIMER_VIRT_PPI 27
-#define GUEST_TIMER_PHYS_S_PPI 29
-#define GUEST_TIMER_PHYS_NS_PPI 30
-#define GUEST_EVTCHN_PPI 31
-
-#define GUEST_VPL011_SPI 32
-
-/* PSCI functions */
-#define PSCI_cpu_suspend 0
-#define PSCI_cpu_off 1
-#define PSCI_cpu_on 2
-#define PSCI_migrate 3
-
-#endif
-
-#ifndef __ASSEMBLY__
-/* Stub definition of PMU structure */
-typedef struct xen_pmu_arch { uint8_t dummy; } xen_pmu_arch_t;
-#endif
-
-#endif /* __XEN_PUBLIC_ARCH_ARM_H__ */
-
-/*
- * Local variables:
- * mode: C
- * c-file-style: "BSD"
- * c-basic-offset: 4
- * tab-width: 4
- * indent-tabs-mode: nil
- * End:
- */
diff --git a/sys/xen/interface/arch-arm/hvm/save.h b/sys/xen/interface/arch-arm/hvm/save.h
deleted file mode 100644
index 75b8e65bcb80..000000000000
--- a/sys/xen/interface/arch-arm/hvm/save.h
+++ /dev/null
@@ -1,39 +0,0 @@
-/*
- * Structure definitions for HVM state that is held by Xen and must
- * be saved along with the domain's memory and device-model state.
- *
- * Copyright (c) 2012 Citrix Systems Ltd.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to
- * deal in the Software without restriction, including without limitation the
- * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
- * sell copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- */
-
-#ifndef __XEN_PUBLIC_HVM_SAVE_ARM_H__
-#define __XEN_PUBLIC_HVM_SAVE_ARM_H__
-
-#endif
-
-/*
- * Local variables:
- * mode: C
- * c-file-style: "BSD"
- * c-basic-offset: 4
- * tab-width: 4
- * indent-tabs-mode: nil
- * End:
- */
diff --git a/sys/xen/interface/arch-arm/smccc.h b/sys/xen/interface/arch-arm/smccc.h
deleted file mode 100644
index 17dc6d8829e6..000000000000
--- a/sys/xen/interface/arch-arm/smccc.h
+++ /dev/null
@@ -1,66 +0,0 @@
-/*
- * smccc.h
- *
- * SMC/HVC interface in accordance with SMC Calling Convention.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to
- * deal in the Software without restriction, including without limitation the
- * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
- * sell copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- *
- * Copyright 2017 (C) EPAM Systems
- */
-
-#ifndef __XEN_PUBLIC_ARCH_ARM_SMCCC_H__
-#define __XEN_PUBLIC_ARCH_ARM_SMCCC_H__
-
-#include "public/xen.h"
-
-/*
- * Hypervisor Service version.
- *
- * We can't use XEN version here, because of SMCCC requirements:
- * Major revision should change every time SMC/HVC function is removed.
- * Minor revision should change every time SMC/HVC function is added.
- * So, it is SMCCC protocol revision code, not XEN version.
- *
- * Those values are subjected to change, when interface will be extended.
- */
-#define XEN_SMCCC_MAJOR_REVISION 0
-#define XEN_SMCCC_MINOR_REVISION 1
-
-/* Hypervisor Service UID. Randomly generated with uuidgen. */
-#define XEN_SMCCC_UID XEN_DEFINE_UUID(0xa71812dc, 0xc698, 0x4369, 0x9acf, \
- 0x79, 0xd1, 0x8d, 0xde, 0xe6, 0x67)
-
-/* Standard Service Service Call version. */
-#define SSSC_SMCCC_MAJOR_REVISION 0
-#define SSSC_SMCCC_MINOR_REVISION 1
-
-/* Standard Service Call UID. Randomly generated with uuidgen. */
-#define SSSC_SMCCC_UID XEN_DEFINE_UUID(0xf863386f, 0x4b39, 0x4cbd, 0x9220,\
- 0xce, 0x16, 0x41, 0xe5, 0x9f, 0x6f)
-
-#endif /* __XEN_PUBLIC_ARCH_ARM_SMCCC_H__ */
-
-/*
- * Local variables:
- * mode: C
- * c-file-style: "BSD"
- * c-basic-offset: 4
- * indent-tabs-mode: nil
- * End:b
- */
diff --git a/sys/xen/interface/arch-x86/cpufeatureset.h b/sys/xen/interface/arch-x86/cpufeatureset.h
deleted file mode 100644
index d06a2fd4c8e2..000000000000
--- a/sys/xen/interface/arch-x86/cpufeatureset.h
+++ /dev/null
@@ -1,295 +0,0 @@
-/*
- * arch-x86/cpufeatureset.h
- *
- * CPU featureset definitions
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to
- * deal in the Software without restriction, including without limitation the
- * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
- * sell copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- *
- * Copyright (c) 2015, 2016 Citrix Systems, Inc.
- */
-
-/*
- * There are two expected ways of including this header.
- *
- * 1) The "default" case (expected from tools etc).
- *
- * Simply #include <public/arch-x86/cpufeatureset.h>
- *
- * In this circumstance, normal header guards apply and the includer shall get
- * an enumeration in the XEN_X86_FEATURE_xxx namespace.
- *
- * 2) The special case where the includer provides XEN_CPUFEATURE() in scope.
- *
- * In this case, no inclusion guards apply and the caller is responsible for
- * their XEN_CPUFEATURE() being appropriate in the included context.
- */
-
-#ifndef XEN_CPUFEATURE
-
-/*
- * Includer has not provided a custom XEN_CPUFEATURE(). Arrange for normal
- * header guards, an enum and constants in the XEN_X86_FEATURE_xxx namespace.
- */
-#ifndef __XEN_PUBLIC_ARCH_X86_CPUFEATURESET_H__
-#define __XEN_PUBLIC_ARCH_X86_CPUFEATURESET_H__
-
-#define XEN_CPUFEATURESET_DEFAULT_INCLUDE
-
-#define XEN_CPUFEATURE(name, value) XEN_X86_FEATURE_##name = value,
-enum {
-
-#endif /* __XEN_PUBLIC_ARCH_X86_CPUFEATURESET_H__ */
-#endif /* !XEN_CPUFEATURE */
-
-
-#ifdef XEN_CPUFEATURE
-/*
- * A featureset is a bitmap of x86 features, represented as a collection of
- * 32bit words.
- *
- * Words are as specified in vendors programming manuals, and shall not
- * contain any synthesied values. New words may be added to the end of
- * featureset.
- *
- * All featureset words currently originate from leaves specified for the
- * CPUID instruction, but this is not preclude other sources of information.
- */
-
-/*
- * Attribute syntax:
- *
- * Attributes for a particular feature are provided as characters before the
- * first space in the comment immediately following the feature value. Note -
- * none of these attributes form part of the Xen public ABI.
- *
- * Special: '!'
- * This bit has special properties and is not a straight indication of a
- * piece of new functionality. Xen will handle these differently,
- * and may override toolstack settings completely.
- *
- * Applicability to guests: 'A', 'S' or 'H'
- * 'A' = All guests.
- * 'S' = All HVM guests (not PV guests).
- * 'H' = HVM HAP guests (not PV or HVM Shadow guests).
- * Upper case => Available by default
- * Lower case => Can be opted-in to, but not available by default.
- */
-
-/* Intel-defined CPU features, CPUID level 0x00000001.edx, word 0 */
-XEN_CPUFEATURE(FPU, 0*32+ 0) /*A Onboard FPU */
-XEN_CPUFEATURE(VME, 0*32+ 1) /*S Virtual Mode Extensions */
-XEN_CPUFEATURE(DE, 0*32+ 2) /*A Debugging Extensions */
-XEN_CPUFEATURE(PSE, 0*32+ 3) /*S Page Size Extensions */
-XEN_CPUFEATURE(TSC, 0*32+ 4) /*A Time Stamp Counter */
-XEN_CPUFEATURE(MSR, 0*32+ 5) /*A Model-Specific Registers, RDMSR, WRMSR */
-XEN_CPUFEATURE(PAE, 0*32+ 6) /*A Physical Address Extensions */
-XEN_CPUFEATURE(MCE, 0*32+ 7) /*A Machine Check Architecture */
-XEN_CPUFEATURE(CX8, 0*32+ 8) /*A CMPXCHG8 instruction */
-XEN_CPUFEATURE(APIC, 0*32+ 9) /*!A Onboard APIC */
-XEN_CPUFEATURE(SEP, 0*32+11) /*A SYSENTER/SYSEXIT */
-XEN_CPUFEATURE(MTRR, 0*32+12) /*S Memory Type Range Registers */
-XEN_CPUFEATURE(PGE, 0*32+13) /*S Page Global Enable */
-XEN_CPUFEATURE(MCA, 0*32+14) /*A Machine Check Architecture */
-XEN_CPUFEATURE(CMOV, 0*32+15) /*A CMOV instruction (FCMOVCC and FCOMI too if FPU present) */
-XEN_CPUFEATURE(PAT, 0*32+16) /*A Page Attribute Table */
-XEN_CPUFEATURE(PSE36, 0*32+17) /*S 36-bit PSEs */
-XEN_CPUFEATURE(CLFLUSH, 0*32+19) /*A CLFLUSH instruction */
-XEN_CPUFEATURE(DS, 0*32+21) /* Debug Store */
-XEN_CPUFEATURE(ACPI, 0*32+22) /*A ACPI via MSR */
-XEN_CPUFEATURE(MMX, 0*32+23) /*A Multimedia Extensions */
-XEN_CPUFEATURE(FXSR, 0*32+24) /*A FXSAVE and FXRSTOR instructions */
-XEN_CPUFEATURE(SSE, 0*32+25) /*A Streaming SIMD Extensions */
-XEN_CPUFEATURE(SSE2, 0*32+26) /*A Streaming SIMD Extensions-2 */
-XEN_CPUFEATURE(SS, 0*32+27) /*A CPU self snoop */
-XEN_CPUFEATURE(HTT, 0*32+28) /*!A Hyper-Threading Technology */
-XEN_CPUFEATURE(TM1, 0*32+29) /* Thermal Monitor 1 */
-XEN_CPUFEATURE(PBE, 0*32+31) /* Pending Break Enable */
-
-/* Intel-defined CPU features, CPUID level 0x00000001.ecx, word 1 */
-XEN_CPUFEATURE(SSE3, 1*32+ 0) /*A Streaming SIMD Extensions-3 */
-XEN_CPUFEATURE(PCLMULQDQ, 1*32+ 1) /*A Carry-less multiplication */
-XEN_CPUFEATURE(DTES64, 1*32+ 2) /* 64-bit Debug Store */
-XEN_CPUFEATURE(MONITOR, 1*32+ 3) /* Monitor/Mwait support */
-XEN_CPUFEATURE(DSCPL, 1*32+ 4) /* CPL Qualified Debug Store */
-XEN_CPUFEATURE(VMX, 1*32+ 5) /*S Virtual Machine Extensions */
-XEN_CPUFEATURE(SMX, 1*32+ 6) /* Safer Mode Extensions */
-XEN_CPUFEATURE(EIST, 1*32+ 7) /* Enhanced SpeedStep */
-XEN_CPUFEATURE(TM2, 1*32+ 8) /* Thermal Monitor 2 */
-XEN_CPUFEATURE(SSSE3, 1*32+ 9) /*A Supplemental Streaming SIMD Extensions-3 */
-XEN_CPUFEATURE(FMA, 1*32+12) /*A Fused Multiply Add */
-XEN_CPUFEATURE(CX16, 1*32+13) /*A CMPXCHG16B */
-XEN_CPUFEATURE(XTPR, 1*32+14) /* Send Task Priority Messages */
-XEN_CPUFEATURE(PDCM, 1*32+15) /* Perf/Debug Capability MSR */
-XEN_CPUFEATURE(PCID, 1*32+17) /*H Process Context ID */
-XEN_CPUFEATURE(DCA, 1*32+18) /* Direct Cache Access */
-XEN_CPUFEATURE(SSE4_1, 1*32+19) /*A Streaming SIMD Extensions 4.1 */
-XEN_CPUFEATURE(SSE4_2, 1*32+20) /*A Streaming SIMD Extensions 4.2 */
-XEN_CPUFEATURE(X2APIC, 1*32+21) /*!A Extended xAPIC */
-XEN_CPUFEATURE(MOVBE, 1*32+22) /*A movbe instruction */
-XEN_CPUFEATURE(POPCNT, 1*32+23) /*A POPCNT instruction */
-XEN_CPUFEATURE(TSC_DEADLINE, 1*32+24) /*S TSC Deadline Timer */
-XEN_CPUFEATURE(AESNI, 1*32+25) /*A AES instructions */
-XEN_CPUFEATURE(XSAVE, 1*32+26) /*A XSAVE/XRSTOR/XSETBV/XGETBV */
-XEN_CPUFEATURE(OSXSAVE, 1*32+27) /*! OSXSAVE */
-XEN_CPUFEATURE(AVX, 1*32+28) /*A Advanced Vector Extensions */
-XEN_CPUFEATURE(F16C, 1*32+29) /*A Half-precision convert instruction */
-XEN_CPUFEATURE(RDRAND, 1*32+30) /*!A Digital Random Number Generator */
-XEN_CPUFEATURE(HYPERVISOR, 1*32+31) /*!A Running under some hypervisor */
-
-/* AMD-defined CPU features, CPUID level 0x80000001.edx, word 2 */
-XEN_CPUFEATURE(SYSCALL, 2*32+11) /*A SYSCALL/SYSRET */
-XEN_CPUFEATURE(NX, 2*32+20) /*A Execute Disable */
-XEN_CPUFEATURE(MMXEXT, 2*32+22) /*A AMD MMX extensions */
-XEN_CPUFEATURE(FFXSR, 2*32+25) /*A FFXSR instruction optimizations */
-XEN_CPUFEATURE(PAGE1GB, 2*32+26) /*H 1Gb large page support */
-XEN_CPUFEATURE(RDTSCP, 2*32+27) /*A RDTSCP */
-XEN_CPUFEATURE(LM, 2*32+29) /*A Long Mode (x86-64) */
-XEN_CPUFEATURE(3DNOWEXT, 2*32+30) /*A AMD 3DNow! extensions */
-XEN_CPUFEATURE(3DNOW, 2*32+31) /*A 3DNow! */
-
-/* AMD-defined CPU features, CPUID level 0x80000001.ecx, word 3 */
-XEN_CPUFEATURE(LAHF_LM, 3*32+ 0) /*A LAHF/SAHF in long mode */
-XEN_CPUFEATURE(CMP_LEGACY, 3*32+ 1) /*!A If yes HyperThreading not valid */
-XEN_CPUFEATURE(SVM, 3*32+ 2) /*S Secure virtual machine */
-XEN_CPUFEATURE(EXTAPIC, 3*32+ 3) /* Extended APIC space */
-XEN_CPUFEATURE(CR8_LEGACY, 3*32+ 4) /*S CR8 in 32-bit mode */
-XEN_CPUFEATURE(ABM, 3*32+ 5) /*A Advanced bit manipulation */
-XEN_CPUFEATURE(SSE4A, 3*32+ 6) /*A SSE-4A */
-XEN_CPUFEATURE(MISALIGNSSE, 3*32+ 7) /*A Misaligned SSE mode */
-XEN_CPUFEATURE(3DNOWPREFETCH, 3*32+ 8) /*A 3DNow prefetch instructions */
-XEN_CPUFEATURE(OSVW, 3*32+ 9) /* OS Visible Workaround */
-XEN_CPUFEATURE(IBS, 3*32+10) /* Instruction Based Sampling */
-XEN_CPUFEATURE(XOP, 3*32+11) /*A extended AVX instructions */
-XEN_CPUFEATURE(SKINIT, 3*32+12) /* SKINIT/STGI instructions */
-XEN_CPUFEATURE(WDT, 3*32+13) /* Watchdog timer */
-XEN_CPUFEATURE(LWP, 3*32+15) /* Light Weight Profiling */
-XEN_CPUFEATURE(FMA4, 3*32+16) /*A 4 operands MAC instructions */
-XEN_CPUFEATURE(NODEID_MSR, 3*32+19) /* NodeId MSR */
-XEN_CPUFEATURE(TBM, 3*32+21) /*A trailing bit manipulations */
-XEN_CPUFEATURE(TOPOEXT, 3*32+22) /* topology extensions CPUID leafs */
-XEN_CPUFEATURE(DBEXT, 3*32+26) /*A data breakpoint extension */
-XEN_CPUFEATURE(MONITORX, 3*32+29) /* MONITOR extension (MONITORX/MWAITX) */
-
-/* Intel-defined CPU features, CPUID level 0x0000000D:1.eax, word 4 */
-XEN_CPUFEATURE(XSAVEOPT, 4*32+ 0) /*A XSAVEOPT instruction */
-XEN_CPUFEATURE(XSAVEC, 4*32+ 1) /*A XSAVEC/XRSTORC instructions */
-XEN_CPUFEATURE(XGETBV1, 4*32+ 2) /*A XGETBV with %ecx=1 */
-XEN_CPUFEATURE(XSAVES, 4*32+ 3) /*S XSAVES/XRSTORS instructions */
-
-/* Intel-defined CPU features, CPUID level 0x00000007:0.ebx, word 5 */
-XEN_CPUFEATURE(FSGSBASE, 5*32+ 0) /*A {RD,WR}{FS,GS}BASE instructions */
-XEN_CPUFEATURE(TSC_ADJUST, 5*32+ 1) /*S TSC_ADJUST MSR available */
-XEN_CPUFEATURE(SGX, 5*32+ 2) /* Software Guard extensions */
-XEN_CPUFEATURE(BMI1, 5*32+ 3) /*A 1st bit manipulation extensions */
-XEN_CPUFEATURE(HLE, 5*32+ 4) /*A Hardware Lock Elision */
-XEN_CPUFEATURE(AVX2, 5*32+ 5) /*A AVX2 instructions */
-XEN_CPUFEATURE(FDP_EXCP_ONLY, 5*32+ 6) /*! x87 FDP only updated on exception. */
-XEN_CPUFEATURE(SMEP, 5*32+ 7) /*S Supervisor Mode Execution Protection */
-XEN_CPUFEATURE(BMI2, 5*32+ 8) /*A 2nd bit manipulation extensions */
-XEN_CPUFEATURE(ERMS, 5*32+ 9) /*A Enhanced REP MOVSB/STOSB */
-XEN_CPUFEATURE(INVPCID, 5*32+10) /*H Invalidate Process Context ID */
-XEN_CPUFEATURE(RTM, 5*32+11) /*A Restricted Transactional Memory */
-XEN_CPUFEATURE(PQM, 5*32+12) /* Platform QoS Monitoring */
-XEN_CPUFEATURE(NO_FPU_SEL, 5*32+13) /*! FPU CS/DS stored as zero */
-XEN_CPUFEATURE(MPX, 5*32+14) /*s Memory Protection Extensions */
-XEN_CPUFEATURE(PQE, 5*32+15) /* Platform QoS Enforcement */
-XEN_CPUFEATURE(AVX512F, 5*32+16) /*A AVX-512 Foundation Instructions */
-XEN_CPUFEATURE(AVX512DQ, 5*32+17) /*A AVX-512 Doubleword & Quadword Instrs */
-XEN_CPUFEATURE(RDSEED, 5*32+18) /*A RDSEED instruction */
-XEN_CPUFEATURE(ADX, 5*32+19) /*A ADCX, ADOX instructions */
-XEN_CPUFEATURE(SMAP, 5*32+20) /*S Supervisor Mode Access Prevention */
-XEN_CPUFEATURE(AVX512_IFMA, 5*32+21) /*A AVX-512 Integer Fused Multiply Add */
-XEN_CPUFEATURE(CLFLUSHOPT, 5*32+23) /*A CLFLUSHOPT instruction */
-XEN_CPUFEATURE(CLWB, 5*32+24) /*A CLWB instruction */
-XEN_CPUFEATURE(AVX512PF, 5*32+26) /*A AVX-512 Prefetch Instructions */
-XEN_CPUFEATURE(AVX512ER, 5*32+27) /*A AVX-512 Exponent & Reciprocal Instrs */
-XEN_CPUFEATURE(AVX512CD, 5*32+28) /*A AVX-512 Conflict Detection Instrs */
-XEN_CPUFEATURE(SHA, 5*32+29) /*A SHA1 & SHA256 instructions */
-XEN_CPUFEATURE(AVX512BW, 5*32+30) /*A AVX-512 Byte and Word Instructions */
-XEN_CPUFEATURE(AVX512VL, 5*32+31) /*A AVX-512 Vector Length Extensions */
-
-/* Intel-defined CPU features, CPUID level 0x00000007:0.ecx, word 6 */
-XEN_CPUFEATURE(PREFETCHWT1, 6*32+ 0) /*A PREFETCHWT1 instruction */
-XEN_CPUFEATURE(AVX512_VBMI, 6*32+ 1) /*A AVX-512 Vector Byte Manipulation Instrs */
-XEN_CPUFEATURE(UMIP, 6*32+ 2) /*S User Mode Instruction Prevention */
-XEN_CPUFEATURE(PKU, 6*32+ 3) /*H Protection Keys for Userspace */
-XEN_CPUFEATURE(OSPKE, 6*32+ 4) /*! OS Protection Keys Enable */
-XEN_CPUFEATURE(AVX512_VBMI2, 6*32+ 6) /*A Additional AVX-512 Vector Byte Manipulation Instrs */
-XEN_CPUFEATURE(CET_SS, 6*32+ 7) /* CET - Shadow Stacks */
-XEN_CPUFEATURE(GFNI, 6*32+ 8) /*A Galois Field Instrs */
-XEN_CPUFEATURE(VAES, 6*32+ 9) /*A Vector AES Instrs */
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