git: 56b2358b2f68 - stable/13 - vmm: increase vlapic version
- Go to: [ bottom of page ] [ top of archives ] [ this month ]
Date: Thu, 22 Dec 2022 09:22:44 UTC
The branch stable/13 has been updated by corvink:
URL: https://cgit.FreeBSD.org/src/commit/?id=56b2358b2f68b1781b4a555b94a63d2792f27fcc
commit 56b2358b2f68b1781b4a555b94a63d2792f27fcc
Author: Corvin Köhne <c.koehne@beckhoff.com>
AuthorDate: 2022-10-10 12:56:00 +0000
Commit: Corvin Köhne <corvink@FreeBSD.org>
CommitDate: 2022-12-22 09:12:21 +0000
vmm: increase vlapic version
Mac os panics on apic versions lower than 0x14.
See https://opensource.apple.com/source/xnu/xnu-7195.81.3/osfmk/i386/lapic_native.c.auto.html
Additionally, an upcoming commit will validate the icr values written by
the guest. Older intel processors allow some different combinations than
the newer ones. AMD documents that only the newer combinations are
allowed. So, bumping the version allows us to avoid a differentiation
between AMD and Intel.
Intel documents that newer processors than the P6 are using the new
combinations. Sadly, Intel does not document which apic version belongs
to those processors. Linux identifies newer apics by a version larger or
equal to 0x14. Intel and AMD allow apic version between 0x10 and 0x15.
So, using 0x14 seems to be fine.
See https://github.com/torvalds/linux/blob/3eba620e7bd772a0c7dc91966cb107872b54a910/arch/x86/kernel/apic/apic.c#L238
Reviewed by: jhb
Differential Revision: https://reviews.freebsd.org/D36945
Sponsored by: Beckhoff Automation GmbH & Co. KG
(cherry picked from commit f56801d6d9777ba0a7e398d370bb755de8102697)
---
sys/amd64/vmm/io/vlapic.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/sys/amd64/vmm/io/vlapic.c b/sys/amd64/vmm/io/vlapic.c
index d2e60fc3baeb..d660b0a3f195 100644
--- a/sys/amd64/vmm/io/vlapic.c
+++ b/sys/amd64/vmm/io/vlapic.c
@@ -61,7 +61,7 @@ __FBSDID("$FreeBSD$");
#define PRIO(x) ((x) >> 4)
-#define VLAPIC_VERSION (16)
+#define VLAPIC_VERSION (0x14)
#define x2apic(vlapic) (((vlapic)->msr_apicbase & APICBASE_X2APIC) ? 1 : 0)