From nobody Wed Nov 24 06:41:54 2021 X-Original-To: dev-commits-src-all@mlmmj.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mlmmj.nyi.freebsd.org (Postfix) with ESMTP id 8946E18ABB34; Wed, 24 Nov 2021 06:41:57 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "R3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 4HzWdJ25Snz4kpl; Wed, 24 Nov 2021 06:41:55 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from gitrepo.freebsd.org (gitrepo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:5]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 2E58824D6D; Wed, 24 Nov 2021 06:41:54 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from gitrepo.freebsd.org ([127.0.1.44]) by gitrepo.freebsd.org (8.16.1/8.16.1) with ESMTP id 1AO6fssB037126; Wed, 24 Nov 2021 06:41:54 GMT (envelope-from git@gitrepo.freebsd.org) Received: (from git@localhost) by gitrepo.freebsd.org (8.16.1/8.16.1/Submit) id 1AO6fsNW037125; Wed, 24 Nov 2021 06:41:54 GMT (envelope-from git) Date: Wed, 24 Nov 2021 06:41:54 GMT Message-Id: <202111240641.1AO6fsNW037125@gitrepo.freebsd.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-main@FreeBSD.org From: Wojciech Macek Subject: git: 89595c17915a - main - vscphy: Add support for PHY interrupts List-Id: Commit messages for all branches of the src repository List-Archive: https://lists.freebsd.org/archives/dev-commits-src-all List-Help: List-Post: List-Subscribe: List-Unsubscribe: Sender: owner-dev-commits-src-all@freebsd.org X-BeenThere: dev-commits-src-all@freebsd.org MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit X-Git-Committer: wma X-Git-Repository: src X-Git-Refname: refs/heads/main X-Git-Reftype: branch X-Git-Commit: 89595c17915a11779de050b05ee7a5da09fc7f97 Auto-Submitted: auto-generated ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1637736116; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=e3paHnI6F+mof6HiQu9nzk19L+YDaUkspNMC02ZlPSI=; b=JwhmnxxfrxUFhMju75fjBIm9A+Ocl80vqZl6WA3T9sl9qWGge79Yz9id+LdsxM87QdSYza kJFFKG9pS//IokDkQ1oqiE2ARycQTi7iZfOATgVBb6COUFHgiRtq6fcaJUt2Yj4BkHbsOU kON9n/H7SW8GcfVU+4pN61LTZqCeOEIu1uqCgvlkEYBbotz2pjPK96q0C9htcKWKHPjvla IFbErh1/8rqGkjTYPiFr8d2G1i/bVHBuhs0Nn3lX4JfRiaobCcE9JF2MV3tmElLpxxUkaf TQgzm7bB2mpLO+g6MANJdvWBX/agNHwQx21Ffx9nG66QzVg3mtrPsDwnLgSaQQ== ARC-Seal: i=1; s=dkim; d=freebsd.org; t=1637736116; a=rsa-sha256; cv=none; b=eEmO2QiD+Cql/8HPKqOddR6mcF2dRdFq+pkD8OAKhVbtmbVHrHYJ0In1OiGBHOXF/fFpxn af2Tiynbs9W8DO0B2tguoxVBXpT+GVlTJG0CCHpJHWaY/nR9cbS/SHlv67ZaXGIHNlNXeZ fgjEuM0A66XZdsAyPU+TCeX67uJ/6D3AjDl1EpYFuqlpIzpc1d1y+ksMbazUxcfw8OOBdF 8v0LD5KAUkTG6SDjs0yW4X6v9WEbi6WRtbxlc1CE3LxyRreOnnPcpU1wfTXvjMWJ62N/Aq OEPTrmzobGzuj7tmCIXay9dgvbXzi0YzQDUyi+iLPL1MXb6aFVWqQGXA9c42TA== ARC-Authentication-Results: i=1; mx1.freebsd.org; none X-ThisMailContainsUnwantedMimeParts: N The branch main has been updated by wma: URL: https://cgit.FreeBSD.org/src/commit/?id=89595c17915a11779de050b05ee7a5da09fc7f97 commit 89595c17915a11779de050b05ee7a5da09fc7f97 Author: Kornel Duleba AuthorDate: 2021-11-15 09:00:07 +0000 Commit: Wojciech Macek CommitDate: 2021-11-24 06:40:37 +0000 vscphy: Add support for PHY interrupts They're allocated using standard newbus API, which means that we rely on miibus to handle the allocation. Add VSC8504 to the list of supported PHYs, as it is similar enough to the VSC8501 that is already supported by this driver. Obtained from: Semihalf Sponsored by: Alstom Group Differential revision: https://reviews.freebsd.org/D32816 --- sys/dev/mii/miidevs | 1 + sys/dev/mii/vscphy.c | 75 +++++++++++++++++++++++++++++++++++++++++++++++++++- 2 files changed, 75 insertions(+), 1 deletion(-) diff --git a/sys/dev/mii/miidevs b/sys/dev/mii/miidevs index b2b446637b2e..0b818c2e6e2b 100644 --- a/sys/dev/mii/miidevs +++ b/sys/dev/mii/miidevs @@ -345,6 +345,7 @@ model xxTSC 78Q2121 0x0015 78Q2121 100BASE-TX media interface /* Vitesse Semiconductor (now Microsemi) */ model xxVITESSE VSC8501 0x0013 Vitesse VSC8501 10/100/1000TX PHY +model xxVITESSE VSC8504 0x000c Vitesse VSC8504 10/100/1000TX PHY model xxVITESSE VSC8641 0x0003 Vitesse VSC8641 10/100/1000TX PHY /* XaQti Corp. PHYs */ diff --git a/sys/dev/mii/vscphy.c b/sys/dev/mii/vscphy.c index be90145e6299..b91cb408dae7 100644 --- a/sys/dev/mii/vscphy.c +++ b/sys/dev/mii/vscphy.c @@ -43,6 +43,8 @@ __FBSDID("$FreeBSD$"); #include #include #include +#include +#include #include #include @@ -59,12 +61,23 @@ __FBSDID("$FreeBSD$"); #include #endif +#define BIT(x) (1 << (x)) + /* Vitesse VSC8501 */ #define VSC8501_EXTPAGE_REG 0x001f #define VSC8501_EXTCTL1_REG 0x0017 #define VSC8501_EXTCTL1_RGMII_MODE (1u << 12) +#define VSC8501_INT_MASK 0x19 +#define VSC8501_INT_MDINT BIT(15) +#define VSC8501_INT_SPD_CHG BIT(14) +#define VSC8501_INT_LINK_CHG BIT(13) +#define VSC8501_INT_FD_CHG BIT(12) +#define VSC8501_INT_AN_CMPL BIT(10) + +#define VSC8501_INT_STS 0x1a + #define VSC8501_RGMII_CTRL_PAGE 0x02 #define VSC8501_RGMII_CTRL_REG 0x14 #define VSC8501_RGMII_DELAY_MASK 0x07 @@ -83,6 +96,8 @@ struct vscphy_softc { int rxdelay; int txdelay; bool laneswap; + struct resource *irq_res; + void *irq_cookie; }; static void vscphy_reset(struct mii_softc *); @@ -90,6 +105,7 @@ static int vscphy_service(struct mii_softc *, struct mii_data *, int); static const struct mii_phydesc vscphys[] = { MII_PHY_DESC(xxVITESSE, VSC8501), + MII_PHY_DESC(xxVITESSE, VSC8504), MII_PHY_END }; @@ -235,10 +251,30 @@ vscphy_probe(device_t dev) return (mii_phy_dev_probe(dev, vscphys, BUS_PROBE_DEFAULT)); } +static void +vscphy_intr(void *arg) +{ + struct vscphy_softc *vsc; + uint32_t status; + + vsc = (struct vscphy_softc *)arg; + + status = vscphy_read(vsc, VSC8501_INT_STS); + status &= vscphy_read(vsc, VSC8501_INT_MASK); + + if (!status) + return; + + PHY_STATUS(&vsc->mii_sc); + mii_phy_update(&vsc->mii_sc, MII_MEDIACHG); +} + static int vscphy_attach(device_t dev) { struct vscphy_softc *vsc; + uint32_t value; + int rid, error; vsc = device_get_softc(dev); vsc->dev = dev; @@ -250,14 +286,51 @@ vscphy_attach(device_t dev) mii_phy_dev_attach(dev, MIIF_NOMANPAUSE, &vscphy_funcs, 1); mii_phy_setmedia(&vsc->mii_sc); + rid = 0; + vsc->irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, + RF_ACTIVE | RF_SHAREABLE); + if (vsc->irq_res == NULL) + goto no_irq; + + error = bus_setup_intr(dev, vsc->irq_res, INTR_TYPE_NET | INTR_MPSAFE, + NULL, vscphy_intr, vsc, &vsc->irq_cookie); + if (error != 0) { + bus_release_resource(dev, SYS_RES_IRQ, 0, vsc->irq_res); + vsc->irq_res = NULL; + goto no_irq; + } + + /* Ack and unmask all relevant interrupts. */ + (void)vscphy_read(vsc, VSC8501_INT_STS); + value = VSC8501_INT_MDINT | + VSC8501_INT_SPD_CHG | + VSC8501_INT_LINK_CHG | + VSC8501_INT_FD_CHG | + VSC8501_INT_AN_CMPL; + vscphy_write(vsc, VSC8501_INT_MASK, value); + +no_irq: return (0); } +static int +vscphy_detach(device_t dev) +{ + struct vscphy_softc *vsc; + + vsc = device_get_softc(dev); + + bus_teardown_intr(dev, vsc->irq_res, vsc->irq_cookie); + bus_release_resource(dev, SYS_RES_IRQ, 0, vsc->irq_res); + + return (mii_phy_detach(dev)); +} + static device_method_t vscphy_methods[] = { /* device interface */ DEVMETHOD(device_probe, vscphy_probe), DEVMETHOD(device_attach, vscphy_attach), - DEVMETHOD(device_detach, mii_phy_detach), + DEVMETHOD(device_detach, vscphy_detach), DEVMETHOD(device_shutdown, bus_generic_shutdown), DEVMETHOD_END };