git: 8adc24f7c563 - stable/13 - USB dwc3 controller: add quirk snps,dis_rxdet_inp3_quirk

The branch stable/13 has been updated by bz:

URL: https://cgit.FreeBSD.org/src/commit/?id=8adc24f7c563637b94a78399d670824e01029045

commit 8adc24f7c563637b94a78399d670824e01029045
Author:     Bjoern A. Zeeb <bz@FreeBSD.org>
AuthorDate: 2021-11-10 00:22:20 +0000
Commit:     Bjoern A. Zeeb <bz@FreeBSD.org>
CommitDate: 2021-12-29 16:02:51 +0000

    USB dwc3 controller: add quirk snps,dis_rxdet_inp3_quirk
    
    Add support for the "snps,dis_rxdet_inp3_quirk" quirk needed
    at least on SolidRun's HoneyComb.
    
    Reviewed by:    manu, mw
    Differential Revision: https://reviews.freebsd.org/D32921
    
    (cherry picked from commit 3987e506112a7e8af6f09966792fb8656d630496)
---
 sys/dev/usb/controller/dwc3.c | 10 ++++++----
 sys/dev/usb/controller/dwc3.h |  1 +
 2 files changed, 7 insertions(+), 4 deletions(-)

diff --git a/sys/dev/usb/controller/dwc3.c b/sys/dev/usb/controller/dwc3.c
index 54c42503f2d4..d4422caf0fcd 100644
--- a/sys/dev/usb/controller/dwc3.c
+++ b/sys/dev/usb/controller/dwc3.c
@@ -264,11 +264,13 @@ snps_dwc3_do_quirks(struct snps_dwc3_softc *sc)
 		reg |= DWC3_GUCTL1_TX_IPGAP_LINECHECK_DIS;
 	DWC3_WRITE(sc, DWC3_GUCTL1, reg);
 
-	if (OF_hasprop(sc->node, "snps,dis-del-phy-power-chg-quirk")) {
-		reg = DWC3_READ(sc, DWC3_GUSB3PIPECTL0);
+	reg = DWC3_READ(sc, DWC3_GUSB3PIPECTL0);
+	if (OF_hasprop(sc->node, "snps,dis-del-phy-power-chg-quirk"))
 		reg |= DWC3_GUSB3PIPECTL0_DELAYP1TRANS;
-		DWC3_WRITE(sc, DWC3_GUSB3PIPECTL0, reg);
-	}
+	if (OF_hasprop(sc->node, "snps,dis_rxdet_inp3_quirk"))
+		reg |= DWC3_GUSB3PIPECTL0_DISRXDETINP3;
+	DWC3_WRITE(sc, DWC3_GUSB3PIPECTL0, reg);
+
 }
 
 static int
diff --git a/sys/dev/usb/controller/dwc3.h b/sys/dev/usb/controller/dwc3.h
index 7153f9abf0df..a8b127cda9a8 100644
--- a/sys/dev/usb/controller/dwc3.h
+++ b/sys/dev/usb/controller/dwc3.h
@@ -90,6 +90,7 @@
 
 #define	DWC3_GUSB3PIPECTL0			0xc2c0
 #define	 DWC3_GUSB3PIPECTL0_PHYSOFTRST		(1 << 31)
+#define	 DWC3_GUSB3PIPECTL0_DISRXDETINP3	(1 << 28)
 #define	 DWC3_GUSB3PIPECTL0_DELAYP1TRANS	(1 << 18)
 
 #define	DWC3_GTXFIFOSIZ(x)	(0xc300 + 0x4 * (x))