git: f4206bd52007 - main - devel/llvm1[0123456]: Fix build

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From: Muhammad Moinur Rahman <bofh_at_FreeBSD.org>
Date: Sun, 31 Dec 2023 22:59:43 UTC
The branch main has been updated by bofh:

URL: https://cgit.FreeBSD.org/ports/commit/?id=f4206bd5200729a5d2263fb3ba5f662700f16c70

commit f4206bd5200729a5d2263fb3ba5f662700f16c70
Author:     Muhammad Moinur Rahman <bofh@FreeBSD.org>
AuthorDate: 2023-12-31 22:23:01 +0000
Commit:     Muhammad Moinur Rahman <bofh@FreeBSD.org>
CommitDate: 2023-12-31 22:36:45 +0000

    devel/llvm1[0123456]: Fix build
    
    After the EOL of stable/12 sparc related codes were removed which broke
    the build. This patches fixes those builds and also the consumers.
    
    Thanks to dim@ for tha patches.
    
    Approved by:    portmgr (blanket)
---
 devel/llvm10/Makefile | 3 ++-
 devel/llvm11/Makefile | 3 ++-
 devel/llvm12/Makefile | 3 ++-
 devel/llvm13/Makefile | 3 ++-
 devel/llvm14/Makefile | 3 ++-
 devel/llvm15/Makefile | 3 ++-
 devel/llvm16/Makefile | 5 +++--
 7 files changed, 15 insertions(+), 8 deletions(-)

diff --git a/devel/llvm10/Makefile b/devel/llvm10/Makefile
index a5e18a409c58..dbdf39b9f2db 100644
--- a/devel/llvm10/Makefile
+++ b/devel/llvm10/Makefile
@@ -296,7 +296,7 @@ FREEBSD_BACKENDS+=	AMDGPU
 NATIVE_BACKENDS+=	AMDGPU
 .endif
 STANDARD_BACKENDS=	${_FREEBSD_BACKENDS} AMDGPU BPF Hexagon Lanai MSP430 \
-			NVPTX SystemZ WebAssembly XCore
+			NVPTX Sparc SystemZ WebAssembly XCore
 _BE_LIBS_COMMON=	CodeGen Desc Info
 _BE_LIBS_AArch64=	AsmParser Disassembler Utils
 _BE_LIBS_AMDGPU=	AsmParser Disassembler Utils
@@ -308,6 +308,7 @@ _BE_LIBS_MSP430=	AsmParser Disassembler
 _BE_LIBS_Mips=		AsmParser Disassembler
 _BE_LIBS_PowerPC=	AsmParser Disassembler
 _BE_LIBS_RISCV=		AsmParser Disassembler Utils
+_BE_LIBS_Sparc=		AsmParser Disassembler
 _BE_LIBS_SystemZ=	AsmParser Disassembler
 _BE_LIBS_WebAssembly=	AsmParser Disassembler
 _BE_LIBS_X86=		AsmParser Disassembler Utils
diff --git a/devel/llvm11/Makefile b/devel/llvm11/Makefile
index cbb1e5076184..28a6c7677fbd 100644
--- a/devel/llvm11/Makefile
+++ b/devel/llvm11/Makefile
@@ -301,7 +301,7 @@ FREEBSD_BACKENDS+=	WebAssembly
 NATIVE_BACKENDS+=	WebAssembly
 .endif
 STANDARD_BACKENDS=	${_FREEBSD_BACKENDS} AMDGPU AVR BPF Hexagon Lanai \
-			MSP430 NVPTX SystemZ WebAssembly XCore
+			MSP430 NVPTX Sparc SystemZ WebAssembly XCore
 _BE_LIBS_COMMON=	CodeGen Desc Info
 _BE_LIBS_AArch64=	AsmParser Disassembler Utils
 _BE_LIBS_AMDGPU=	AsmParser Disassembler Utils
@@ -314,6 +314,7 @@ _BE_LIBS_MSP430=	AsmParser Disassembler
 _BE_LIBS_Mips=		AsmParser Disassembler
 _BE_LIBS_PowerPC=	AsmParser Disassembler
 _BE_LIBS_RISCV=		AsmParser Disassembler Utils
+_BE_LIBS_Sparc=		AsmParser Disassembler
 _BE_LIBS_SystemZ=	AsmParser Disassembler
 _BE_LIBS_WebAssembly=	AsmParser Disassembler
 _BE_LIBS_X86=		AsmParser Disassembler
diff --git a/devel/llvm12/Makefile b/devel/llvm12/Makefile
index 1eea2ed89d49..abb563ef1184 100644
--- a/devel/llvm12/Makefile
+++ b/devel/llvm12/Makefile
@@ -307,7 +307,7 @@ FREEBSD_BACKENDS+=	WebAssembly
 NATIVE_BACKENDS+=	WebAssembly
 .endif
 STANDARD_BACKENDS=	${_FREEBSD_BACKENDS} AMDGPU AVR BPF Hexagon Lanai \
-			MSP430 NVPTX SystemZ WebAssembly XCore
+			MSP430 NVPTX Sparc SystemZ WebAssembly XCore
 _BE_LIBS_COMMON=	CodeGen Desc Info
 _BE_LIBS_AArch64=	AsmParser Disassembler Utils
 _BE_LIBS_AMDGPU=	AsmParser Disassembler Utils
@@ -320,6 +320,7 @@ _BE_LIBS_MSP430=	AsmParser Disassembler
 _BE_LIBS_Mips=		AsmParser Disassembler
 _BE_LIBS_PowerPC=	AsmParser Disassembler
 _BE_LIBS_RISCV=		AsmParser Disassembler
+_BE_LIBS_Sparc=		AsmParser Disassembler
 _BE_LIBS_SystemZ=	AsmParser Disassembler
 _BE_LIBS_WebAssembly=	AsmParser Disassembler
 _BE_LIBS_X86=		AsmParser Disassembler
diff --git a/devel/llvm13/Makefile b/devel/llvm13/Makefile
index 31cff030c327..a06a8c6be1c1 100644
--- a/devel/llvm13/Makefile
+++ b/devel/llvm13/Makefile
@@ -344,7 +344,7 @@ FREEBSD_BACKENDS+=	WebAssembly
 NATIVE_BACKENDS+=	WebAssembly
 .endif
 STANDARD_BACKENDS=	${_FREEBSD_BACKENDS} AMDGPU AVR BPF Hexagon Lanai \
-			MSP430 NVPTX SystemZ WebAssembly XCore
+			MSP430 NVPTX Sparc SystemZ WebAssembly XCore
 _BE_LIBS_COMMON=	CodeGen Desc Info
 _BE_LIBS_AArch64=	AsmParser Disassembler Utils
 _BE_LIBS_BACKWARDS_AArch64=Exegesis
@@ -361,6 +361,7 @@ _BE_LIBS_BACKWARDS_Mips=Exegesis
 _BE_LIBS_PowerPC=	AsmParser Disassembler
 _BE_LIBS_BACKWARDS_PowerPC=Exegesis
 _BE_LIBS_RISCV=		AsmParser Disassembler
+_BE_LIBS_Sparc=		AsmParser Disassembler
 _BE_LIBS_SystemZ=	AsmParser Disassembler
 _BE_LIBS_WebAssembly=	AsmParser Disassembler Utils
 _BE_LIBS_X86=		AsmParser Disassembler
diff --git a/devel/llvm14/Makefile b/devel/llvm14/Makefile
index 6122e70de153..0199265136a0 100644
--- a/devel/llvm14/Makefile
+++ b/devel/llvm14/Makefile
@@ -347,7 +347,7 @@ FREEBSD_BACKENDS+=	WebAssembly
 NATIVE_BACKENDS+=	WebAssembly
 .endif
 STANDARD_BACKENDS=	${_FREEBSD_BACKENDS} AMDGPU AVR BPF Hexagon Lanai \
-			MSP430 NVPTX SystemZ VE WebAssembly XCore
+			MSP430 NVPTX Sparc SystemZ VE WebAssembly XCore
 _BE_LIBS_COMMON=	CodeGen Desc Info
 _BE_LIBS_AArch64=	AsmParser Disassembler Utils
 _BE_LIBS_BACKWARDS_AArch64=Exegesis
@@ -365,6 +365,7 @@ _BE_LIBS_PowerPC=	AsmParser Disassembler
 _BE_LIBS_BACKWARDS_PowerPC=Exegesis
 _BE_INCS_RISCV=		riscv_vector.h
 _BE_LIBS_RISCV=		AsmParser Disassembler
+_BE_LIBS_Sparc=		AsmParser Disassembler
 _BE_LIBS_SystemZ=	AsmParser Disassembler
 _BE_LIBS_VE=		AsmParser Disassembler
 _BE_LIBS_WebAssembly=	AsmParser Disassembler Utils
diff --git a/devel/llvm15/Makefile b/devel/llvm15/Makefile
index fd0b151d1260..3489ca09a29a 100644
--- a/devel/llvm15/Makefile
+++ b/devel/llvm15/Makefile
@@ -369,7 +369,7 @@ FREEBSD_BACKENDS+=	WebAssembly
 NATIVE_BACKENDS+=	WebAssembly
 .endif
 STANDARD_BACKENDS=	${_FREEBSD_BACKENDS} AMDGPU AVR BPF Hexagon Lanai \
-			MSP430 NVPTX SystemZ VE WebAssembly XCore
+			MSP430 NVPTX Sparc SystemZ VE WebAssembly XCore
 _BE_LIBS_COMMON=	CodeGen Desc Info
 _BE_LIBS_AArch64=	AsmParser Disassembler Utils
 _BE_LIBS_BACKWARDS_AArch64=Exegesis
@@ -387,6 +387,7 @@ _BE_LIBS_PowerPC=	AsmParser Disassembler
 _BE_LIBS_BACKWARDS_PowerPC=Exegesis
 _BE_INCS_RISCV=		riscv_vector.h
 _BE_LIBS_RISCV=		AsmParser Disassembler
+_BE_LIBS_Sparc=		AsmParser Disassembler
 _BE_LIBS_SystemZ=	AsmParser Disassembler
 _BE_LIBS_VE=		AsmParser Disassembler
 _BE_LIBS_WebAssembly=	AsmParser Disassembler Utils
diff --git a/devel/llvm16/Makefile b/devel/llvm16/Makefile
index 4b02d0468ce2..ae644f2d3a4f 100644
--- a/devel/llvm16/Makefile
+++ b/devel/llvm16/Makefile
@@ -346,7 +346,7 @@ CMAKE_ARGS+=	-DLLVM_ENABLE_PROJECTS="${LLVM_ENABLE_PROJECTS:ts;}"
 .include "${.CURDIR}/Makefile.COMMANDS"
 .include "${.CURDIR}/Makefile.MAN1SRCS"
 
-_FREEBSD_BACKENDS=	AArch64 ARM Mips PowerPC RISCV X86
+_FREEBSD_BACKENDS=	AArch64 ARM Mips PowerPC RISCV Sparc X86
 FREEBSD_BACKENDS=	${_FREEBSD_BACKENDS}
 .if ${ARCH} == amd64
 _NATIVE_BACKENDS=	X86
@@ -373,7 +373,7 @@ FREEBSD_BACKENDS+=	WebAssembly
 NATIVE_BACKENDS+=	WebAssembly
 .endif
 STANDARD_BACKENDS=	${_FREEBSD_BACKENDS} AMDGPU AVR BPF Hexagon Lanai \
-			LoongArch MSP430 NVPTX SystemZ VE WebAssembly XCore
+			LoongArch MSP430 NVPTX Sparc SystemZ VE WebAssembly XCore
 _BE_LIBS_COMMON=	CodeGen Desc Info
 _BE_LIBS_AArch64=	AsmParser Disassembler Utils
 _BE_LIBS_BACKWARDS_AArch64=Exegesis
@@ -392,6 +392,7 @@ _BE_LIBS_PowerPC=	AsmParser Disassembler
 _BE_LIBS_BACKWARDS_PowerPC=Exegesis
 _BE_INCS_RISCV=		riscv_vector.h
 _BE_LIBS_RISCV=		AsmParser Disassembler TargetMCA
+_BE_LIBS_Sparc=		AsmParser Disassembler
 _BE_LIBS_SystemZ=	AsmParser Disassembler
 _BE_LIBS_VE=		AsmParser Disassembler
 _BE_LIBS_WebAssembly=	AsmParser Disassembler Utils