git: b8d7249f6d80 - main - math/viennacl: back to the pool.

The branch main has been updated by pfg:

URL: https://cgit.FreeBSD.org/ports/commit/?id=b8d7249f6d80bb1c55cd0a5f28a3fc307b2da2f9

commit b8d7249f6d80bb1c55cd0a5f28a3fc307b2da2f9
Author:     Pedro F. Giffuni <pfg@FreeBSD.org>
AuthorDate: 2022-02-20 20:51:11 +0000
Commit:     Pedro F. Giffuni <pfg@FreeBSD.org>
CommitDate: 2022-02-20 20:55:31 +0000

    math/viennacl: back to the pool.
    
    This doesn't seem to require much maintainance.
    Clean whitespaces while here.
    
    Approved by:    thierry (mentor, implicit)
---
 math/viennacl/Makefile  |  2 +-
 math/viennacl/pkg-descr | 10 +++++-----
 2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/math/viennacl/Makefile b/math/viennacl/Makefile
index d10341decf3d..fa3cf44b0b1e 100644
--- a/math/viennacl/Makefile
+++ b/math/viennacl/Makefile
@@ -7,7 +7,7 @@ CATEGORIES=	math
 MASTER_SITES=	SF/${PORTNAME}/1.7.x/
 DISTNAME=	ViennaCL-${PORTVERSION}
 
-MAINTAINER=	pfg@FreeBSD.org
+MAINTAINER=	ports@FreeBSD.org
 COMMENT=	Linear algebra and solver library using CUDA, OpenCL, and OpenMP
 
 LICENSE=	MIT
diff --git a/math/viennacl/pkg-descr b/math/viennacl/pkg-descr
index 1e3d3a480ba5..8311dddf35d7 100644
--- a/math/viennacl/pkg-descr
+++ b/math/viennacl/pkg-descr
@@ -1,14 +1,14 @@
-ViennaCL is a free open-source linear algebra library for computations on 
-many-core architectures (GPUs, MIC) and multi-core CPUs. The library is 
-written in C++ and supports CUDA, OpenCL, and OpenMP (including switches 
+ViennaCL is a free open-source linear algebra library for computations on
+many-core architectures (GPUs, MIC) and multi-core CPUs. The library is
+written in C++ and supports CUDA, OpenCL, and OpenMP (including switches
 at runtime).
 
 The highlights of the latest 1.7.x release family are:
 
 * Fast sparse matrix-matrix multiplications, outperforming CUBLAS and MKL.
-* Fine-grained parallel algebraic multigrid preconditioners for CPUs, Xeon 
+* Fine-grained parallel algebraic multigrid preconditioners for CPUs, Xeon
     Phis, and GPUs.
-* Fine-grained parallel incomplete LU factorization preconditioners for 
+* Fine-grained parallel incomplete LU factorization preconditioners for
     CPUs, Xeon Phis, and GPUs.
 
 WWW: http://viennacl.sourceforge.net/