git: d1e993405166 - 2025Q2 - graphics/mesa-devel: add aarch64 workaround from graphics/mesa-dri
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Date: Thu, 01 May 2025 19:46:29 UTC
The branch 2025Q2 has been updated by jbeich:
URL: https://cgit.FreeBSD.org/ports/commit/?id=d1e99340516630e4d005d713d53ff3f7e762e62b
commit d1e99340516630e4d005d713d53ff3f7e762e62b
Author: Jan Beich <jbeich@FreeBSD.org>
AuthorDate: 2025-05-01 19:22:15 +0000
Commit: Jan Beich <jbeich@FreeBSD.org>
CommitDate: 2025-05-01 19:46:07 +0000
graphics/mesa-devel: add aarch64 workaround from graphics/mesa-dri
In file included from ../src/gallium/winsys/sw/dri/dri_sw_winsys.c:50:
In file included from ../src/gallium/include/pipe/p_state.h:47:
../src/util/u_memory.h:87:9: warning: 'CACHE_LINE_SIZE' macro redefined [-Wmacro-redefined]
87 | #define CACHE_LINE_SIZE 64
| ^
/usr/include/machine/param.h:85:9: note: previous definition is here
85 | #define CACHE_LINE_SIZE (1 << CACHE_LINE_SHIFT)
| ^
PR: 286509
Reported by: Evgenii Khramtsov
(cherry picked from commit f296f826e71ed420f9e67b65e4f6705eb192cc38)
---
graphics/mesa-devel/Makefile | 1 +
graphics/mesa-devel/files/patch-cache_line | 51 ++++++++++++++++++++++++++++++
2 files changed, 52 insertions(+)
diff --git a/graphics/mesa-devel/Makefile b/graphics/mesa-devel/Makefile
index fd7efece0723..c41ecffe8482 100644
--- a/graphics/mesa-devel/Makefile
+++ b/graphics/mesa-devel/Makefile
@@ -1,6 +1,7 @@
PORTNAME= mesa
DISTVERSION= 25.0-branchpoint-2650
DISTVERSIONSUFFIX= -gee0ee2a3174
+PORTREVISION= 1
CATEGORIES= graphics
PKGNAMESUFFIX= -devel
diff --git a/graphics/mesa-devel/files/patch-cache_line b/graphics/mesa-devel/files/patch-cache_line
new file mode 100644
index 000000000000..f9dd96a31056
--- /dev/null
+++ b/graphics/mesa-devel/files/patch-cache_line
@@ -0,0 +1,51 @@
+https://gitlab.freedesktop.org/mesa/mesa/-/issues/5737
+
+--- src/gallium/winsys/amdgpu/drm/amdgpu_bo.c.orig 2025-04-21 22:23:33 UTC
++++ src/gallium/winsys/amdgpu/drm/amdgpu_bo.c
+@@ -833,7 +833,7 @@ struct pb_slab *amdgpu_bo_slab_alloc(void *priv, unsig
+ slab_bo->slab.group_index = group_index;
+ slab_bo->slab.entry_size = entry_size;
+ slab_bo->entries = os_malloc_aligned(slab_bo->slab.num_entries * sizeof(*slab_bo->entries),
+- CACHE_LINE_SIZE);
++ MESA_CACHE_LINE_SIZE);
+ if (!slab_bo->entries)
+ goto fail;
+
+--- src/util/u_memory.h.orig 2025-04-21 22:23:33 UTC
++++ src/util/u_memory.h
+@@ -84,7 +84,7 @@ mem_dup(const void *src, size_t size)
+ }
+
+ /* TODO: this could be different on non-x86 architectures. */
+-#define CACHE_LINE_SIZE 64
++#define MESA_CACHE_LINE_SIZE 64
+
+ /**
+ * Declare a variable on its own cache line.
+@@ -101,12 +101,12 @@ mem_dup(const void *src, size_t size)
+ * aligned, but we only want to align the field.
+ */
+ #define EXCLUSIVE_CACHELINE(decl) \
+- union { char __cl_space[CACHE_LINE_SIZE]; \
++ union { char __cl_space[MESA_CACHE_LINE_SIZE]; \
+ decl; }
+
+ /* Allocate a structure aligned to a cache line. (used to make atomic ops faster) */
+-#define MALLOC_STRUCT_CL(T) (struct T *)align_malloc(sizeof(struct T), CACHE_LINE_SIZE)
+-#define CALLOC_STRUCT_CL(T) (struct T *)align_calloc(sizeof(struct T), CACHE_LINE_SIZE)
++#define MALLOC_STRUCT_CL(T) (struct T *)align_malloc(sizeof(struct T), MESA_CACHE_LINE_SIZE)
++#define CALLOC_STRUCT_CL(T) (struct T *)align_calloc(sizeof(struct T), MESA_CACHE_LINE_SIZE)
+ #define FREE_CL(ptr) align_free(ptr)
+
+ #ifdef __cplusplus
+--- src/vulkan/vram-report-limit-layer/vram_report_limit_layer.c.orig 2025-04-21 22:23:33 UTC
++++ src/vulkan/vram-report-limit-layer/vram_report_limit_layer.c
+@@ -447,7 +447,7 @@ vram_report_limit_CreateInstance(const VkInstanceCreat
+ struct vram_report_limit_instance_data *instance_data = os_malloc_aligned(
+ sizeof(*instance_data) + sizeof(instance_data->active_pdevices_array[0]) *
+ active_pdevices_count,
+- CACHE_LINE_SIZE);
++ MESA_CACHE_LINE_SIZE);
+ if (instance_data == NULL) {
+ result = VK_ERROR_OUT_OF_HOST_MEMORY;
+ goto err_free_is_pdevice_active_array;