git: 16f011f75544 - main - databases/py-pylance: fix build on powerpc64*
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Date: Thu, 24 Sep 2026 12:54:36 UTC
The branch main has been updated by pkubaj:
URL: https://cgit.FreeBSD.org/ports/commit/?id=16f011f755445b58e63f10ecd7be1b2351a5ce58
commit 16f011f755445b58e63f10ecd7be1b2351a5ce58
Author: Piotr Kubaj <pkubaj@FreeBSD.org>
AuthorDate: 2026-09-23 19:01:54 +0000
Commit: Piotr Kubaj <pkubaj@FreeBSD.org>
CommitDate: 2026-09-24 12:53:55 +0000
databases/py-pylance: fix build on powerpc64*
1. Merge https://github.com/lance-format/lance/pull/9446 to fix build
on powerpc64*.
2. Add missing TEST_DEPENDS.
---
databases/py-pylance/Makefile | 7 +-
.../files/patch-rust_lance-linalg_build.rs | 25 ++
.../files/patch-rust_lance-linalg_src_simd_f32.rs | 406 +++++++++++++++++++++
.../files/patch-rust_lance-linalg_src_simd_f64.rs | 371 +++++++++++++++++++
.../files/patch-rust_lance-linalg_src_simd_i32.rs | 192 ++++++++++
5 files changed, 999 insertions(+), 2 deletions(-)
diff --git a/databases/py-pylance/Makefile b/databases/py-pylance/Makefile
index 6bed6aa00ef4..42a6b2f403d4 100644
--- a/databases/py-pylance/Makefile
+++ b/databases/py-pylance/Makefile
@@ -19,11 +19,14 @@ BUILD_DEPENDS= ${LOCALBASE}/bin/protoc:devel/protobuf \
${PYTHON_PKGNAMEPREFIX}maturin>=1.4:devel/py-maturin@${PY_FLAVOR}
RUN_DEPENDS= ${PYTHON_PKGNAMEPREFIX}lance-namespace>=0.8.5:databases/py-lance-namespace@${PY_FLAVOR} \
${PYTHON_PKGNAMEPREFIX}numpy>=1.22:math/py-numpy@${PY_FLAVOR} \
- ${PYTHON_PKGNAMEPREFIX}pyarrow>=14:databases/py-pyarrow@${PY_FLAVOR}
+ ${PYTHON_PKGNAMEPREFIX}pyarrow>=14:databases/py-pyarrow@${PY_FLAVOR} \
+ ${PYTHON_PKGNAMEPREFIX}sqlite3>0:databases/py-sqlite3@${PY_FLAVOR}
TEST_DEPENDS= ${PYTHON_PKGNAMEPREFIX}duckdb>=1.5.0:databases/py-duckdb@${PY_FLAVOR} \
${PYTHON_PKGNAMEPREFIX}ml-dtypes>=0:math/py-ml-dtypes@${PY_FLAVOR} \
+ ${PYTHON_PKGNAMEPREFIX}pillow>0:graphics/py-pillow@${PY_FLAVOR} \
${PYTHON_PKGNAMEPREFIX}polars>=0:misc/py-polars@${PY_FLAVOR} \
- ${PYTHON_PKGNAMEPREFIX}pytest-xdist>=0:devel/py-pytest-xdist@${PY_FLAVOR}
+ ${PYTHON_PKGNAMEPREFIX}pytest-xdist>=0:devel/py-pytest-xdist@${PY_FLAVOR} \
+ ${PYTHON_PKGNAMEPREFIX}tqdm>0:misc/py-tqdm@${PY_FLAVOR}
USES= cargo python
USE_PYTHON= pep517 concurrent autoplist pytest
diff --git a/databases/py-pylance/files/patch-rust_lance-linalg_build.rs b/databases/py-pylance/files/patch-rust_lance-linalg_build.rs
new file mode 100644
index 000000000000..005cfbf449eb
--- /dev/null
+++ b/databases/py-pylance/files/patch-rust_lance-linalg_build.rs
@@ -0,0 +1,25 @@
+-- Build on architectures without SIMD kernels (e.g. powerpc64le).
+-- https://github.com/lance-format/lance/pull/9446
+
+--- ../rust/lance-linalg/build.rs.orig 2026-08-30 19:56:29 UTC
++++ ../rust/lance-linalg/build.rs
+@@ -19,6 +19,7 @@ fn main() -> Result<(), String> {
+ println!(
+ "cargo::rustc-check-cfg=cfg(kernel_support, values(\"avx512_f16\", \"avx512_bf16\", \"avx512_dist_table\", \"amx_fp16\"))"
+ );
++ println!("cargo::rustc-check-cfg=cfg(simd_fallback)");
+
+ println!("cargo:rerun-if-changed=src/simd/f16.c");
+ println!("cargo:rerun-if-changed=src/simd/bf16.c");
+@@ -31,6 +32,11 @@ fn main() -> Result<(), String> {
+ // target_os.
+ let target_arch = env::var("CARGO_CFG_TARGET_ARCH").unwrap();
+ let target_os = env::var("CARGO_CFG_TARGET_OS").unwrap();
++
++ // Architectures without SIMD kernels back the vector types with plain arrays.
++ if !matches!(target_arch.as_str(), "x86_64" | "aarch64" | "loongarch64") {
++ println!("cargo:rustc-cfg=simd_fallback");
++ }
+
+ if target_os == "windows" {
+ println!(
diff --git a/databases/py-pylance/files/patch-rust_lance-linalg_src_simd_f32.rs b/databases/py-pylance/files/patch-rust_lance-linalg_src_simd_f32.rs
new file mode 100644
index 000000000000..d7ccbd994d4a
--- /dev/null
+++ b/databases/py-pylance/files/patch-rust_lance-linalg_src_simd_f32.rs
@@ -0,0 +1,406 @@
+-- Build on architectures without SIMD kernels (e.g. powerpc64le).
+-- https://github.com/lance-format/lance/pull/9446
+
+--- ../rust/lance-linalg/src/simd/f32.rs.orig 2026-08-30 19:56:29 UTC
++++ ../rust/lance-linalg/src/simd/f32.rs
+@@ -35,6 +35,11 @@ pub struct f32x8(v8f32);
+ #[derive(Clone, Copy)]
+ pub struct f32x8(v8f32);
+
++#[allow(non_camel_case_types)]
++#[cfg(simd_fallback)]
++#[derive(Clone, Copy)]
++pub struct f32x8([f32; 8]);
++
+ impl std::fmt::Debug for f32x8 {
+ fn fmt(&self, f: &mut Formatter<'_>) -> std::fmt::Result {
+ let mut arr = [0.0_f32; 8];
+@@ -119,6 +124,10 @@ impl f32x8 {
+ ];
+ Self::load_unaligned(values.as_ptr())
+ }
++ #[cfg(simd_fallback)]
++ {
++ Self(indices.map(|i| slice[i as usize]))
++ }
+ }
+ }
+
+@@ -177,6 +186,10 @@ impl SIMD<f32, 8> for f32x8 {
+ unsafe {
+ Self(transmute(lasx_xvreplgr2vr_w(transmute(val))))
+ }
++ #[cfg(simd_fallback)]
++ {
++ Self([val; 8])
++ }
+ }
+
+ fn zeros() -> Self {
+@@ -192,6 +205,10 @@ impl SIMD<f32, 8> for f32x8 {
+ {
+ Self::splat(0.0)
+ }
++ #[cfg(simd_fallback)]
++ {
++ Self::splat(0.0)
++ }
+ }
+
+ #[inline]
+@@ -208,6 +225,10 @@ impl SIMD<f32, 8> for f32x8 {
+ {
+ Self(transmute(lasx_xvld::<0>(transmute(ptr))))
+ }
++ #[cfg(simd_fallback)]
++ {
++ unsafe { Self::load_unaligned(ptr) }
++ }
+ }
+
+ #[inline]
+@@ -224,6 +245,10 @@ impl SIMD<f32, 8> for f32x8 {
+ {
+ Self(transmute(lasx_xvld::<0>(transmute(ptr))))
+ }
++ #[cfg(simd_fallback)]
++ {
++ unsafe { Self(std::ptr::read_unaligned(ptr as *const [f32; 8])) }
++ }
+ }
+
+ unsafe fn store(&self, ptr: *mut f32) {
+@@ -239,6 +264,10 @@ impl SIMD<f32, 8> for f32x8 {
+ unsafe {
+ lasx_xvst::<0>(transmute(self.0), transmute(ptr));
+ }
++ #[cfg(simd_fallback)]
++ {
++ unsafe { self.store_unaligned(ptr) }
++ }
+ }
+
+ unsafe fn store_unaligned(&self, ptr: *mut f32) {
+@@ -254,6 +283,10 @@ impl SIMD<f32, 8> for f32x8 {
+ unsafe {
+ lasx_xvst::<0>(transmute(self.0), transmute(ptr));
+ }
++ #[cfg(simd_fallback)]
++ {
++ unsafe { std::ptr::write_unaligned(ptr as *mut [f32; 8], self.0) }
++ }
+ }
+
+ #[inline]
+@@ -282,6 +315,10 @@ impl SIMD<f32, 8> for f32x8 {
+ {
+ self.as_array().iter().sum()
+ }
++ #[cfg(simd_fallback)]
++ {
++ self.0.iter().sum()
++ }
+ }
+
+ fn reduce_min(&self) -> f32 {
+@@ -315,6 +352,10 @@ impl SIMD<f32, 8> for f32x8 {
+ let m1 = lasx_xvpermi_w::<1>(transmute(m2), transmute(m2));
+ let m2 = lasx_xvfmin_s(transmute(m1), transmute(m2));
+ transmute(lasx_xvpickve2gr_w::<0>(transmute(m2)))
++ }
++ #[cfg(simd_fallback)]
++ {
++ self.0.iter().copied().fold(f32::INFINITY, f32::min)
+ }
+ }
+
+@@ -334,6 +375,10 @@ impl SIMD<f32, 8> for f32x8 {
+ unsafe {
+ Self(lasx_xvfmin_s(self.0, rhs.0))
+ }
++ #[cfg(simd_fallback)]
++ {
++ Self(std::array::from_fn(|i| self.0[i].min(rhs.0[i])))
++ }
+ }
+
+ fn find(&self, val: f32) -> Option<i32> {
+@@ -367,6 +412,12 @@ impl SIMD<f32, 8> for f32x8 {
+ }
+ }
+ }
++ #[cfg(simd_fallback)]
++ {
++ if let Some(i) = self.0.iter().position(|&v| v == val) {
++ return Some(i as i32);
++ }
++ }
+ None
+ }
+ }
+@@ -386,6 +437,12 @@ impl FloatSimd<f32, 8> for f32x8 {
+ unsafe {
+ self.0 = lasx_xvfmadd_s(a.0, b.0, self.0);
+ }
++ #[cfg(simd_fallback)]
++ {
++ for i in 0..8 {
++ self.0[i] = a.0[i].mul_add(b.0[i], self.0[i]);
++ }
++ }
+ }
+ }
+
+@@ -409,6 +466,10 @@ impl Add for f32x8 {
+ unsafe {
+ Self(lasx_xvfadd_s(self.0, rhs.0))
+ }
++ #[cfg(simd_fallback)]
++ {
++ Self(std::array::from_fn(|i| self.0[i] + rhs.0[i]))
++ }
+ }
+ }
+
+@@ -428,6 +489,12 @@ impl AddAssign for f32x8 {
+ unsafe {
+ self.0 = lasx_xvfadd_s(self.0, rhs.0);
+ }
++ #[cfg(simd_fallback)]
++ {
++ for i in 0..8 {
++ self.0[i] += rhs.0[i];
++ }
++ }
+ }
+ }
+
+@@ -451,6 +518,10 @@ impl Sub for f32x8 {
+ unsafe {
+ Self(lasx_xvfsub_s(self.0, rhs.0))
+ }
++ #[cfg(simd_fallback)]
++ {
++ Self(std::array::from_fn(|i| self.0[i] - rhs.0[i]))
++ }
+ }
+ }
+
+@@ -470,6 +541,12 @@ impl SubAssign for f32x8 {
+ unsafe {
+ self.0 = lasx_xvfsub_s(self.0, rhs.0);
+ }
++ #[cfg(simd_fallback)]
++ {
++ for i in 0..8 {
++ self.0[i] -= rhs.0[i];
++ }
++ }
+ }
+ }
+
+@@ -492,6 +569,10 @@ impl Mul for f32x8 {
+ #[cfg(target_arch = "loongarch64")]
+ unsafe {
+ Self(lasx_xvfmul_s(self.0, rhs.0))
++ }
++ #[cfg(simd_fallback)]
++ {
++ Self(std::array::from_fn(|i| self.0[i] * rhs.0[i]))
+ }
+ }
+ }
+@@ -521,6 +602,11 @@ pub struct f32x16(v8f32, v8f32);
+ #[derive(Clone, Copy)]
+ pub struct f32x16(v8f32, v8f32);
+
++#[allow(non_camel_case_types)]
++#[cfg(simd_fallback)]
++#[derive(Clone, Copy)]
++pub struct f32x16([f32; 16]);
++
+ impl std::fmt::Debug for f32x16 {
+ fn fmt(&self, f: &mut Formatter<'_>) -> std::fmt::Result {
+ let mut arr = [0.0_f32; 16];
+@@ -571,6 +657,10 @@ impl SIMD<f32, 16> for f32x16 {
+ transmute(lasx_xvreplgr2vr_w(transmute(val))),
+ )
+ }
++ #[cfg(simd_fallback)]
++ {
++ Self([val; 16])
++ }
+ }
+
+ #[inline]
+@@ -587,6 +677,10 @@ impl SIMD<f32, 16> for f32x16 {
+ {
+ Self::splat(0.0)
+ }
++ #[cfg(simd_fallback)]
++ {
++ Self::splat(0.0)
++ }
+ }
+
+ #[inline]
+@@ -606,6 +700,10 @@ impl SIMD<f32, 16> for f32x16 {
+ transmute(lasx_xvld::<32>(transmute(ptr))),
+ )
+ }
++ #[cfg(simd_fallback)]
++ {
++ unsafe { Self::load_unaligned(ptr) }
++ }
+ }
+
+ #[inline]
+@@ -625,6 +723,10 @@ impl SIMD<f32, 16> for f32x16 {
+ transmute(lasx_xvld::<32>(transmute(ptr))),
+ )
+ }
++ #[cfg(simd_fallback)]
++ {
++ unsafe { Self(std::ptr::read_unaligned(ptr as *const [f32; 16])) }
++ }
+ }
+
+ #[inline]
+@@ -643,6 +745,10 @@ impl SIMD<f32, 16> for f32x16 {
+ lasx_xvst::<0>(transmute(self.0), transmute(ptr));
+ lasx_xvst::<32>(transmute(self.1), transmute(ptr));
+ }
++ #[cfg(simd_fallback)]
++ {
++ unsafe { self.store_unaligned(ptr) }
++ }
+ }
+
+ #[inline]
+@@ -661,6 +767,10 @@ impl SIMD<f32, 16> for f32x16 {
+ lasx_xvst::<0>(transmute(self.0), transmute(ptr));
+ lasx_xvst::<32>(transmute(self.1), transmute(ptr));
+ }
++ #[cfg(simd_fallback)]
++ {
++ unsafe { std::ptr::write_unaligned(ptr as *mut [f32; 16], self.0) }
++ }
+ }
+
+ #[inline]
+@@ -691,6 +801,10 @@ impl SIMD<f32, 16> for f32x16 {
+ {
+ self.as_array().iter().sum()
+ }
++ #[cfg(simd_fallback)]
++ {
++ self.0.iter().sum()
++ }
+ }
+
+ #[inline]
+@@ -725,6 +839,10 @@ impl SIMD<f32, 16> for f32x16 {
+ let m1 = lasx_xvfmin_s(transmute(m1), transmute(m2));
+ transmute(lasx_xvpickve2gr_w::<0>(transmute(m1)))
+ }
++ #[cfg(simd_fallback)]
++ {
++ self.0.iter().copied().fold(f32::INFINITY, f32::min)
++ }
+ }
+
+ #[inline]
+@@ -746,6 +864,10 @@ impl SIMD<f32, 16> for f32x16 {
+ unsafe {
+ Self(lasx_xvfmin_s(self.0, rhs.0), lasx_xvfmin_s(self.1, rhs.1))
+ }
++ #[cfg(simd_fallback)]
++ {
++ Self(std::array::from_fn(|i| self.0[i].min(rhs.0[i])))
++ }
+ }
+
+ #[inline]
+@@ -792,6 +914,10 @@ impl SIMD<f32, 16> for f32x16 {
+ }
+ None
+ }
++ #[cfg(simd_fallback)]
++ {
++ self.0.iter().position(|&v| v == val).map(|i| i as i32)
++ }
+ }
+ }
+
+@@ -815,6 +941,12 @@ impl FloatSimd<f32, 16> for f32x16 {
+ self.0 = lasx_xvfmadd_s(a.0, b.0, self.0);
+ self.1 = lasx_xvfmadd_s(a.1, b.1, self.1);
+ }
++ #[cfg(simd_fallback)]
++ {
++ for i in 0..16 {
++ self.0[i] = a.0[i].mul_add(b.0[i], self.0[i]);
++ }
++ }
+ }
+ }
+
+@@ -840,6 +972,10 @@ impl Add for f32x16 {
+ unsafe {
+ Self(lasx_xvfadd_s(self.0, rhs.0), lasx_xvfadd_s(self.1, rhs.1))
+ }
++ #[cfg(simd_fallback)]
++ {
++ Self(std::array::from_fn(|i| self.0[i] + rhs.0[i]))
++ }
+ }
+ }
+
+@@ -862,6 +998,12 @@ impl AddAssign for f32x16 {
+ unsafe {
+ self.0 = lasx_xvfadd_s(self.0, rhs.0);
+ self.1 = lasx_xvfadd_s(self.1, rhs.1);
++ }
++ #[cfg(simd_fallback)]
++ {
++ for i in 0..16 {
++ self.0[i] += rhs.0[i];
++ }
+ }
+ }
+ }
+@@ -888,6 +1030,10 @@ impl Mul for f32x16 {
+ unsafe {
+ Self(lasx_xvfmul_s(self.0, rhs.0), lasx_xvfmul_s(self.1, rhs.1))
+ }
++ #[cfg(simd_fallback)]
++ {
++ Self(std::array::from_fn(|i| self.0[i] * rhs.0[i]))
++ }
+ }
+ }
+
+@@ -912,6 +1058,10 @@ impl Sub for f32x16 {
+ #[cfg(target_arch = "loongarch64")]
+ unsafe {
+ Self(lasx_xvfsub_s(self.0, rhs.0), lasx_xvfsub_s(self.1, rhs.1))
++ }
++ #[cfg(simd_fallback)]
++ {
++ Self(std::array::from_fn(|i| self.0[i] - rhs.0[i]))
+ }
+ }
+ }
+@@ -936,6 +1086,12 @@ impl SubAssign for f32x16 {
+ self.0 = lasx_xvfsub_s(self.0, rhs.0);
+ self.1 = lasx_xvfsub_s(self.1, rhs.1);
+ }
++ #[cfg(simd_fallback)]
++ {
++ for i in 0..16 {
++ self.0[i] -= rhs.0[i];
++ }
++ }
+ }
+ }
+
diff --git a/databases/py-pylance/files/patch-rust_lance-linalg_src_simd_f64.rs b/databases/py-pylance/files/patch-rust_lance-linalg_src_simd_f64.rs
new file mode 100644
index 000000000000..b12a151637d8
--- /dev/null
+++ b/databases/py-pylance/files/patch-rust_lance-linalg_src_simd_f64.rs
@@ -0,0 +1,371 @@
+-- Build on architectures without SIMD kernels (e.g. powerpc64le).
+-- https://github.com/lance-format/lance/pull/9446
+
+--- ../rust/lance-linalg/src/simd/f64.rs.orig 2026-08-30 19:56:29 UTC
++++ ../rust/lance-linalg/src/simd/f64.rs
+@@ -33,6 +33,11 @@ pub struct f64x4(v4f64);
+ #[derive(Clone, Copy)]
+ pub struct f64x4(v4f64);
+
++#[allow(non_camel_case_types)]
++#[cfg(simd_fallback)]
++#[derive(Clone, Copy)]
++pub struct f64x4([f64; 4]);
++
+ impl std::fmt::Debug for f64x4 {
+ fn fmt(&self, f: &mut Formatter<'_>) -> std::fmt::Result {
+ let mut arr = [0.0_f64; 4];
+@@ -74,6 +79,10 @@ impl SIMD<f64, 4> for f64x4 {
+ unsafe {
+ Self(transmute(lasx_xvreplgr2vr_d(transmute(val))))
+ }
++ #[cfg(simd_fallback)]
++ {
++ Self([val; 4])
++ }
+ }
+
+ fn zeros() -> Self {
+@@ -89,6 +98,10 @@ impl SIMD<f64, 4> for f64x4 {
+ {
+ Self::splat(0.0)
+ }
++ #[cfg(simd_fallback)]
++ {
++ Self::splat(0.0)
++ }
+ }
+
+ #[inline]
+@@ -105,6 +118,10 @@ impl SIMD<f64, 4> for f64x4 {
+ {
+ Self(transmute(lasx_xvld::<0>(transmute(ptr))))
+ }
++ #[cfg(simd_fallback)]
++ {
++ unsafe { Self::load_unaligned(ptr) }
++ }
+ }
+
+ #[inline]
+@@ -121,6 +138,10 @@ impl SIMD<f64, 4> for f64x4 {
+ {
+ Self(transmute(lasx_xvld::<0>(transmute(ptr))))
+ }
++ #[cfg(simd_fallback)]
++ {
++ unsafe { Self(std::ptr::read_unaligned(ptr as *const [f64; 4])) }
++ }
+ }
+
+ unsafe fn store(&self, ptr: *mut f64) {
+@@ -136,6 +157,10 @@ impl SIMD<f64, 4> for f64x4 {
+ unsafe {
+ lasx_xvst::<0>(transmute(self.0), transmute(ptr));
+ }
++ #[cfg(simd_fallback)]
++ {
++ unsafe { self.store_unaligned(ptr) }
++ }
+ }
+
+ unsafe fn store_unaligned(&self, ptr: *mut f64) {
+@@ -151,6 +176,10 @@ impl SIMD<f64, 4> for f64x4 {
+ unsafe {
+ lasx_xvst::<0>(transmute(self.0), transmute(ptr));
+ }
++ #[cfg(simd_fallback)]
++ {
++ unsafe { std::ptr::write_unaligned(ptr as *mut [f64; 4], self.0) }
++ }
+ }
+
+ #[inline]
+@@ -174,6 +203,10 @@ impl SIMD<f64, 4> for f64x4 {
+ {
+ self.as_array().iter().sum()
+ }
++ #[cfg(simd_fallback)]
++ {
++ self.0.iter().sum()
++ }
+ }
+
+ fn reduce_min(&self) -> f64 {
+@@ -199,6 +232,10 @@ impl SIMD<f64, 4> for f64x4 {
+ .copied()
+ .fold(f64::INFINITY, f64::min)
+ }
++ #[cfg(simd_fallback)]
++ {
++ self.0.iter().copied().fold(f64::INFINITY, f64::min)
++ }
+ }
+
+ fn min(&self, rhs: &Self) -> Self {
+@@ -217,6 +254,10 @@ impl SIMD<f64, 4> for f64x4 {
+ unsafe {
+ Self(lasx_xvfmin_d(self.0, rhs.0))
+ }
++ #[cfg(simd_fallback)]
++ {
++ Self(std::array::from_fn(|i| self.0[i].min(rhs.0[i])))
++ }
+ }
+
+ fn find(&self, val: f64) -> Option<i32> {
+@@ -246,6 +287,12 @@ impl FloatSimd<f64, 4> for f64x4 {
+ unsafe {
+ self.0 = lasx_xvfmadd_d(a.0, b.0, self.0);
+ }
++ #[cfg(simd_fallback)]
++ {
++ for i in 0..4 {
++ self.0[i] = a.0[i].mul_add(b.0[i], self.0[i]);
++ }
++ }
+ }
+ }
+
+@@ -269,6 +316,10 @@ impl Add for f64x4 {
+ unsafe {
+ Self(lasx_xvfadd_d(self.0, rhs.0))
+ }
++ #[cfg(simd_fallback)]
++ {
++ Self(std::array::from_fn(|i| self.0[i] + rhs.0[i]))
++ }
+ }
+ }
+
+@@ -288,6 +339,12 @@ impl AddAssign for f64x4 {
+ unsafe {
+ self.0 = lasx_xvfadd_d(self.0, rhs.0);
+ }
++ #[cfg(simd_fallback)]
++ {
++ for i in 0..4 {
++ self.0[i] += rhs.0[i];
++ }
++ }
+ }
+ }
+
+@@ -311,6 +368,10 @@ impl Sub for f64x4 {
+ unsafe {
+ Self(lasx_xvfsub_d(self.0, rhs.0))
+ }
++ #[cfg(simd_fallback)]
++ {
++ Self(std::array::from_fn(|i| self.0[i] - rhs.0[i]))
++ }
+ }
+ }
+
+@@ -330,6 +391,12 @@ impl SubAssign for f64x4 {
+ unsafe {
+ self.0 = lasx_xvfsub_d(self.0, rhs.0);
+ }
++ #[cfg(simd_fallback)]
++ {
++ for i in 0..4 {
++ self.0[i] -= rhs.0[i];
++ }
++ }
+ }
+ }
+
+@@ -352,6 +419,10 @@ impl Mul for f64x4 {
+ #[cfg(target_arch = "loongarch64")]
+ unsafe {
+ Self(lasx_xvfmul_d(self.0, rhs.0))
++ }
++ #[cfg(simd_fallback)]
++ {
++ Self(std::array::from_fn(|i| self.0[i] * rhs.0[i]))
+ }
+ }
+ }
+@@ -382,6 +453,11 @@ pub struct f64x8(v4f64, v4f64);
+ #[derive(Clone, Copy)]
+ pub struct f64x8(v4f64, v4f64);
+
++#[allow(non_camel_case_types)]
++#[cfg(simd_fallback)]
++#[derive(Clone, Copy)]
++pub struct f64x8([f64; 8]);
++
+ impl std::fmt::Debug for f64x8 {
+ fn fmt(&self, f: &mut Formatter<'_>) -> std::fmt::Result {
+ let mut arr = [0.0_f64; 8];
+@@ -426,6 +502,10 @@ impl SIMD<f64, 8> for f64x8 {
+ let v = transmute(lasx_xvreplgr2vr_d(transmute(val)));
+ Self(v, v)
+ }
++ #[cfg(simd_fallback)]
++ {
++ Self([val; 8])
++ }
+ }
+
+ #[inline]
+@@ -442,6 +522,10 @@ impl SIMD<f64, 8> for f64x8 {
+ {
+ Self::splat(0.0)
+ }
++ #[cfg(simd_fallback)]
++ {
++ Self::splat(0.0)
++ }
+ }
+
+ #[inline]
+@@ -461,6 +545,10 @@ impl SIMD<f64, 8> for f64x8 {
+ transmute(lasx_xvld::<32>(transmute(ptr))),
+ )
+ }
++ #[cfg(simd_fallback)]
++ {
++ unsafe { Self::load_unaligned(ptr) }
++ }
+ }
+
+ #[inline]
+@@ -480,6 +568,10 @@ impl SIMD<f64, 8> for f64x8 {
+ transmute(lasx_xvld::<32>(transmute(ptr))),
+ )
+ }
++ #[cfg(simd_fallback)]
++ {
++ unsafe { Self(std::ptr::read_unaligned(ptr as *const [f64; 8])) }
++ }
+ }
+
+ #[inline]
+@@ -499,6 +591,10 @@ impl SIMD<f64, 8> for f64x8 {
+ lasx_xvst::<0>(transmute(self.0), transmute(ptr));
+ lasx_xvst::<32>(transmute(self.1), transmute(ptr));
+ }
++ #[cfg(simd_fallback)]
++ {
++ unsafe { self.store_unaligned(ptr) }
++ }
+ }
+
+ #[inline]
+@@ -518,6 +614,10 @@ impl SIMD<f64, 8> for f64x8 {
+ lasx_xvst::<0>(transmute(self.0), transmute(ptr));
+ lasx_xvst::<32>(transmute(self.1), transmute(ptr));
+ }
++ #[cfg(simd_fallback)]
++ {
++ unsafe { std::ptr::write_unaligned(ptr as *mut [f64; 8], self.0) }
++ }
+ }
+
+ #[inline]
+@@ -541,6 +641,10 @@ impl SIMD<f64, 8> for f64x8 {
+ {
+ self.as_array().iter().sum()
+ }
++ #[cfg(simd_fallback)]
++ {
++ self.0.iter().sum()
++ }
+ }
+
+ #[inline]
+@@ -568,6 +672,10 @@ impl SIMD<f64, 8> for f64x8 {
+ .copied()
+ .fold(f64::INFINITY, f64::min)
+ }
++ #[cfg(simd_fallback)]
++ {
++ self.0.iter().copied().fold(f64::INFINITY, f64::min)
++ }
+ }
+
+ #[inline]
+@@ -587,6 +695,10 @@ impl SIMD<f64, 8> for f64x8 {
+ unsafe {
+ Self(lasx_xvfmin_d(self.0, rhs.0), lasx_xvfmin_d(self.1, rhs.1))
+ }
++ #[cfg(simd_fallback)]
++ {
++ Self(std::array::from_fn(|i| self.0[i].min(rhs.0[i])))
++ }
+ }
+
+ #[inline]
+@@ -622,6 +734,12 @@ impl FloatSimd<f64, 8> for f64x8 {
+ self.0 = lasx_xvfmadd_d(a.0, b.0, self.0);
+ self.1 = lasx_xvfmadd_d(a.1, b.1, self.1);
+ }
++ #[cfg(simd_fallback)]
++ {
++ for i in 0..8 {
++ self.0[i] = a.0[i].mul_add(b.0[i], self.0[i]);
++ }
++ }
+ }
+ }
+
+@@ -645,6 +763,10 @@ impl Add for f64x8 {
+ unsafe {
+ Self(lasx_xvfadd_d(self.0, rhs.0), lasx_xvfadd_d(self.1, rhs.1))
+ }
++ #[cfg(simd_fallback)]
++ {
++ Self(std::array::from_fn(|i| self.0[i] + rhs.0[i]))
++ }
+ }
+ }
+
+@@ -668,6 +790,12 @@ impl AddAssign for f64x8 {
+ self.0 = lasx_xvfadd_d(self.0, rhs.0);
+ self.1 = lasx_xvfadd_d(self.1, rhs.1);
+ }
++ #[cfg(simd_fallback)]
++ {
++ for i in 0..8 {
++ self.0[i] += rhs.0[i];
++ }
++ }
+ }
+ }
+
+@@ -691,6 +819,10 @@ impl Mul for f64x8 {
+ unsafe {
+ Self(lasx_xvfmul_d(self.0, rhs.0), lasx_xvfmul_d(self.1, rhs.1))
+ }
++ #[cfg(simd_fallback)]
++ {
++ Self(std::array::from_fn(|i| self.0[i] * rhs.0[i]))
++ }
+ }
+ }
+
+@@ -714,6 +846,10 @@ impl Sub for f64x8 {
+ unsafe {
+ Self(lasx_xvfsub_d(self.0, rhs.0), lasx_xvfsub_d(self.1, rhs.1))
+ }
++ #[cfg(simd_fallback)]
++ {
++ Self(std::array::from_fn(|i| self.0[i] - rhs.0[i]))
++ }
+ }
+ }
+
+@@ -737,6 +873,12 @@ impl SubAssign for f64x8 {
+ self.0 = lasx_xvfsub_d(self.0, rhs.0);
+ self.1 = lasx_xvfsub_d(self.1, rhs.1);
+ }
++ #[cfg(simd_fallback)]
++ {
++ for i in 0..8 {
++ self.0[i] -= rhs.0[i];
++ }
++ }
+ }
+ }
+
diff --git a/databases/py-pylance/files/patch-rust_lance-linalg_src_simd_i32.rs b/databases/py-pylance/files/patch-rust_lance-linalg_src_simd_i32.rs
new file mode 100644
index 000000000000..1dd3c967c202
--- /dev/null
+++ b/databases/py-pylance/files/patch-rust_lance-linalg_src_simd_i32.rs
@@ -0,0 +1,192 @@
+-- Build on architectures without SIMD kernels (e.g. powerpc64le).
+-- https://github.com/lance-format/lance/pull/9446
+
+--- ../rust/lance-linalg/src/simd/i32.rs.orig 2026-08-30 19:56:29 UTC
++++ ../rust/lance-linalg/src/simd/i32.rs
+@@ -38,6 +38,11 @@ pub struct i32x8(v8i32);
+ #[derive(Clone, Copy)]
+ pub struct i32x8(v8i32);
+
++#[allow(non_camel_case_types)]
++#[cfg(simd_fallback)]
++#[derive(Clone, Copy)]
++pub struct i32x8([i32; 8]);
++
+ impl std::fmt::Debug for i32x8 {
+ fn fmt(&self, f: &mut Formatter<'_>) -> std::fmt::Result {
+ let mut arr = [0; 8];
+@@ -80,6 +85,10 @@ impl SIMD<i32, 8> for i32x8 {
+ unsafe {
+ Self(lasx_xvreplgr2vr_w(val))
+ }
++ #[cfg(simd_fallback)]
++ {
++ Self([val; 8])
++ }
+ }
+
+ #[inline]
+@@ -96,6 +105,10 @@ impl SIMD<i32, 8> for i32x8 {
+ {
+ Self::splat(0)
+ }
++ #[cfg(simd_fallback)]
++ {
++ Self::splat(0)
++ }
+ }
+
+ #[inline]
+@@ -112,6 +125,10 @@ impl SIMD<i32, 8> for i32x8 {
+ {
+ Self(transmute(lasx_xvld::<0>(transmute(ptr))))
+ }
++ #[cfg(simd_fallback)]
++ {
++ unsafe { Self::load_unaligned(ptr) }
++ }
+ }
+
+ #[inline]
+@@ -128,6 +145,10 @@ impl SIMD<i32, 8> for i32x8 {
+ {
+ Self(transmute(lasx_xvld::<0>(transmute(ptr))))
+ }
++ #[cfg(simd_fallback)]
++ {
++ unsafe { Self(std::ptr::read_unaligned(ptr as *const [i32; 8])) }
++ }
+ }
+
+ #[inline]
+@@ -148,6 +169,10 @@ impl SIMD<i32, 8> for i32x8 {
+ unsafe {
+ lasx_xvst::<0>(transmute(self.0), transmute(ptr))
+ }
++ #[cfg(simd_fallback)]
++ {
++ unsafe { std::ptr::write_unaligned(ptr as *mut [i32; 8], self.0) }
++ }
+ }
+
+ fn reduce_sum(&self) -> i32 {
+@@ -164,6 +189,10 @@ impl SIMD<i32, 8> for i32x8 {
+ {
+ self.as_array().iter().sum()
+ }
++ #[cfg(simd_fallback)]
++ {
++ self.0.iter().sum()
++ }
+ }
+
+ fn reduce_min(&self) -> i32 {
+@@ -186,6 +215,10 @@ impl SIMD<i32, 8> for i32x8 {
+ unsafe {
+ Self(lasx_xvmin_w(self.0, rhs.0))
+ }
++ #[cfg(simd_fallback)]
++ {
++ Self(std::array::from_fn(|i| self.0[i].min(rhs.0[i])))
++ }
+ }
+
+ fn find(&self, val: i32) -> Option<i32> {
+@@ -219,6 +252,12 @@ impl SIMD<i32, 8> for i32x8 {
+ }
+ }
+ }
++ #[cfg(simd_fallback)]
++ {
++ if let Some(i) = self.0.iter().position(|&v| v == val) {
++ return Some(i as i32);
++ }
++ }
+ None
+ }
+ }
+@@ -243,6 +282,10 @@ impl Add for i32x8 {
+ unsafe {
+ Self(lasx_xvadd_w(self.0, rhs.0))
+ }
++ #[cfg(simd_fallback)]
++ {
++ Self(std::array::from_fn(|i| self.0[i].wrapping_add(rhs.0[i])))
++ }
+ }
+ }
*** 75 LINES SKIPPED ***