git: 92873613974f - main - cad/openfpgaloader: update 1.0.0 → 1.1.0

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From: Yuri Victorovich <yuri_at_FreeBSD.org>
Date: Mon, 02 Mar 2026 19:20:21 UTC
The branch main has been updated by yuri:

URL: https://cgit.FreeBSD.org/ports/commit/?id=92873613974fd08894d522073aca6bea64ac75e0

commit 92873613974fd08894d522073aca6bea64ac75e0
Author:     Yuri Victorovich <yuri@FreeBSD.org>
AuthorDate: 2026-03-02 17:37:44 +0000
Commit:     Yuri Victorovich <yuri@FreeBSD.org>
CommitDate: 2026-03-02 19:20:15 +0000

    cad/openfpgaloader: update 1.0.0 → 1.1.0
    
    Reported by:    portscout
---
 cad/openfpgaloader/Makefile                    |  2 +-
 cad/openfpgaloader/distinfo                    |  6 +++---
 cad/openfpgaloader/files/patch-src_anlogic.cpp |  4 ++--
 cad/openfpgaloader/files/patch-src_ftdispi.cpp |  4 ++--
 cad/openfpgaloader/files/patch-src_lattice.cpp |  6 +++---
 cad/openfpgaloader/files/patch-src_xilinx.cpp  | 10 +++++-----
 cad/openfpgaloader/pkg-plist                   |  4 ++++
 7 files changed, 20 insertions(+), 16 deletions(-)

diff --git a/cad/openfpgaloader/Makefile b/cad/openfpgaloader/Makefile
index d88c0bbb99a8..62f9f35f9e96 100644
--- a/cad/openfpgaloader/Makefile
+++ b/cad/openfpgaloader/Makefile
@@ -1,6 +1,6 @@
 PORTNAME=	openfpgaloader
 DISTVERSIONPREFIX=	v
-DISTVERSION=	1.0.0
+DISTVERSION=	1.1.0
 CATEGORIES=	cad
 
 MAINTAINER=	yuri@FreeBSD.org
diff --git a/cad/openfpgaloader/distinfo b/cad/openfpgaloader/distinfo
index bc51867e0181..7a1d0d9c3e09 100644
--- a/cad/openfpgaloader/distinfo
+++ b/cad/openfpgaloader/distinfo
@@ -1,3 +1,3 @@
-TIMESTAMP = 1762221447
-SHA256 (trabucayre-openFPGALoader-v1.0.0_GH0.tar.gz) = cf19b596e5dea21891b1be3cb9a04be7a1501926ee0919dcc5c9f1b6d3bd0a96
-SIZE (trabucayre-openFPGALoader-v1.0.0_GH0.tar.gz) = 2806863
+TIMESTAMP = 1772472810
+SHA256 (trabucayre-openFPGALoader-v1.1.0_GH0.tar.gz) = d2d3da194e3e578ce81f1156f85c128eb6021b73b0c67bbeec9cd5d8bea35fda
+SIZE (trabucayre-openFPGALoader-v1.1.0_GH0.tar.gz) = 2892549
diff --git a/cad/openfpgaloader/files/patch-src_anlogic.cpp b/cad/openfpgaloader/files/patch-src_anlogic.cpp
index c9959e5036f8..c8f2afa04510 100644
--- a/cad/openfpgaloader/files/patch-src_anlogic.cpp
+++ b/cad/openfpgaloader/files/patch-src_anlogic.cpp
@@ -1,6 +1,6 @@
---- src/anlogic.cpp.orig	2020-12-29 13:39:50 UTC
+--- src/anlogic.cpp.orig	2026-03-01 10:27:31 UTC
 +++ src/anlogic.cpp
-@@ -23,6 +23,10 @@
+@@ -15,6 +15,10 @@
  #include "progressBar.hpp"
  #include "spiFlash.hpp"
  
diff --git a/cad/openfpgaloader/files/patch-src_ftdispi.cpp b/cad/openfpgaloader/files/patch-src_ftdispi.cpp
index b5cde388c302..c0797a4c92a9 100644
--- a/cad/openfpgaloader/files/patch-src_ftdispi.cpp
+++ b/cad/openfpgaloader/files/patch-src_ftdispi.cpp
@@ -1,6 +1,6 @@
---- src/ftdispi.cpp.orig	2020-12-29 13:50:17 UTC
+--- src/ftdispi.cpp.orig	2026-03-01 10:27:31 UTC
 +++ src/ftdispi.cpp
-@@ -8,6 +8,10 @@
+@@ -14,6 +14,10 @@
  #include "ftdipp_mpsse.hpp"
  #include "ftdispi.hpp"
  
diff --git a/cad/openfpgaloader/files/patch-src_lattice.cpp b/cad/openfpgaloader/files/patch-src_lattice.cpp
index d373bb0ccfb9..5fcb33b2355a 100644
--- a/cad/openfpgaloader/files/patch-src_lattice.cpp
+++ b/cad/openfpgaloader/files/patch-src_lattice.cpp
@@ -1,6 +1,6 @@
---- src/lattice.cpp.orig	2020-12-17 12:58:30 UTC
+--- src/lattice.cpp.orig	2026-03-01 10:27:31 UTC
 +++ src/lattice.cpp
-@@ -34,6 +34,10 @@
+@@ -27,6 +27,10 @@
  #include "part.hpp"
  #include "spiFlash.hpp"
  
@@ -10,4 +10,4 @@
 +
  using namespace std;
  
- #define ISC_ENABLE				0xc6
+ #define ISC_ENABLE					0xC6		/* ISC_ENABLE - Offline Mode */
diff --git a/cad/openfpgaloader/files/patch-src_xilinx.cpp b/cad/openfpgaloader/files/patch-src_xilinx.cpp
index e22d23a7da8f..aad5523f2e81 100644
--- a/cad/openfpgaloader/files/patch-src_xilinx.cpp
+++ b/cad/openfpgaloader/files/patch-src_xilinx.cpp
@@ -1,8 +1,8 @@
---- src/xilinx.cpp.orig	2020-12-17 12:58:30 UTC
+--- src/xilinx.cpp.orig	2026-03-01 10:27:31 UTC
 +++ src/xilinx.cpp
-@@ -47,6 +47,10 @@ Xilinx::~Xilinx() {}
- #define ISC_DISABLE 0x16
- #define BYPASS   0x3f
+@@ -540,6 +540,10 @@ bool Xilinx::zynqmp_init(const std::string &family)
+ 	return true;
+ }
  
 +#ifndef ETIME
 +#define ETIME 9935
@@ -10,4 +10,4 @@
 +
  void Xilinx::reset()
  {
- 	_jtag->shiftIR(JSHUTDOWN, 6);
+ 	_jtag->shiftIR(get_ircode(_ircode_map, "JSHUTDOWN"), NULL, _irlen);
diff --git a/cad/openfpgaloader/pkg-plist b/cad/openfpgaloader/pkg-plist
index 9ac3bee04cd5..bec605c598be 100644
--- a/cad/openfpgaloader/pkg-plist
+++ b/cad/openfpgaloader/pkg-plist
@@ -1,4 +1,6 @@
 bin/openFPGALoader
+%%DATADIR%%/bpiOverJtag_xc7k480tffg1156.bit.gz
+%%DATADIR%%/spiOverJtag_10cl006144.rbf.gz
 %%DATADIR%%/spiOverJtag_10cl016484.rbf.gz
 %%DATADIR%%/spiOverJtag_10cl025256.rbf.gz
 %%DATADIR%%/spiOverJtag_10cl055484.rbf.gz
@@ -8,6 +10,7 @@ bin/openFPGALoader
 %%DATADIR%%/spiOverJtag_5ce523.rbf.gz
 %%DATADIR%%/spiOverJtag_5ce927.rbf.gz
 %%DATADIR%%/spiOverJtag_5sgsd5.rbf.gz
+%%DATADIR%%/spiOverJtag_efinix_t120f324.bit.gz
 %%DATADIR%%/spiOverJtag_efinix_t13f256.bit.gz
 %%DATADIR%%/spiOverJtag_efinix_t8f81.bit.gz
 %%DATADIR%%/spiOverJtag_efinix_ti180j484.bit.gz
@@ -65,6 +68,7 @@ bin/openFPGALoader
 %%DATADIR%%/spiOverJtag_xc7a50tcsg325_1v35.bit.gz
 %%DATADIR%%/spiOverJtag_xc7a50tfgg484.bit.gz
 %%DATADIR%%/spiOverJtag_xc7a50tftg256.bit.gz
+%%DATADIR%%/spiOverJtag_xc7k70tfbg676.bit.gz
 %%DATADIR%%/spiOverJtag_xc7a75t.bit.gz
 %%DATADIR%%/spiOverJtag_xc7a75tcsg324.bit.gz
 %%DATADIR%%/spiOverJtag_xc7a75tfgg484.bit.gz