git: 0d2d4ce0921a - main - cad/cvc: Remove expired port

From: Rene Ladan <rene_at_FreeBSD.org>
Date: Wed, 24 Sep 2025 09:18:06 UTC
The branch main has been updated by rene:

URL: https://cgit.FreeBSD.org/ports/commit/?id=0d2d4ce0921a9bbb5c59fb6e025b3f456cf8820d

commit 0d2d4ce0921a9bbb5c59fb6e025b3f456cf8820d
Author:     Rene Ladan <rene@FreeBSD.org>
AuthorDate: 2025-09-24 09:17:40 +0000
Commit:     Rene Ladan <rene@FreeBSD.org>
CommitDate: 2025-09-24 09:17:42 +0000

    cad/cvc: Remove expired port
    
    2025-09-23 cad/cvc: Upstream stalled, needs EOL GCC 11 to build
    
    Event:  EuroBSDCon 2025 devsummit
---
 MOVED                                        |  1 +
 cad/Makefile                                 |  1 -
 cad/cvc/Makefile                             | 32 ----------------------------
 cad/cvc/distinfo                             |  3 ---
 cad/cvc/files/patch-Makefile.am              | 10 ---------
 cad/cvc/files/patch-src_Makefile.am          | 11 ----------
 cad/cvc/files/patch-src_mmap__file__pool.cpp | 15 -------------
 cad/cvc/files/patch-src_obstack.c            | 11 ----------
 cad/cvc/pkg-descr                            | 14 ------------
 cad/cvc/pkg-plist                            | 14 ------------
 10 files changed, 1 insertion(+), 111 deletions(-)

diff --git a/MOVED b/MOVED
index 1a3754aba48f..7693269a3af5 100644
--- a/MOVED
+++ b/MOVED
@@ -4778,3 +4778,4 @@ graphics/osg34||2025-09-11|Has expired: Obsolete version released in 2015
 games/motogt||2025-09-11|Has expired: Depends on obsolete devel/sfml1
 devel/sfml1|devel/sfml|2025-09-11|Has expired: Broken obsolete version
 net/benthos|net/redpanda-connect|2025-09-12|Has expired: Superseded by net/redpanda-connect
+cad/cvc||2025-09-24|Has expired: Upstream stalled, needs EOL GCC 11 to build
diff --git a/cad/Makefile b/cad/Makefile
index f4b6576fd402..ec2dc7d8acfa 100644
--- a/cad/Makefile
+++ b/cad/Makefile
@@ -24,7 +24,6 @@
     SUBDIR += csxcad
     SUBDIR += cura
     SUBDIR += cura-engine
-    SUBDIR += cvc
     SUBDIR += digital
     SUBDIR += dinotrace
     SUBDIR += ecpprog
diff --git a/cad/cvc/Makefile b/cad/cvc/Makefile
deleted file mode 100644
index 019dc0514a35..000000000000
--- a/cad/cvc/Makefile
+++ /dev/null
@@ -1,32 +0,0 @@
-PORTNAME=	cvc
-DISTVERSIONPREFIX=	v
-DISTVERSION=	1.1.5
-CATEGORIES=	cad
-
-MAINTAINER=	yuri@FreeBSD.org
-COMMENT=	Circuit Validity Checker
-WWW=		https://github.com/d-m-bailey/cvc
-
-LICENSE=	GPLv3
-LICENSE_FILE=	${WRKSRC}/LICENSE
-
-DEPRECATED=	Upstream stalled, needs EOL GCC 11 to build
-EXPIRATION_DATE=2025-09-23
-
-BUILD_DEPENDS=	pyinstaller:devel/py-pyinstaller@${PY_FLAVOR} \
-		bash:shells/bash
-
-USES=		autoreconf bison gettext-runtime gettext-tools gmake python readline shebangfix
-USE_GCC=	11 # clang fails, see https://github.com/d-m-bailey/cvc/issues/239
-		   # GCC 12 fails, see https://bugs.freebsd.org/bugzilla/show_bug.cgi?id=266189
-
-SHEBANG_FILES=	scripts/calibre_cvc scripts/clean_cvc_log scripts/expand_cells.py
-
-GNU_CONFIGURE=	yes
-
-USE_GITHUB=	yes
-GH_ACCOUNT=	d-m-bailey
-
-MAKE_ARGS=	INTLLIBS=-lintl
-
-.include <bsd.port.mk>
diff --git a/cad/cvc/distinfo b/cad/cvc/distinfo
deleted file mode 100644
index 1985cc502499..000000000000
--- a/cad/cvc/distinfo
+++ /dev/null
@@ -1,3 +0,0 @@
-TIMESTAMP = 1683695318
-SHA256 (d-m-bailey-cvc-v1.1.5_GH0.tar.gz) = bc1a33bdfed68f5c0b85b58e43e15d6cbe9bf35cfc66fb2adb4b48e94891243d
-SIZE (d-m-bailey-cvc-v1.1.5_GH0.tar.gz) = 329571
diff --git a/cad/cvc/files/patch-Makefile.am b/cad/cvc/files/patch-Makefile.am
deleted file mode 100644
index c5fdd5a1f1b5..000000000000
--- a/cad/cvc/files/patch-Makefile.am
+++ /dev/null
@@ -1,10 +0,0 @@
---- Makefile.am.orig	2021-12-29 02:03:06 UTC
-+++ Makefile.am
-@@ -1,6 +1,6 @@
- AUTOMAKE_OPTIONS = foreign
- #SUBDIRS = po src
--SUBDIRS = src scripts src_py doc
-+SUBDIRS = src scripts doc
- 
- ACLOCAL_AMFLAGS = -I m4
- 
diff --git a/cad/cvc/files/patch-src_Makefile.am b/cad/cvc/files/patch-src_Makefile.am
deleted file mode 100644
index d07dbacaf66b..000000000000
--- a/cad/cvc/files/patch-src_Makefile.am
+++ /dev/null
@@ -1,11 +0,0 @@
---- src/Makefile.am.orig	2021-12-29 05:59:48 UTC
-+++ src/Makefile.am
-@@ -1,6 +1,6 @@
- # what flags you want to pass to the C compiler & linker
--CFLAGS = -O3 
--CXXFLAGS = -O3 -std=gnu++11
-+#CFLAGS = -O3 
-+CXXFLAGS += -std=gnu++11
- #LIBS = -lz -lreadline -lcurses -lhistory -lintl
- LIBS = -lz -lreadline -lcurses -lhistory $(INTLLIBS)
- LDFLAGS = -static-libstdc++ -static-libgcc
diff --git a/cad/cvc/files/patch-src_mmap__file__pool.cpp b/cad/cvc/files/patch-src_mmap__file__pool.cpp
deleted file mode 100644
index 8718ccdeb8d3..000000000000
--- a/cad/cvc/files/patch-src_mmap__file__pool.cpp
+++ /dev/null
@@ -1,15 +0,0 @@
---- src/mmap_file_pool.cpp.orig	2021-12-28 19:09:39 UTC
-+++ src/mmap_file_pool.cpp
-@@ -116,7 +116,12 @@ namespace mmap_allocator_namespace {
- 			throw mmap_allocator_exception("Error in remmap(fd)");
- 
- 		void *last_address = memory_area;
-+#if defined(__FreeBSD__)
-+		memory_area = mmap(last_address, size_mapped, PROT_READ, MAP_SHARED, fd, 0);
-+#else
- 		memory_area = mmap(last_address, size_mapped, PROT_READ, MAP_SHARED | MAP_NORESERVE, fd, 0);
-+#endif
-+
- 		if (memory_area == MAP_FAILED) {
- 			if (get_verbosity() > 0) {
- 				perror("mmap");
diff --git a/cad/cvc/files/patch-src_obstack.c b/cad/cvc/files/patch-src_obstack.c
deleted file mode 100644
index 313ba177999f..000000000000
--- a/cad/cvc/files/patch-src_obstack.c
+++ /dev/null
@@ -1,11 +0,0 @@
---- src/obstack.c.orig	2021-12-28 19:08:19 UTC
-+++ src/obstack.c
-@@ -29,7 +29,7 @@
- # include "obstack.h"
- #endif
- 
--#include <stdint-gcc.h>
-+//#include <stdint-gcc.h>
- 
- /* NOTE BEFORE MODIFYING THIS FILE: This version number must be
-    incremented whenever callers compiled using an old obstack.h can no
diff --git a/cad/cvc/pkg-descr b/cad/cvc/pkg-descr
deleted file mode 100644
index 63ddcd0a06f8..000000000000
--- a/cad/cvc/pkg-descr
+++ /dev/null
@@ -1,14 +0,0 @@
-CVC: Circuit Validity Checker. Voltage aware ERC checker for CDL netlists.
-
-Features:
-* Input netlist format is Calibre LVS CDL (Mentor, a Siemens business)
-* Checks netlists with up to 4B devices (2^32).
-* Power and device parameters from Microsoft Excel
-* Hierarchical power files possible
-* Ability to differentiate models by parameters
-* Setup option to list models and power nets
-* All rules are automated. No need to write rule files.
-* Interactive netlist analyzer
-* Script execution available
-* Automatic subcircuit debug environment creation
-* GUI to record error analyses results
diff --git a/cad/cvc/pkg-plist b/cad/cvc/pkg-plist
deleted file mode 100644
index 9e16ebced000..000000000000
--- a/cad/cvc/pkg-plist
+++ /dev/null
@@ -1,14 +0,0 @@
-bin/add_kisei
-bin/annotate_kisei
-bin/calibre_cvc
-bin/clean_cvc_log
-bin/cvcMakefile
-bin/cvc_probe.il
-bin/cvc_rv
-bin/cvc_select.tcl
-bin/expand_cells.py
-share/doc/cvc_rv/Doxyfile
-share/doc/cvc_rv/error_codes
-share/doc/cvc_rv/kisei_instructions.txt
-share/scripts/cvc_rv/SaveCvcParameters.txt
-share/scripts/cvc_rv/box.awk