git: 69f6ad8e07c0 - main - cad/verilator: update 5.036 → 5.038

The branch main has been updated by yuri:

URL: https://cgit.FreeBSD.org/ports/commit/?id=69f6ad8e07c02f493492c0d81dcf5061a1d08627

commit 69f6ad8e07c02f493492c0d81dcf5061a1d08627
Author:     Yuri Victorovich <yuri@FreeBSD.org>
AuthorDate: 2025-07-11 05:33:20 +0000
Commit:     Yuri Victorovich <yuri@FreeBSD.org>
CommitDate: 2025-07-11 06:55:06 +0000

    cad/verilator: update 5.036 → 5.038
    
    Reported by:    portscout
---
 cad/verilator/Makefile | 6 +-----
 cad/verilator/distinfo | 8 +++-----
 2 files changed, 4 insertions(+), 10 deletions(-)

diff --git a/cad/verilator/Makefile b/cad/verilator/Makefile
index e876a7ce4d5b..26645e6a6aa3 100644
--- a/cad/verilator/Makefile
+++ b/cad/verilator/Makefile
@@ -1,12 +1,8 @@
 PORTNAME=	verilator
 DISTVERSIONPREFIX=	v
-DISTVERSION=	5.036
-PORTREVISION=	1
+DISTVERSION=	5.038
 CATEGORIES=	cad
 
-PATCH_SITES=	https://github.com/${GH_ACCOUNT}/${PORTNAME}/commit/
-PATCHFILES=	d94ed785888614cd53379b9faf58dfbde8f06b6f.patch:-p1 # https://github.com/verilator/verilator/pull/6028
-
 MAINTAINER=	yuri@FreeBSD.org
 COMMENT=	Synthesizable Verilog to C++ compiler
 WWW=		https://www.veripool.org/verilator/ \
diff --git a/cad/verilator/distinfo b/cad/verilator/distinfo
index b171502a4b75..5620f0d33f06 100644
--- a/cad/verilator/distinfo
+++ b/cad/verilator/distinfo
@@ -1,5 +1,3 @@
-TIMESTAMP = 1747840694
-SHA256 (verilator-verilator-v5.036_GH0.tar.gz) = 4199964882d56cf6a19ce80c6a297ebe3b0c35ea81106cd4f722342594337c47
-SIZE (verilator-verilator-v5.036_GH0.tar.gz) = 35527368
-SHA256 (d94ed785888614cd53379b9faf58dfbde8f06b6f.patch) = 6b4c604ff4b08ad76431fb0cf11858c0313db04cd6e539db9a3fbad5a03f2784
-SIZE (d94ed785888614cd53379b9faf58dfbde8f06b6f.patch) = 972
+TIMESTAMP = 1752209238
+SHA256 (verilator-verilator-v5.038_GH0.tar.gz) = f8c03105224fa034095ba6c8a06443f61f6f59e1d72f76b718f89060e905a0d4
+SIZE (verilator-verilator-v5.038_GH0.tar.gz) = 35611791