git: 4822a22c947f - main - cad/verilator: Update 5.006 → 5.008

From: Yuri Victorovich <yuri_at_FreeBSD.org>
Date: Mon, 06 Mar 2023 04:34:40 UTC
The branch main has been updated by yuri:

URL: https://cgit.FreeBSD.org/ports/commit/?id=4822a22c947f8d1984ffa0ae675608486166a610

commit 4822a22c947f8d1984ffa0ae675608486166a610
Author:     Yuri Victorovich <yuri@FreeBSD.org>
AuthorDate: 2023-03-06 04:34:22 +0000
Commit:     Yuri Victorovich <yuri@FreeBSD.org>
CommitDate: 2023-03-06 04:34:38 +0000

    cad/verilator: Update 5.006 → 5.008
    
    Reported by:    portscout
---
 cad/verilator/Makefile | 5 +++--
 cad/verilator/distinfo | 6 +++---
 2 files changed, 6 insertions(+), 5 deletions(-)

diff --git a/cad/verilator/Makefile b/cad/verilator/Makefile
index 4034d3552151..6575de9006a3 100644
--- a/cad/verilator/Makefile
+++ b/cad/verilator/Makefile
@@ -1,7 +1,6 @@
 PORTNAME=	verilator
 DISTVERSIONPREFIX=	v
-DISTVERSION=	5.006
-PORTREVISION=	1
+DISTVERSION=	5.008
 CATEGORIES=	cad
 
 MAINTAINER=	yuri@FreeBSD.org
@@ -40,6 +39,8 @@ TEST_TARGET=	test
 
 BINARY_ALIAS=	make=${GMAKE} python3=${PYTHON_CMD} # aliasas are only for tests
 
+#MAKE_JOBS_UNSAFE=	yes # build on 1 CPU because many compile jobs are over 10GB and they can likely cause out-of-memory issues
+
 OPTIONS_DEFINE=			INSTALL_DBG_EXECUTABLES LEAK_CHECKS
 OPTIONS_SUB=			yes
 
diff --git a/cad/verilator/distinfo b/cad/verilator/distinfo
index c573248bb266..f28877af3fd6 100644
--- a/cad/verilator/distinfo
+++ b/cad/verilator/distinfo
@@ -1,3 +1,3 @@
-TIMESTAMP = 1674527154
-SHA256 (verilator-verilator-v5.006_GH0.tar.gz) = eb4ca4157ba854bc78c86173c58e8bd13311984e964006803dd45dc289450cfe
-SIZE (verilator-verilator-v5.006_GH0.tar.gz) = 2866281
+TIMESTAMP = 1678041874
+SHA256 (verilator-verilator-v5.008_GH0.tar.gz) = 1d19f4cd186eec3dfb363571e3fe2e6d3377386ead6febc6ad45402f0634d2a6
+SIZE (verilator-verilator-v5.008_GH0.tar.gz) = 2899738