git: c9f634bf9787 - main - cad/yosys-systemverilog: Update 2023-06-05 → 2023-06-14

The branch main has been updated by yuri:

URL: https://cgit.FreeBSD.org/ports/commit/?id=c9f634bf9787f8b8586da596316cdbbf8de87b71

commit c9f634bf9787f8b8586da596316cdbbf8de87b71
Author:     Yuri Victorovich <yuri@FreeBSD.org>
AuthorDate: 2023-06-18 16:41:51 +0000
Commit:     Yuri Victorovich <yuri@FreeBSD.org>
CommitDate: 2023-06-18 17:10:29 +0000

    cad/yosys-systemverilog: Update 2023-06-05 → 2023-06-14
    
    Reported by:    portscout
---
 cad/yosys-systemverilog/Makefile | 4 ++--
 cad/yosys-systemverilog/distinfo | 6 +++---
 2 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/cad/yosys-systemverilog/Makefile b/cad/yosys-systemverilog/Makefile
index e9f4a7f48dd6..570dda2e41e5 100644
--- a/cad/yosys-systemverilog/Makefile
+++ b/cad/yosys-systemverilog/Makefile
@@ -1,5 +1,5 @@
 PORTNAME=	yosys-systemverilog
-DISTVERSION=	2023-06-05
+DISTVERSION=	2023-06-14
 CATEGORIES=	cad
 PKGNAMEPREFIX=
 
@@ -34,7 +34,7 @@ SKIP_CABAL_PLIST=	yes
 
 USE_GITHUB=	yes
 GH_ACCOUNT=	antmicro
-GH_TAGNAME=	00c9bce-${DISTVERSION}
+GH_TAGNAME=	49069fb-${DISTVERSION}
 GH_TUPLE=	chipsalliance:yosys-f4pga-plugins:56f957c:yosys_f4pga_plugins/yosys-f4pga-plugins \
 		zachjs:sv2v:6c4ee8f:sv2v/sv2v \
 		YosysHQ:yosys:c5e4eec:yosys/yosys
diff --git a/cad/yosys-systemverilog/distinfo b/cad/yosys-systemverilog/distinfo
index b5f91e6485fd..0f4a8e3b31d0 100644
--- a/cad/yosys-systemverilog/distinfo
+++ b/cad/yosys-systemverilog/distinfo
@@ -1,4 +1,4 @@
-TIMESTAMP = 1686074483
+TIMESTAMP = 1687103884
 SHA256 (cabal/alex-3.3.0.0/alex-3.3.0.0.tar.gz) = 810f8e85ea6b87c37cba10f7660d7f1aa0ba251c1275e3a18c312964bb329a63
 SIZE (cabal/alex-3.3.0.0/alex-3.3.0.0.tar.gz) = 86004
 SHA256 (cabal/cmdargs-0.10.22/cmdargs-0.10.22.tar.gz) = b8b12e7f8795cf13037bb062d453b86c788eae62558586f59e9419aabe6e9bef
@@ -25,8 +25,8 @@ SHA256 (cabal/vector-stream-0.1.0.0/vector-stream-0.1.0.0.tar.gz) = a888210f6467
 SIZE (cabal/vector-stream-0.1.0.0/vector-stream-0.1.0.0.tar.gz) = 12377
 SHA256 (cabal/vector-stream-0.1.0.0/revision/2.cabal) = f5d6d5291cd1b5f2f063403593f1f5c8127d692c888eedeb3e1eb40497a88dca
 SIZE (cabal/vector-stream-0.1.0.0/revision/2.cabal) = 1404
-SHA256 (cabal/antmicro-yosys-systemverilog-2023-06-05-00c9bce-2023-06-05_GH0.tar.gz) = 7dbc3b1607a39478f77fd35689483b574cf7c0111dd262bc7ed7ea936e31a75f
-SIZE (cabal/antmicro-yosys-systemverilog-2023-06-05-00c9bce-2023-06-05_GH0.tar.gz) = 158127
+SHA256 (cabal/antmicro-yosys-systemverilog-2023-06-14-49069fb-2023-06-14_GH0.tar.gz) = 56c4b96f1be7acfee147033d1f726c82b83ee61ccc8dd18e95914f21e3c5e6b6
+SIZE (cabal/antmicro-yosys-systemverilog-2023-06-14-49069fb-2023-06-14_GH0.tar.gz) = 157988
 SHA256 (cabal/chipsalliance-yosys-f4pga-plugins-56f957c_GH0.tar.gz) = e2bf0adae00912e07524f2ecf5f6de3d395d283890652d38568175ad56d7bada
 SIZE (cabal/chipsalliance-yosys-f4pga-plugins-56f957c_GH0.tar.gz) = 2690136
 SHA256 (cabal/zachjs-sv2v-6c4ee8f_GH0.tar.gz) = b03955f19128d05c2a2c9d162b2b946fd23a220146abbc5b7847c83c3f937e90