git: be73e47d1d3a - main - cad/surelog: Update 1.36 -> 1.45

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From: Yuri Victorovich <yuri_at_FreeBSD.org>
Date: Sun, 06 Nov 2022 22:38:47 UTC
The branch main has been updated by yuri:

URL: https://cgit.FreeBSD.org/ports/commit/?id=be73e47d1d3aff3c70e47a21ef351ac38bcac47d

commit be73e47d1d3aff3c70e47a21ef351ac38bcac47d
Author:     Yuri Victorovich <yuri@FreeBSD.org>
AuthorDate: 2022-11-06 22:37:11 +0000
Commit:     Yuri Victorovich <yuri@FreeBSD.org>
CommitDate: 2022-11-06 22:38:45 +0000

    cad/surelog: Update 1.36 -> 1.45
    
    Reported by:    portscout
---
 cad/surelog/Makefile                                   | 13 +++++++++----
 cad/surelog/distinfo                                   | 18 +++++++++---------
 ...patch-include_Surelog_DesignCompile_CompileHelper.h | 10 ++++++++++
 .../patch-include_Surelog_Design_ModuleInstance.h      | 10 ++++++++++
 .../files/patch-src_DesignCompile_CompileDesign.cpp    | 10 ++++++++++
 .../patch-src_DesignCompile_CompileExpression.cpp      | 10 ++++++++++
 .../files/patch-src_DesignCompile_ElaborationStep.cpp  | 10 ++++++++++
 cad/surelog/pkg-plist                                  | 14 +++++++-------
 8 files changed, 75 insertions(+), 20 deletions(-)

diff --git a/cad/surelog/Makefile b/cad/surelog/Makefile
index 172f702f5b20..46bbed26a39f 100644
--- a/cad/surelog/Makefile
+++ b/cad/surelog/Makefile
@@ -1,6 +1,6 @@
 PORTNAME=	surelog
 DISTVERSIONPREFIX=	v
-DISTVERSION=	1.36
+DISTVERSION=	1.45
 CATEGORIES=	cad
 
 MAINTAINER=	yuri@FreeBSD.org
@@ -25,10 +25,10 @@ USE_LDCONFIG=	yes
 USE_GITHUB=	yes
 GH_ACCOUNT=	chipsalliance
 GH_PROJECT=	Surelog
-GH_TUPLE=	alainmarcel:antlr4:2846660:antlr4/third_party/antlr4 \
-		chipsalliance:UHDM:75eb335:UHDM/third_party/UHDM \
+GH_TUPLE=	alainmarcel:antlr4:16cfc6b:antlr4/third_party/antlr4 \
+		chipsalliance:UHDM:946a9c4:UHDM/third_party/UHDM \
 		capnproto:capnproto:14f24a4:UHDM_capnproto/third_party/UHDM/third_party/capnproto \
-		google:googletest:25cc577:googletest/third_party/googletest \
+		google:googletest:a4f02ef:googletest/third_party/googletest \
 		google:flatbuffers:799cc8f:flatbuffers/third_party/flatbuffers
 
 CMAKE_ON=	BUILD_SHARED_LIBS
@@ -46,4 +46,9 @@ PYTHON_USES_OFF=	python:build
 PYTHON_CMAKE_BOOL=	SURELOG_WITH_PYTHON
 PYTHON_CMAKE_ON=	-DFREEBSD_PYTHON_DISTVERSION=${PYTHON_DISTVERSION}
 
+post-install:
+	@${RMDIR} \
+		${STAGEDIR}${PREFIX}/lib/surelog/pkg/work \
+		${STAGEDIR}${PREFIX}/lib/surelog/pkg
+
 .include <bsd.port.mk>
diff --git a/cad/surelog/distinfo b/cad/surelog/distinfo
index 11bc39b701c0..a3611f0ddd07 100644
--- a/cad/surelog/distinfo
+++ b/cad/surelog/distinfo
@@ -1,13 +1,13 @@
-TIMESTAMP = 1661709290
-SHA256 (chipsalliance-Surelog-v1.36_GH0.tar.gz) = c64c068ffaa254bfa0747430abc0c270c6ca7e161daf554e27d377e92e2a813f
-SIZE (chipsalliance-Surelog-v1.36_GH0.tar.gz) = 88144362
-SHA256 (alainmarcel-antlr4-2846660_GH0.tar.gz) = 87bbbbd885fbb91330d760e93a8d77104092024a528901a90849a49680c08b96
-SIZE (alainmarcel-antlr4-2846660_GH0.tar.gz) = 4261448
-SHA256 (chipsalliance-UHDM-75eb335_GH0.tar.gz) = ed8767895d0305cc0ae0aefe71fb6aa7a1579a664ec1efdb522f621ceb5c103f
-SIZE (chipsalliance-UHDM-75eb335_GH0.tar.gz) = 1739064
+TIMESTAMP = 1667771804
+SHA256 (chipsalliance-Surelog-v1.45_GH0.tar.gz) = 2ab9990d493f2f4ec34470ff7c340a1399846ed41241af9ab10b6b979db9b682
+SIZE (chipsalliance-Surelog-v1.45_GH0.tar.gz) = 88541484
+SHA256 (alainmarcel-antlr4-16cfc6b_GH0.tar.gz) = 8d3e8ae432f98cdb86c18a3bd780a2ee388f0a5a3d2cd68e3bf7104303be8721
+SIZE (alainmarcel-antlr4-16cfc6b_GH0.tar.gz) = 4387452
+SHA256 (chipsalliance-UHDM-946a9c4_GH0.tar.gz) = 76ea00b27fef1ab7a6e9788f052e4a0fbf8baf363e2626e026bceb39ce59942e
+SIZE (chipsalliance-UHDM-946a9c4_GH0.tar.gz) = 1741064
 SHA256 (capnproto-capnproto-14f24a4_GH0.tar.gz) = 1130e78658e8b1ceb3a69a6b3a964913f22505532ab217299e5600f371922877
 SIZE (capnproto-capnproto-14f24a4_GH0.tar.gz) = 2121570
-SHA256 (google-googletest-25cc577_GH0.tar.gz) = 0677c9ddde3a63159185090ca184947f6264a60c5e52bba0613e4f9ea1157add
-SIZE (google-googletest-25cc577_GH0.tar.gz) = 855293
+SHA256 (google-googletest-a4f02ef_GH0.tar.gz) = 8ca2068d97a45cc3f2cdea7dcdb7647b2c766780cc811f941c3a10b22d1b783c
+SIZE (google-googletest-a4f02ef_GH0.tar.gz) = 859200
 SHA256 (google-flatbuffers-799cc8f_GH0.tar.gz) = 4a56eb2636fbe4cce99b1193af9851c0bbb2783f08d0a199d4870b9c2c515374
 SIZE (google-flatbuffers-799cc8f_GH0.tar.gz) = 2019522
diff --git a/cad/surelog/files/patch-include_Surelog_DesignCompile_CompileHelper.h b/cad/surelog/files/patch-include_Surelog_DesignCompile_CompileHelper.h
new file mode 100644
index 000000000000..92844357ae19
--- /dev/null
+++ b/cad/surelog/files/patch-include_Surelog_DesignCompile_CompileHelper.h
@@ -0,0 +1,10 @@
+--- include/Surelog/DesignCompile/CompileHelper.h.orig	2022-09-09 21:48:59 UTC
++++ include/Surelog/DesignCompile/CompileHelper.h
+@@ -29,6 +29,7 @@
+ #include <Surelog/Expression/ExprBuilder.h>
+ #include <Surelog/SourceCompile/VObjectTypes.h>
+ 
++#include <filesystem>
+ #include <string>
+ #include <unordered_map>
+ 
diff --git a/cad/surelog/files/patch-include_Surelog_Design_ModuleInstance.h b/cad/surelog/files/patch-include_Surelog_Design_ModuleInstance.h
new file mode 100644
index 000000000000..d27da60b50e1
--- /dev/null
+++ b/cad/surelog/files/patch-include_Surelog_Design_ModuleInstance.h
@@ -0,0 +1,10 @@
+--- include/Surelog/Design/ModuleInstance.h.orig	2022-09-09 21:24:46 UTC
++++ include/Surelog/Design/ModuleInstance.h
+@@ -30,6 +30,7 @@
+ #include <Surelog/Design/ValuedComponentI.h>
+ #include <Surelog/SourceCompile/VObjectTypes.h>
+ 
++#include <filesystem>
+ #include <string_view>
+ 
+ namespace SURELOG {
diff --git a/cad/surelog/files/patch-src_DesignCompile_CompileDesign.cpp b/cad/surelog/files/patch-src_DesignCompile_CompileDesign.cpp
new file mode 100644
index 000000000000..32c9cf656960
--- /dev/null
+++ b/cad/surelog/files/patch-src_DesignCompile_CompileDesign.cpp
@@ -0,0 +1,10 @@
+--- src/DesignCompile/CompileDesign.cpp.orig	2022-09-09 21:31:51 UTC
++++ src/DesignCompile/CompileDesign.cpp
+@@ -52,6 +52,7 @@
+ #include <uhdm/vpi_visitor.h>
+ 
+ #include <climits>
++#include <string>
+ #include <thread>
+ 
+ #ifdef USETBB
diff --git a/cad/surelog/files/patch-src_DesignCompile_CompileExpression.cpp b/cad/surelog/files/patch-src_DesignCompile_CompileExpression.cpp
new file mode 100644
index 000000000000..c102d2af1c5c
--- /dev/null
+++ b/cad/surelog/files/patch-src_DesignCompile_CompileExpression.cpp
@@ -0,0 +1,10 @@
+--- src/DesignCompile/CompileExpression.cpp.orig	2022-09-09 21:42:55 UTC
++++ src/DesignCompile/CompileExpression.cpp
+@@ -46,6 +46,7 @@
+ 
+ #include <cmath>
+ #include <cstring>
++#include <string>
+ 
+ // UHDM
+ #include <uhdm/ElaboratorListener.h>
diff --git a/cad/surelog/files/patch-src_DesignCompile_ElaborationStep.cpp b/cad/surelog/files/patch-src_DesignCompile_ElaborationStep.cpp
new file mode 100644
index 000000000000..4a3a95093586
--- /dev/null
+++ b/cad/surelog/files/patch-src_DesignCompile_ElaborationStep.cpp
@@ -0,0 +1,10 @@
+--- src/DesignCompile/ElaborationStep.cpp.orig	2022-09-09 21:47:31 UTC
++++ src/DesignCompile/ElaborationStep.cpp
+@@ -49,6 +49,7 @@
+ 
+ #include <cstring>
+ #include <queue>
++#include <string>
+ 
+ // UHDM
+ #include <uhdm/ElaboratorListener.h>
diff --git a/cad/surelog/pkg-plist b/cad/surelog/pkg-plist
index 13e8904a27ed..6f4f2a62504c 100644
--- a/cad/surelog/pkg-plist
+++ b/cad/surelog/pkg-plist
@@ -1,4 +1,5 @@
 bin/surelog
+bin/uhdm-cmp
 bin/uhdm-dump
 bin/uhdm-hier
 cmake/Surelog-%%CMAKE_BUILD_TYPE%%.cmake
@@ -10,7 +11,10 @@ include/Surelog/API/Surelog.h
 include/Surelog/CommandLine/CommandLineParser.h
 include/Surelog/Common/ClockingBlockHolder.h
 include/Surelog/Common/Containers.h
+include/Surelog/Common/FileSystem.h
 include/Surelog/Common/NodeId.h
+include/Surelog/Common/PathId.h
+include/Surelog/Common/PlatformFileSystem.h
 include/Surelog/Common/PortNetHolder.h
 include/Surelog/Common/RTTI.h
 include/Surelog/Common/SymbolId.h
@@ -60,6 +64,8 @@ include/Surelog/Expression/Value.h
 include/Surelog/Library/Library.h
 include/Surelog/Library/LibrarySet.h
 include/Surelog/Package/Package.h
+include/Surelog/SourceCompile/AstListener.h
+include/Surelog/SourceCompile/AstTraceListener.h
 include/Surelog/SourceCompile/SymbolTable.h
 include/Surelog/SourceCompile/VObjectTypes.h
 include/Surelog/Testbench/ClassDefinition.h
@@ -225,6 +231,7 @@ include/uhdm/mod_path.h
 include/uhdm/modport.h
 include/uhdm/module.h
 include/uhdm/module_array.h
+include/uhdm/module_typespec.h
 include/uhdm/multiclock_sequence_expr.h
 include/uhdm/named_begin.h
 include/uhdm/named_event.h
@@ -364,11 +371,4 @@ lib/libuhdm.so
 lib/surelog/libantlr4-runtime.a
 lib/surelog/libflatbuffers.a
 lib/surelog/libsurelog.a
-lib/surelog/pkg/work/ovm_pkg.sv.slpa
-lib/surelog/pkg/work/ovm_pkg.sv.slpp
-lib/surelog/pkg/work/uvm_pkg.sv.slpa
-lib/surelog/pkg/work/uvm_pkg.sv.slpp
-%%PYTHON%%lib/surelog/python/slSV3_1aPythonListener.py
-%%PYTHON%%lib/surelog/python/slformatmsg.py
-%%PYTHON%%lib/surelog/python/slwaivers.py
 lib/uhdm/UHDM.capnp