Re: cvs commit: src/sys/dev/ciss ciss.c cissio.h cissreg.h cissvar.h

From: John Baldwin <>
Date: Thu, 17 Jul 2008 08:57:13 -0400
On Friday 11 July 2008 05:20:51 pm Scott Long wrote:
> scottl      2008-07-11 21:20:51 UTC
>   FreeBSD src repository
>   Modified files:
>     sys/dev/ciss         ciss.c cissio.h cissreg.h cissvar.h 
>   Log:
>   SVN rev 180454 on 2008-07-11 21:20:51Z by scottl
>   A number of significant enhancements to the ciss driver:
>   3.  Implemented MSI-X.  Without any docs on this, I was just taking a
>   guess, and it appears to only work with the Performant method.  This
>   could be a programming or understanding mistake on my part.  While this
>   by itself made almost no difference to performance since the Performant
>   method already eliminated most of the synchronous reads over the PCI
>   bus, it did allow the CISS hardware to stop sharing its interrupt with
>   the USB hardware, which in turn allowed the driver to become decoupled
>   from the Giant-locked USB driver stack.  This increased performance by
>   almost 20%.  The MSI-X setup was done with 4 vectors allocated, but only
>   1 vector used since the performant method was told to only use 1 of 4
>   queues.  Fiddling with this might make it work with the simpleq method,
>   not sure.  I did not implement MSI since I have no MSI-specific hardware
>   in my test lab.

One note here is that since you only use 1 message currently, you should 
really only alloc 1 message.  That is:

	val = pci_msix_count(dev);
	if (val != CISS_MSI_COUNT)
		return (ENXIO);

	/* Currently only a single message is used. */
	val = 1;
	error = pci_alloc_msix(dev, &val);

The reason being that this "plays nicer" as far as system resource are 
concerned (only reserves 1 IDT slot vs 4 on x86 for example).  In the case of 
MSI-X it also results in the same exact register updates since for MSI-X the 
count is never set in the config registers, instead we adjust each table 
entry during bus_setup_intr().

John Baldwin
Received on Thu Jul 17 2008 - 14:25:03 UTC