svn commit: r232024 - user/jchandra/xlp-merge/sys/mips/nlm

[Jayachandran C.]

Author: jchandra
Date: Thu Feb 23 05:19:34 2012
New Revision: 232024
URL: http://svn.freebsd.org/changeset/base/232024

Log:
  Update the L1D cache flush sequence when enabling threads
  
  Added more comments. This code is still experimental.

Modified:
  user/jchandra/xlp-merge/sys/mips/nlm/mpreset.S

Modified: user/jchandra/xlp-merge/sys/mips/nlm/mpreset.S
==============================================================================
--- user/jchandra/xlp-merge/sys/mips/nlm/mpreset.S	Thu Feb 23 05:18:05 2012	(r232023)
+++ user/jchandra/xlp-merge/sys/mips/nlm/mpreset.S	Thu Feb 23 05:19:34 2012	(r232024)
@@ -55,24 +55,24 @@
 	.set	noreorder
 	li	$8, LSU_DEBUG_DATA0 /* use register number to handle */
 	li	$9, LSU_DEBUG_ADDR  /* different ABIs */
-	li	t2, 0
-	li	t3, 0x200
+	li	t2, 0		/* index */
+	li	t3, 0x1000	/* loop count, 512 sets * 8 whatever? */
 1:
 	sll	v0, t2, 5
 	MTCR(0, 8)
-	ori	v1, v0, 0x3
+	ori	v1, v0, 0x3	/* way0 | write_enable | write_active */
 	MTCR(3, 9)
 2:
 	MFCR(3, 9)
-	andi	v1, 0x1
+	andi	v1, 0x1		/* wait for write_active == 0 */
 	bnez	v1, 2b
 	nop
 	MTCR(0, 8)
-	ori	v1, v0, 0x7
+	ori	v1, v0, 0x7	/* way1 | write_enable | write_active */
 	MTCR(3, 9)
 3:
 	MFCR(3, 9)
-	andi	v1, 0x1
+	andi	v1, 0x1		/* wait for write_active == 0 */
 	bnez	v1, 3b
 	nop
 	addi	t2, 1
@@ -195,7 +195,7 @@ LEAF(xlp_enable_threads)
 	mfc0	t1, MIPS_COP_0_STATUS
 
 	move	sp, t0		/* Restore the real SP */
-	jr	ra
+	jr.hb	ra
 	nop
 END(xlp_enable_threads)
 #endif