svn commit: r225368 - in
user/jchandra/mips-xlp-support/sys/mips/nlm: . hal
Jayachandran C.
jchandra at FreeBSD.org
Sat Sep 3 15:34:19 UTC 2011
Author: jchandra
Date: Sat Sep 3 15:34:18 2011
New Revision: 225368
URL: http://svn.freebsd.org/changeset/base/225368
Log:
HAL updates
mmio.h renamed to haldefs.h - contains more than mmio now
use cpufunc.h functions for status register changes
Added:
user/jchandra/mips-xlp-support/sys/mips/nlm/hal/haldefs.h
- copied, changed from r225363, user/jchandra/mips-xlp-support/sys/mips/nlm/hal/mmio.h
Deleted:
user/jchandra/mips-xlp-support/sys/mips/nlm/hal/mmio.h
Modified:
user/jchandra/mips-xlp-support/sys/mips/nlm/board.c
user/jchandra/mips-xlp-support/sys/mips/nlm/cms.c
user/jchandra/mips-xlp-support/sys/mips/nlm/hal/cop2.h
user/jchandra/mips-xlp-support/sys/mips/nlm/hal/fmn.c
user/jchandra/mips-xlp-support/sys/mips/nlm/hal/pic.h
user/jchandra/mips-xlp-support/sys/mips/nlm/intern_dev.c
user/jchandra/mips-xlp-support/sys/mips/nlm/intr_machdep.c
user/jchandra/mips-xlp-support/sys/mips/nlm/uart_bus_xlp_iodi.c
user/jchandra/mips-xlp-support/sys/mips/nlm/uart_cpu_xlp.c
user/jchandra/mips-xlp-support/sys/mips/nlm/uart_pci_xlp.c
user/jchandra/mips-xlp-support/sys/mips/nlm/usb_init.c
user/jchandra/mips-xlp-support/sys/mips/nlm/xlp_machdep.c
user/jchandra/mips-xlp-support/sys/mips/nlm/xlp_pci.c
Modified: user/jchandra/mips-xlp-support/sys/mips/nlm/board.c
==============================================================================
--- user/jchandra/mips-xlp-support/sys/mips/nlm/board.c Sat Sep 3 12:59:05 2011 (r225367)
+++ user/jchandra/mips-xlp-support/sys/mips/nlm/board.c Sat Sep 3 15:34:18 2011 (r225368)
@@ -35,7 +35,7 @@
#include <sys/mutex.h>
#include <mips/nlm/hal/mips-extns.h>
-#include <mips/nlm/hal/mmio.h>
+#include <mips/nlm/hal/haldefs.h>
#include <mips/nlm/hal/iomap.h>
#include <mips/nlm/hal/fmn.h>
#include <mips/nlm/hal/pic.h>
Modified: user/jchandra/mips-xlp-support/sys/mips/nlm/cms.c
==============================================================================
--- user/jchandra/mips-xlp-support/sys/mips/nlm/cms.c Sat Sep 3 12:59:05 2011 (r225367)
+++ user/jchandra/mips-xlp-support/sys/mips/nlm/cms.c Sat Sep 3 15:34:18 2011 (r225368)
@@ -56,9 +56,8 @@ __FBSDID("$FreeBSD: head/sys/mips/rmi/fm
#include <machine/intr_machdep.h>
#include <mips/nlm/hal/mips-extns.h>
-#include <mips/nlm/hal/mmio.h>
+#include <mips/nlm/hal/haldefs.h>
#include <mips/nlm/hal/iomap.h>
-#include <mips/nlm/hal/cpuinfo.h>
#include <mips/nlm/hal/cop2.h>
#include <mips/nlm/hal/fmn.h>
#include <mips/nlm/hal/pic.h>
@@ -247,9 +246,9 @@ xlp_handle_msg_vc(int vc, int max_msgs)
uint32_t mflags, status;
for (i = 0; i < max_msgs; i++) {
- mflags = nlm_fmn_saveflags();
+ mflags = nlm_save_flags_cop2();
status = nlm_fmn_msgrcv(vc, &srcid, &size, &code, &msg);
- nlm_fmn_restoreflags(mflags);
+ nlm_restore_flags(mflags);
if (status != 0) /* If there is no msg or error */
break;
if (srcid < 0 && srcid >= 1024) {
@@ -320,9 +319,9 @@ msgring_process(void * arg)
if (hwtid != nlm_cpuid())
printf("Misscheduled hwtid %d != cpuid %d\n", hwtid, nlm_cpuid());
- mflags = nlm_fmn_saveflags();
+ mflags = nlm_save_flags_cop2();
nlm_fmn_cpu_init(IRQ_MSGRING, 0, 0, 0, 0, 0);
- nlm_fmn_restoreflags(mflags);
+ nlm_restore_flags(mflags);
/* start processing messages */
for( ; ; ) {
Modified: user/jchandra/mips-xlp-support/sys/mips/nlm/hal/cop2.h
==============================================================================
--- user/jchandra/mips-xlp-support/sys/mips/nlm/hal/cop2.h Sat Sep 3 12:59:05 2011 (r225367)
+++ user/jchandra/mips-xlp-support/sys/mips/nlm/hal/cop2.h Sat Sep 3 15:34:18 2011 (r225368)
@@ -215,23 +215,6 @@ nlm_msgwait(int vc)
: "$8");
}
-/* TODO this is not needed in n32 and n64 */
-static inline uint32_t
-nlm_fmn_saveflags(void)
-{
- uint32_t sr = mips_rd_status();
-
- mips_wr_status((sr & ~MIPS_SR_INT_IE) | MIPS_SR_COP_2_BIT);
- return sr;
-}
-
-static inline void
-nlm_fmn_restoreflags(uint32_t sr)
-{
-
- mips_wr_status(sr);
-}
-
static inline int
nlm_fmn_msgsend(int dstid, int size, int swcode, struct nlm_fmn_msg *m)
{
@@ -239,7 +222,7 @@ nlm_fmn_msgsend(int dstid, int size, int
int rv;
size -= 1;
- flags = nlm_fmn_saveflags();
+ flags = nlm_save_flags_cop2();
switch (size) {
case 3:
nlm_write_c2_txbuf3(m->msg[3]);
@@ -256,7 +239,7 @@ nlm_fmn_msgsend(int dstid, int size, int
rv = !status;
if (rv != 0)
rv = nlm_read_c2_txmsgstatus();
- nlm_fmn_restoreflags(flags);
+ nlm_restore_flags(flags);
return rv;
}
@@ -268,7 +251,7 @@ nlm_fmn_msgrcv(int vc, int *srcid, int *
uint32_t msg_status, flags;
int tmp_sz, rv;
- flags = nlm_fmn_saveflags();
+ flags = nlm_save_flags_cop2();
status = nlm_msgld(vc); /* will return 0, if error */
rv = !status;
if (rv == 0) {
@@ -288,7 +271,7 @@ nlm_fmn_msgrcv(int vc, int *srcid, int *
m->msg[0] = nlm_read_c2_rxbuf0();
}
}
- nlm_fmn_restoreflags(flags);
+ nlm_restore_flags(flags);
return rv;
}
Modified: user/jchandra/mips-xlp-support/sys/mips/nlm/hal/fmn.c
==============================================================================
--- user/jchandra/mips-xlp-support/sys/mips/nlm/hal/fmn.c Sat Sep 3 12:59:05 2011 (r225367)
+++ user/jchandra/mips-xlp-support/sys/mips/nlm/hal/fmn.c Sat Sep 3 15:34:18 2011 (r225368)
@@ -28,12 +28,13 @@
* NETLOGIC_BSD */
#include <sys/types.h>
+#include <sys/systm.h>
+
+#include <machine/cpufunc.h>
#include <mips/nlm/hal/mips-extns.h>
-#include <mips/nlm/hal/mmio.h>
+#include <mips/nlm/hal/haldefs.h>
#include <mips/nlm/hal/iomap.h>
-#include <mips/nlm/hal/cpuinfo.h>
#include <mips/nlm/hal/fmn.h>
-#include <sys/systm.h>
/* XLP can take upto 16K of FMN messages per hardware queue, as spill.
* But, configuring all 16K causes the total spill memory to required
Copied and modified: user/jchandra/mips-xlp-support/sys/mips/nlm/hal/haldefs.h (from r225363, user/jchandra/mips-xlp-support/sys/mips/nlm/hal/mmio.h)
==============================================================================
--- user/jchandra/mips-xlp-support/sys/mips/nlm/hal/mmio.h Sat Sep 3 08:03:25 2011 (r225363, copy source)
+++ user/jchandra/mips-xlp-support/sys/mips/nlm/hal/haldefs.h Sat Sep 3 15:34:18 2011 (r225368)
@@ -35,7 +35,7 @@
* and will provide a way to read 32/64 bit memory mapped registers in
* all ABIs
*/
-#if !defined(__mips_n32) && !defined(__mips_n64)
+
/*
* For o32 compilation, we have to disable interrupts and enable KX bit to
* access 64 bit addresses or data.
@@ -44,27 +44,26 @@
* registers in interrupt handling. So if we get hit by an interrupt while
* using the upper 32 bits of a register, we lose.
*/
-static inline uint32_t nlm_enable_kx(void)
+static inline uint32_t nlm_save_flags_kx(void)
{
- uint32_t sr;
+ uint32_t sr = mips_rd_status();
- __asm__ __volatile__(
- "mfc0 %0, $12\n\t" /* read status reg */
- "move $8, %0\n\t"
- "ori $8, $8, 0x81\n\t" /* set KX, and IE */
- "xori $8, $8, 0x1\n\t" /* flip IE */
- "mtc0 $8, $12\n\t" /* update status reg */
- : "=r"(sr)
- : : "$8");
+ mips_wr_status((sr & ~MIPS_SR_INT_IE) | MIPS_SR_KX);
+ return (sr);
+}
- return sr;
+static inline uint32_t nlm_save_flags_cop2(void)
+{
+ uint32_t sr = mips_rd_status();
+
+ mips_wr_status((sr & ~MIPS_SR_INT_IE) | MIPS_SR_COP_2_BIT);
+ return (sr);
}
-static inline void nlm_restore_kx(uint32_t sr)
+static inline void nlm_restore_flags(uint32_t sr)
{
- __asm__ __volatile__("mtc0 %0, $12" : : "r"(sr));
+ mips_wr_status(sr);
}
-#endif
static inline uint32_t
nlm_load_word(uint64_t addr)
@@ -106,7 +105,7 @@ nlm_load_dword(uint64_t addr)
volatile uint64_t *p = (volatile uint64_t *)(long)addr;
uint32_t valhi, vallo, sr;
- sr = nlm_enable_kx();
+ sr = nlm_save_flags_kx();
__asm__ __volatile__(
".set push\n\t"
".set mips64\n\t"
@@ -117,7 +116,7 @@ nlm_load_dword(uint64_t addr)
: "=r"(valhi), "=r"(vallo)
: "r"(p)
: "$8");
- nlm_restore_kx(sr);
+ nlm_restore_flags(sr);
return ((uint64_t)valhi << 32) | vallo;
}
@@ -131,7 +130,7 @@ nlm_store_dword(uint64_t addr, uint64_t
valhi = val >> 32;
vallo = val & 0xffffffff;
- sr = nlm_enable_kx();
+ sr = nlm_save_flags_kx();
__asm__ __volatile__(
".set push\n\t"
".set mips64\n\t"
@@ -143,7 +142,7 @@ nlm_store_dword(uint64_t addr, uint64_t
".set pop\n"
: : "r"(p), "r"(valhi), "r"(vallo)
: "$8", "$9", "memory");
- nlm_restore_kx(sr);
+ nlm_restore_flags(sr);
}
#endif
@@ -246,7 +245,7 @@ nlm_load_word_daddr(uint64_t addr)
addrhi = addr >> 32;
addrlo = addr & 0xffffffff;
- sr = nlm_enable_kx();
+ sr = nlm_save_flags_kx();
__asm__ __volatile__(
".set push\n\t"
".set mips64\n\t"
@@ -259,7 +258,7 @@ nlm_load_word_daddr(uint64_t addr)
: "=r"(val)
: "r"(addrhi), "r"(addrlo)
: "$8", "$9");
- nlm_restore_kx(sr);
+ nlm_restore_flags(sr);
return val;
@@ -273,7 +272,7 @@ nlm_store_word_daddr(uint64_t addr, uint
addrhi = addr >> 32;
addrlo = addr & 0xffffffff;
- sr = nlm_enable_kx();
+ sr = nlm_save_flags_kx();
__asm__ __volatile__(
".set push\n\t"
".set mips64\n\t"
@@ -285,7 +284,7 @@ nlm_store_word_daddr(uint64_t addr, uint
".set pop\n"
: : "r"(val), "r"(addrhi), "r"(addrlo)
: "$8", "$9", "memory");
- nlm_restore_kx(sr);
+ nlm_restore_flags(sr);
}
static inline uint64_t
@@ -297,7 +296,7 @@ nlm_load_dword_daddr(uint64_t addr)
addrh = addr >> 32;
addrl = addr & 0xffffffff;
- sr = nlm_enable_kx();
+ sr = nlm_save_flags_kx();
__asm__ __volatile__(
".set push\n\t"
".set mips64\n\t"
@@ -312,7 +311,7 @@ nlm_load_dword_daddr(uint64_t addr)
: "=r"(valh), "=r"(vall)
: "r"(addrh), "r"(addrl)
: "$8", "$9");
- nlm_restore_kx(sr);
+ nlm_restore_flags(sr);
return ((uint64_t)valh << 32) | vall;
}
@@ -328,7 +327,7 @@ nlm_store_dword_daddr(uint64_t addr, uin
valh = val >> 32;
vall = val & 0xffffffff;
- sr = nlm_enable_kx();
+ sr = nlm_save_flags_kx();
__asm__ __volatile__(
".set push\n\t"
".set mips64\n\t"
@@ -344,7 +343,7 @@ nlm_store_dword_daddr(uint64_t addr, uin
".set pop\n"
: : "r"(valh), "r"(vall), "r"(addrh), "r"(addrl)
: "$8", "$9", "memory");
- nlm_restore_kx(sr);
+ nlm_restore_flags(sr);
}
#endif /* __mips_n64 */
Modified: user/jchandra/mips-xlp-support/sys/mips/nlm/hal/pic.h
==============================================================================
--- user/jchandra/mips-xlp-support/sys/mips/nlm/hal/pic.h Sat Sep 3 12:59:05 2011 (r225367)
+++ user/jchandra/mips-xlp-support/sys/mips/nlm/hal/pic.h Sat Sep 3 15:34:18 2011 (r225368)
@@ -38,17 +38,17 @@
#define PIC_CTRL_ICI 19 /* ICI interrupt timeout enable */
#define PIC_CTRL_ITE 18 /* interrupt timeout enable */
#define PIC_CTRL_STE 10 /* system timer interrupt enable */
-#define PIC_CTRL_WWR1 8 /* watchdog timer 1 wraparound count for reset */
-#define PIC_CTRL_WWR0 6 /* watchdog timer 0 wraparound count for reset */
-#define PIC_CTRL_WWN1 4 /* watchdog timer 1 wraparound count for NMI */
-#define PIC_CTRL_WWN0 2 /* watchdog timer 0 wraparound count for NMI */
+#define PIC_CTRL_WWR1 8 /* watchdog 1 wraparound count for reset */
+#define PIC_CTRL_WWR0 6 /* watchdog 0 wraparound count for reset */
+#define PIC_CTRL_WWN1 4 /* watchdog 1 wraparound count for NMI */
+#define PIC_CTRL_WWN0 2 /* watchdog 0 wraparound count for NMI */
#define PIC_CTRL_WTE 0 /* watchdog timer enable */
/* PIC Status register defines */
-#define PIC_ICI_STATUS 33 /* ICI interrupt timeout interrupt status */
-#define PIC_ITE_STATUS 32 /* interrupt timeout interrupt status */
+#define PIC_ICI_STATUS 33 /* ICI interrupt timeout status */
+#define PIC_ITE_STATUS 32 /* interrupt timeout status */
#define PIC_STS_STATUS 4 /* System timer interrupt status */
-#define PIC_WNS_STATUS 2 /* NMI interrupt status for watchdog timers */
+#define PIC_WNS_STATUS 2 /* NMI status for watchdog timers */
#define PIC_WIS_STATUS 0 /* Interrupt status for watchdog timers */
/* PIC IPI control register offsets */
@@ -341,8 +341,8 @@ static inline void
nlm_pic_write_irt_direct(uint64_t base, int irt_num, int en, int nmi,
int sch, int vec, int cpu)
{
- nlm_pic_write_irt(base, irt_num, en, nmi, sch, vec, 1,
- (cpu >> 4), /* thread group */
+ nlm_pic_write_irt(base, irt_num, en, nmi, sch, vec, 1,
+ (cpu >> 4), /* thread group */
1 << (cpu & 0xf)); /* thread mask */
}
@@ -358,7 +358,7 @@ nlm_pic_write_timer(uint64_t base, int t
nlm_write_pic_reg(base, PIC_TIMER_COUNT(timer), value);
}
-static __inline__ void
+static inline void
nlm_pic_set_timer(uint64_t base, int timer, uint64_t value, int irq, int cpu)
{
uint64_t pic_ctrl = nlm_read_pic_reg(base, PIC_CTRL);
@@ -366,7 +366,7 @@ nlm_pic_set_timer(uint64_t base, int tim
en = (irq > 0);
nlm_write_pic_reg(base, PIC_TIMER_MAXVAL(timer), value);
- nlm_pic_write_irt_direct(base, PIC_IRT_TIMER_INDEX(timer),
+ nlm_pic_write_irt_direct(base, PIC_IRT_TIMER_INDEX(timer),
en, 0, 0, irq, cpu);
/* enable the timer */
Modified: user/jchandra/mips-xlp-support/sys/mips/nlm/intern_dev.c
==============================================================================
--- user/jchandra/mips-xlp-support/sys/mips/nlm/intern_dev.c Sat Sep 3 12:59:05 2011 (r225367)
+++ user/jchandra/mips-xlp-support/sys/mips/nlm/intern_dev.c Sat Sep 3 15:34:18 2011 (r225368)
@@ -45,7 +45,7 @@ __FBSDID("$FreeBSD$");
#include <dev/pci/pcivar.h>
-#include <mips/nlm/hal/mmio.h>
+#include <mips/nlm/hal/haldefs.h>
#include <mips/nlm/hal/iomap.h>
static int nlm_soc_pci_probe(device_t dev);
Modified: user/jchandra/mips-xlp-support/sys/mips/nlm/intr_machdep.c
==============================================================================
--- user/jchandra/mips-xlp-support/sys/mips/nlm/intr_machdep.c Sat Sep 3 12:59:05 2011 (r225367)
+++ user/jchandra/mips-xlp-support/sys/mips/nlm/intr_machdep.c Sat Sep 3 15:34:18 2011 (r225368)
@@ -46,9 +46,8 @@ __FBSDID("$FreeBSD: head/sys/mips/rmi/in
#include <machine/trap.h>
#include <machine/hwfunc.h>
-#include <mips/nlm/hal/mmio.h>
+#include <mips/nlm/hal/haldefs.h>
#include <mips/nlm/hal/iomap.h>
-#include <mips/nlm/hal/cpuinfo.h>
#include <mips/nlm/hal/mips-extns.h>
#include <mips/nlm/interrupt.h>
#include <mips/nlm/hal/pic.h>
Modified: user/jchandra/mips-xlp-support/sys/mips/nlm/uart_bus_xlp_iodi.c
==============================================================================
--- user/jchandra/mips-xlp-support/sys/mips/nlm/uart_bus_xlp_iodi.c Sat Sep 3 12:59:05 2011 (r225367)
+++ user/jchandra/mips-xlp-support/sys/mips/nlm/uart_bus_xlp_iodi.c Sat Sep 3 15:34:18 2011 (r225368)
@@ -42,7 +42,7 @@ __FBSDID("$FreeBSD: head/sys/mips/rmi/ua
#include <machine/bus.h>
#include <machine/resource.h>
-#include <mips/nlm/hal/mmio.h>
+#include <mips/nlm/hal/haldefs.h>
#include <mips/nlm/hal/iomap.h>
#include <mips/nlm/hal/uart.h>
Modified: user/jchandra/mips-xlp-support/sys/mips/nlm/uart_cpu_xlp.c
==============================================================================
--- user/jchandra/mips-xlp-support/sys/mips/nlm/uart_cpu_xlp.c Sat Sep 3 12:59:05 2011 (r225367)
+++ user/jchandra/mips-xlp-support/sys/mips/nlm/uart_cpu_xlp.c Sat Sep 3 15:34:18 2011 (r225368)
@@ -53,7 +53,7 @@ __FBSDID("$FreeBSD: head/sys/mips/rmi/ua
#include <dev/uart/uart.h>
#include <dev/uart/uart_cpu.h>
-#include <mips/nlm/hal/mmio.h>
+#include <mips/nlm/hal/haldefs.h>
#include <mips/nlm/hal/iomap.h>
#include <mips/nlm/hal/uart.h>
Modified: user/jchandra/mips-xlp-support/sys/mips/nlm/uart_pci_xlp.c
==============================================================================
--- user/jchandra/mips-xlp-support/sys/mips/nlm/uart_pci_xlp.c Sat Sep 3 12:59:05 2011 (r225367)
+++ user/jchandra/mips-xlp-support/sys/mips/nlm/uart_pci_xlp.c Sat Sep 3 15:34:18 2011 (r225368)
@@ -42,7 +42,7 @@ __FBSDID("$FreeBSD$");
#include <dev/pci/pcivar.h>
-#include <mips/nlm/hal/mmio.h>
+#include <mips/nlm/hal/haldefs.h>
#include <mips/nlm/hal/iomap.h>
#include <mips/nlm/hal/uart.h>
Modified: user/jchandra/mips-xlp-support/sys/mips/nlm/usb_init.c
==============================================================================
--- user/jchandra/mips-xlp-support/sys/mips/nlm/usb_init.c Sat Sep 3 12:59:05 2011 (r225367)
+++ user/jchandra/mips-xlp-support/sys/mips/nlm/usb_init.c Sat Sep 3 15:34:18 2011 (r225368)
@@ -34,7 +34,7 @@ __FBSDID("$FreeBSD: head/sys/mips/rmi/fm
#include <sys/param.h>
#include <sys/kernel.h>
-#include <mips/nlm/hal/mmio.h>
+#include <mips/nlm/hal/haldefs.h>
#include <mips/nlm/hal/iomap.h>
#include <mips/nlm/hal/cpuinfo.h>
#include <mips/nlm/hal/usb.h>
Modified: user/jchandra/mips-xlp-support/sys/mips/nlm/xlp_machdep.c
==============================================================================
--- user/jchandra/mips-xlp-support/sys/mips/nlm/xlp_machdep.c Sat Sep 3 12:59:05 2011 (r225367)
+++ user/jchandra/mips-xlp-support/sys/mips/nlm/xlp_machdep.c Sat Sep 3 15:34:18 2011 (r225368)
@@ -71,9 +71,8 @@ __FBSDID("$FreeBSD: head/sys/mips/rmi/xl
#include <machine/smp.h>
#include <mips/nlm/hal/mips-extns.h>
-#include <mips/nlm/hal/mmio.h>
+#include <mips/nlm/hal/haldefs.h>
#include <mips/nlm/hal/iomap.h>
-#include <mips/nlm/hal/cpuinfo.h>
#include <mips/nlm/hal/sys.h>
#include <mips/nlm/hal/pic.h>
#include <mips/nlm/hal/uart.h>
Modified: user/jchandra/mips-xlp-support/sys/mips/nlm/xlp_pci.c
==============================================================================
--- user/jchandra/mips-xlp-support/sys/mips/nlm/xlp_pci.c Sat Sep 3 12:59:05 2011 (r225367)
+++ user/jchandra/mips-xlp-support/sys/mips/nlm/xlp_pci.c Sat Sep 3 15:34:18 2011 (r225368)
@@ -56,12 +56,11 @@ __FBSDID("$FreeBSD$");
#include <machine/intr_machdep.h>
#include <machine/cpuregs.h>
-#include <mips/nlm/hal/mmio.h>
+#include <mips/nlm/hal/haldefs.h>
#include <mips/nlm/interrupt.h>
#include <mips/nlm/hal/iomap.h>
#include <mips/nlm/hal/mips-extns.h>
#include <mips/nlm/hal/pic.h>
-#include <mips/nlm/hal/cpuinfo.h>
#include <mips/nlm/hal/pcibus.h>
#include <mips/nlm/hal/uart.h>
#include <mips/nlm/xlp.h>
More information about the svn-src-user
mailing list