svn commit: r207297 - user/jmallett/octeon/sys/mips/cavium

[Juli Mallett]

Author: jmallett
Date: Tue Apr 27 21:06:17 2010
New Revision: 207297
URL: http://svn.freebsd.org/changeset/base/207297

Log:
  o) Don't use oct_* where cvmx_*_csr will suffice.
  o) Fix compile of octeon_machdep.c by reordering macros.
  o) Constify octeon_feature_descriptions as suggested by rpaulo.

Modified:
  user/jmallett/octeon/sys/mips/cavium/octeon_ebt3000_cf.c
  user/jmallett/octeon/sys/mips/cavium/octeon_machdep.c
  user/jmallett/octeon/sys/mips/cavium/octeon_mp.c

Modified: user/jmallett/octeon/sys/mips/cavium/octeon_ebt3000_cf.c
==============================================================================
--- user/jmallett/octeon/sys/mips/cavium/octeon_ebt3000_cf.c	Tue Apr 27 20:55:56 2010	(r207296)
+++ user/jmallett/octeon/sys/mips/cavium/octeon_ebt3000_cf.c	Tue Apr 27 21:06:17 2010	(r207297)
@@ -594,7 +594,7 @@ static void cf_identify (driver_t *drv, 
 
         for (bus_region = 0; bus_region < 8; bus_region++)
         {
-                cfg.u64 = oct_read64(CVMX_MIO_BOOT_REG_CFGX(bus_region));
+                cfg.u64 = cvmx_read_csr(CVMX_MIO_BOOT_REG_CFGX(bus_region));
                 if (cfg.s.base == octeon_bootinfo->compact_flash_common_base_addr >> 16)
                 {
                         bus_width = (cfg.s.width) ? 16: 8;

Modified: user/jmallett/octeon/sys/mips/cavium/octeon_machdep.c
==============================================================================
--- user/jmallett/octeon/sys/mips/cavium/octeon_machdep.c	Tue Apr 27 20:55:56 2010	(r207296)
+++ user/jmallett/octeon/sys/mips/cavium/octeon_machdep.c	Tue Apr 27 21:06:17 2010	(r207297)
@@ -80,6 +80,9 @@ __FBSDID("$FreeBSD$");
 #define MAX_APP_DESC_ADDR     0xafffffff
 #endif
 
+#define OCTEON_CLOCK_DEFAULT (500 * 1000 * 1000)
+#define OCTEON_DRAM_DEFAULT  (256 * 1024 * 1024)
+
 struct octeon_feature_description {
 	octeon_feature_t ofd_feature;
 	const char *ofd_string;
@@ -88,7 +91,7 @@ struct octeon_feature_description {
 extern int	*edata;
 extern int	*end;
 
-static struct octeon_feature_description octeon_feature_descriptions[] = {
+static const struct octeon_feature_description octeon_feature_descriptions[] = {
 	{ OCTEON_FEATURE_SAAD,			"SAAD" },
 	{ OCTEON_FEATURE_ZIP,			"ZIP" },
 	{ OCTEON_FEATURE_CRYPTO,		"CRYPTO" },
@@ -122,7 +125,7 @@ platform_cpu_init()
 void
 platform_reset(void)
 {
-	oct_write64(CVMX_CIU_SOFT_RST, 1);
+	cvmx_write_csr(CVMX_CIU_SOFT_RST, 1);
 }
 
 void
@@ -182,7 +185,7 @@ octeon_led_write_string(const char *str)
 			oct_write8_x8(ptr, *str++);
 		else
 			oct_write8_x8(ptr, ' ');
-		oct_read64(CVMX_MIO_BOOT_BIST_STAT);
+		(void)cvmx_read_csr(CVMX_MIO_BOOT_BIST_STAT);
 	}
 }
 
@@ -289,7 +292,7 @@ void
 platform_start(__register_t a0, __register_t a1, __register_t a2 __unused,
     __register_t a3)
 {
-	struct octeon_feature_description *ofd;
+	const struct octeon_feature_description *ofd;
 	uint64_t platform_counter_freq;
 
 	/* Initialize pcpu stuff */
@@ -328,7 +331,7 @@ platform_start(__register_t a0, __regist
 	/*
 	 * Clear any pending IPIs.
 	 */
-	oct_write64(CVMX_CIU_MBOX_CLRX(0), 0xffffffff);
+	cvmx_write_csr(CVMX_CIU_MBOX_CLRX(0), 0xffffffff);
 #endif
 
 	printf("Available Octeon features:");
@@ -417,9 +420,6 @@ static octeon_boot_descriptor_t *app_des
 #define OCTEON_BOARD_TYPE_SIM  			1
 #define	OCTEON_BOARD_TYPE_CN3010_EVB_HS5	11
 
-#define OCTEON_CLOCK_DEFAULT (500 * 1000 * 1000)
-#define OCTEON_DRAM_DEFAULT  (256 * 1024 * 1024)
-
 int
 octeon_is_simulation(void)
 {

Modified: user/jmallett/octeon/sys/mips/cavium/octeon_mp.c
==============================================================================
--- user/jmallett/octeon/sys/mips/cavium/octeon_mp.c	Tue Apr 27 20:55:56 2010	(r207296)
+++ user/jmallett/octeon/sys/mips/cavium/octeon_mp.c	Tue Apr 27 21:06:17 2010	(r207297)
@@ -46,7 +46,7 @@ unsigned octeon_ap_boot = ~0;
 void
 platform_ipi_send(int cpuid)
 {
-	oct_write64(CVMX_CIU_MBOX_SETX(cpuid), 1);
+	cvmx_write_csr(CVMX_CIU_MBOX_SETX(cpuid), 1);
 	mips_wbflush();
 }
 
@@ -55,9 +55,9 @@ platform_ipi_clear(void)
 {
 	uint64_t action;
 
-	action = oct_read64(CVMX_CIU_MBOX_CLRX(PCPU_GET(cpuid)));
+	action = cvmx_read_csr(CVMX_CIU_MBOX_CLRX(PCPU_GET(cpuid)));
 	KASSERT(action == 1, ("unexpected IPIs: %#jx", (uintmax_t)action));
-	oct_write64(CVMX_CIU_MBOX_CLRX(PCPU_GET(cpuid)), action);
+	cvmx_write_csr(CVMX_CIU_MBOX_CLRX(PCPU_GET(cpuid)), action);
 }
 
 int
@@ -77,7 +77,7 @@ platform_init_ap(int cpuid)
 	/*
 	 * Clear any pending IPIs.
 	 */
-	oct_write64(CVMX_CIU_MBOX_CLRX(cpuid), 0xffffffff);
+	cvmx_write_csr(CVMX_CIU_MBOX_CLRX(cpuid), 0xffffffff);
 
 	/*
 	 * Set up interrupts.