svn commit: r212192 - in stable/8/sys/dev/ata: . chipsets
Alexander Motin
mav at FreeBSD.org
Sat Sep 4 06:05:57 UTC 2010
Author: mav
Date: Sat Sep 4 06:05:57 2010
New Revision: 212192
URL: http://svn.freebsd.org/changeset/base/212192
Log:
MFC r211920:
Add Intel Cougar Point PCH SATA Controller DeviceIDs. Correct some existing
entries for Intel Ibex Peak (5 Series/3400 Series) PCH SATA controllers.
Modified:
stable/8/sys/dev/ata/ata-pci.h
stable/8/sys/dev/ata/chipsets/ata-intel.c
Directory Properties:
stable/8/sys/ (props changed)
stable/8/sys/amd64/include/xen/ (props changed)
stable/8/sys/cddl/contrib/opensolaris/ (props changed)
stable/8/sys/contrib/dev/acpica/ (props changed)
stable/8/sys/contrib/pf/ (props changed)
stable/8/sys/dev/xen/xenpci/ (props changed)
Modified: stable/8/sys/dev/ata/ata-pci.h
==============================================================================
--- stable/8/sys/dev/ata/ata-pci.h Fri Sep 3 22:24:26 2010 (r212191)
+++ stable/8/sys/dev/ata/ata-pci.h Sat Sep 4 06:05:57 2010 (r212192)
@@ -204,6 +204,29 @@ struct ata_pci_controller {
#define ATA_I82801JI_AH 0x3a228086
#define ATA_I82801JI_R1 0x3a258086
#define ATA_I82801JI_S2 0x3a268086
+
+#define ATA_5Series_S1 0x3b208086
+#define ATA_5Series_S2 0x3b218086
+#define ATA_5Series_AH1 0x3b228086
+#define ATA_5Series_AH2 0x3b238086
+#define ATA_5Series_R1 0x3b258086
+#define ATA_5Series_S3 0x3b268086
+#define ATA_5Series_S4 0x3b288086
+#define ATA_5Series_AH3 0x3b298086
+#define ATA_5Series_R2 0x3b2c8086
+#define ATA_5Series_S5 0x3b2d8086
+#define ATA_5Series_S6 0x3b2e8086
+#define ATA_5Series_AH4 0x3b2f8086
+
+#define ATA_CPT_S1 0x1c008086
+#define ATA_CPT_S2 0x1c018086
+#define ATA_CPT_AH1 0x1c028086
+#define ATA_CPT_AH2 0x1c038086
+#define ATA_CPT_R1 0x1c048086
+#define ATA_CPT_R2 0x1c058086
+#define ATA_CPT_S3 0x1c088086
+#define ATA_CPT_S4 0x1c098086
+
#define ATA_I31244 0x32008086
#define ATA_ISCH 0x811a8086
Modified: stable/8/sys/dev/ata/chipsets/ata-intel.c
==============================================================================
--- stable/8/sys/dev/ata/chipsets/ata-intel.c Fri Sep 3 22:24:26 2010 (r212191)
+++ stable/8/sys/dev/ata/chipsets/ata-intel.c Sat Sep 4 06:05:57 2010 (r212192)
@@ -140,22 +140,26 @@ ata_intel_probe(device_t dev)
{ ATA_I82801JI_AH, 0, INTEL_AHCI, 0, ATA_SA300, "ICH10" },
{ ATA_I82801JI_R1, 0, INTEL_AHCI, 0, ATA_SA300, "ICH10" },
{ ATA_I82801JI_S2, 0, INTEL_AHCI, 0, ATA_SA300, "ICH10" },
- { 0x3b208086, 0, INTEL_AHCI, 0, ATA_SA300, "PCH" },
- { 0x3b218086, 0, INTEL_AHCI, 0, ATA_SA300, "PCH" },
- { 0x3b228086, 0, INTEL_AHCI, 0, ATA_SA300, "PCH" },
- { 0x3b238086, 0, INTEL_AHCI, 0, ATA_SA300, "PCH" },
- { 0x3b248086, 0, INTEL_AHCI, 0, ATA_SA300, "PCH" },
- { 0x3b258086, 0, INTEL_AHCI, 0, ATA_SA300, "PCH" },
- { 0x3b268086, 0, INTEL_AHCI, 0, ATA_SA300, "PCH" },
- { 0x3b278086, 0, INTEL_AHCI, 0, ATA_SA300, "PCH" },
- { 0x3b288086, 0, INTEL_AHCI, 0, ATA_SA300, "PCH" },
- { 0x3b298086, 0, INTEL_AHCI, 0, ATA_SA300, "PCH" },
- { 0x3b2a8086, 0, INTEL_AHCI, 0, ATA_SA300, "PCH" },
- { 0x3b2b8086, 0, INTEL_AHCI, 0, ATA_SA300, "PCH" },
- { 0x3b2c8086, 0, INTEL_AHCI, 0, ATA_SA300, "PCH" },
- { 0x3b2d8086, 0, INTEL_AHCI, 0, ATA_SA300, "PCH" },
- { 0x3b2e8086, 0, INTEL_AHCI, 0, ATA_SA300, "PCH" },
- { 0x3b2f8086, 0, INTEL_AHCI, 0, ATA_SA300, "PCH" },
+ { ATA_5Series_S1, 0, INTEL_AHCI, 0, ATA_SA300, "5 Series/3400 Series PCH" },
+ { ATA_5Series_S2, 0, INTEL_AHCI, 0, ATA_SA300, "5 Series/3400 Series PCH" },
+ { ATA_5Series_AH1, 0, INTEL_AHCI, 0, ATA_SA300, "5 Series/3400 Series PCH" },
+ { ATA_5Series_AH2, 0, INTEL_AHCI, 0, ATA_SA300, "5 Series/3400 Series PCH" },
+ { ATA_5Series_R1, 0, INTEL_AHCI, 0, ATA_SA300, "5 Series/3400 Series PCH" },
+ { ATA_5Series_S3, 0, INTEL_AHCI, 0, ATA_SA300, "5 Series/3400 Series PCH" },
+ { ATA_5Series_S4, 0, INTEL_AHCI, 0, ATA_SA300, "5 Series/3400 Series PCH" },
+ { ATA_5Series_AH3, 0, INTEL_AHCI, 0, ATA_SA300, "5 Series/3400 Series PCH" },
+ { ATA_5Series_R2, 0, INTEL_AHCI, 0, ATA_SA300, "5 Series/3400 Series PCH" },
+ { ATA_5Series_S5, 0, INTEL_AHCI, 0, ATA_SA300, "5 Series/3400 Series PCH" },
+ { ATA_5Series_S6, 0, INTEL_AHCI, 0, ATA_SA300, "5 Series/3400 Series PCH" },
+ { ATA_5Series_AH4, 0, INTEL_AHCI, 0, ATA_SA300, "5 Series/3400 Series PCH" },
+ { ATA_CPT_S1, 0, INTEL_AHCI, 0, ATA_SA300, "Cougar Point" },
+ { ATA_CPT_S2, 0, INTEL_AHCI, 0, ATA_SA300, "Cougar Point" },
+ { ATA_CPT_AH1, 0, INTEL_AHCI, 0, ATA_SA300, "Cougar Point" },
+ { ATA_CPT_AH2, 0, INTEL_AHCI, 0, ATA_SA300, "Cougar Point" },
+ { ATA_CPT_R1, 0, INTEL_AHCI, 0, ATA_SA300, "Cougar Point" },
+ { ATA_CPT_R2, 0, INTEL_AHCI, 0, ATA_SA300, "Cougar Point" },
+ { ATA_CPT_S3, 0, INTEL_AHCI, 0, ATA_SA300, "Cougar Point" },
+ { ATA_CPT_S4, 0, INTEL_AHCI, 0, ATA_SA300, "Cougar Point" },
{ ATA_I31244, 0, 0, 2, ATA_SA150, "31244" },
{ ATA_ISCH, 0, 0, 1, ATA_UDMA5, "SCH" },
{ 0, 0, 0, 0, 0, 0}};
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