svn commit: r269237 - stable/8/sys/i386/i386

[Marius Strobl]

Author: marius
Date: Tue Jul 29 13:08:56 2014
New Revision: 269237
URL: http://svnweb.freebsd.org/changeset/base/269237

Log:
  MFC: r269050 (partial)
  
  Copying and zeroing pages via temporary mappings involves updating the
  corresponding page tables followed by accesses to the pages in question.
  This sequence is subject to the situation exactly described in the "AMD64
  Architecture Programmer's Manual Volume 2: System Programming" rev. 3.23,
  "7.3.1 Special Coherency Considerations" [1, p. 171 f.]. Therefore, issuing
  the INVLPG right after modifying the PTE bits is crucial.
  For pmap_copy_page(), this has been broken in r124956.
  
  1: http://amd-dev.wpengine.netdna-cdn.com/wordpress/media/2012/10/24593_APM_v21.pdf
  
  Reviewed by:	alc, kib
  Sponsored by:	Bally Wulff Games & Entertainment GmbH

Modified:
  stable/8/sys/i386/i386/pmap.c
Directory Properties:
  stable/8/sys/   (props changed)
  stable/8/sys/i386/   (props changed)

Modified: stable/8/sys/i386/i386/pmap.c
==============================================================================
--- stable/8/sys/i386/i386/pmap.c	Tue Jul 29 13:08:46 2014	(r269236)
+++ stable/8/sys/i386/i386/pmap.c	Tue Jul 29 13:08:56 2014	(r269237)
@@ -1263,6 +1263,13 @@ pmap_pte_release(pt_entry_t *pte)
 		mtx_unlock(&PMAP2mutex);
 }
 
+/*
+ * NB:  The sequence of updating a page table followed by accesses to the
+ * corresponding pages is subject to the situation described in the "AMD64
+ * Architecture Programmer's Manual Volume 2: System Programming" rev. 3.23,
+ * "7.3.1 Special Coherency Considerations".  Therefore, issuing the INVLPG
+ * right after modifying the PTE bits is crucial.
+ */
 static __inline void
 invlcaddr(void *caddr)
 {
@@ -4096,12 +4103,12 @@ pmap_copy_page(vm_page_t src, vm_page_t 
 	if (*sysmaps->CMAP2)
 		panic("pmap_copy_page: CMAP2 busy");
 	sched_pin();
-	invlpg((u_int)sysmaps->CADDR1);
-	invlpg((u_int)sysmaps->CADDR2);
 	*sysmaps->CMAP1 = PG_V | VM_PAGE_TO_PHYS(src) | PG_A |
 	    pmap_cache_bits(src->md.pat_mode, 0);
+	invlcaddr(sysmaps->CADDR1);
 	*sysmaps->CMAP2 = PG_V | PG_RW | VM_PAGE_TO_PHYS(dst) | PG_A | PG_M |
 	    pmap_cache_bits(dst->md.pat_mode, 0);
+	invlcaddr(sysmaps->CADDR2);
 	bcopy(sysmaps->CADDR1, sysmaps->CADDR2, PAGE_SIZE);
 	*sysmaps->CMAP1 = 0;
 	*sysmaps->CMAP2 = 0;