svn commit: r189944 - in stable/7/sys: . contrib/pf dev/ath/ath_hal
dev/cxgb dev/re pci
Pyun YongHyeon
yongari at FreeBSD.org
Tue Mar 17 19:03:17 PDT 2009
Author: yongari
Date: Wed Mar 18 02:03:16 2009
New Revision: 189944
URL: http://svn.freebsd.org/changeset/base/189944
Log:
MFC r187483:
- Add support for 8110SCe part. Some magic registers were taken from
Linux driver.
- Swap hardware revisions for 8110S and 8169S as Linux driver claims.
Modified:
stable/7/sys/ (props changed)
stable/7/sys/contrib/pf/ (props changed)
stable/7/sys/dev/ath/ath_hal/ (props changed)
stable/7/sys/dev/cxgb/ (props changed)
stable/7/sys/dev/re/if_re.c
stable/7/sys/pci/if_rlreg.h
Modified: stable/7/sys/dev/re/if_re.c
==============================================================================
--- stable/7/sys/dev/re/if_re.c Wed Mar 18 02:00:23 2009 (r189943)
+++ stable/7/sys/dev/re/if_re.c Wed Mar 18 02:03:16 2009 (r189944)
@@ -199,9 +199,10 @@ static struct rl_hwrev re_hwrevs[] = {
{ RL_HWREV_8169, RL_8169, "8169"},
{ RL_HWREV_8169S, RL_8169, "8169S"},
{ RL_HWREV_8110S, RL_8169, "8110S"},
- { RL_HWREV_8169_8110SB, RL_8169, "8169SB"},
- { RL_HWREV_8169_8110SC, RL_8169, "8169SC"},
- { RL_HWREV_8169_8110SBL, RL_8169, "8169SBL"},
+ { RL_HWREV_8169_8110SB, RL_8169, "8169SB/8110SB"},
+ { RL_HWREV_8169_8110SC, RL_8169, "8169SC/8110SC"},
+ { RL_HWREV_8169_8110SBL, RL_8169, "8169SBL/8110SBL"},
+ { RL_HWREV_8169_8110SCE, RL_8169, "8169SC/8110SC"},
{ RL_HWREV_8100, RL_8139, "8100"},
{ RL_HWREV_8101, RL_8139, "8101"},
{ RL_HWREV_8100E, RL_8169, "8100E"},
@@ -688,12 +689,10 @@ re_reset(struct rl_softc *sc)
if (i == RL_TIMEOUT)
device_printf(sc->rl_dev, "reset never completed!\n");
- if ((sc->rl_flags & RL_FLAG_PHY8169) != 0)
+ if ((sc->rl_flags & RL_FLAG_MACRESET) != 0)
CSR_WRITE_1(sc, 0x82, 1);
- if ((sc->rl_flags & RL_FLAG_PHY8110S) != 0) {
- CSR_WRITE_1(sc, 0x82, 1);
- re_gmii_writereg(sc->rl_dev, 1, 0x0B, 0);
- }
+ if (sc->rl_hwrev == RL_HWREV_8169S)
+ re_gmii_writereg(sc->rl_dev, 1, 0x0b, 0);
}
#ifdef RE_DIAG
@@ -1209,12 +1208,22 @@ re_attach(device_t dev)
hw_rev = re_hwrevs;
hwrev = CSR_READ_4(sc, RL_TXCFG);
- device_printf(dev, "Chip rev. 0x%08x\n", hwrev & 0x7c800000);
+ switch (hwrev & 0x70000000) {
+ case 0x00000000:
+ case 0x10000000:
+ device_printf(dev, "Chip rev. 0x%08x\n", hwrev & 0xfc800000);
+ hwrev &= (RL_TXCFG_HWREV | 0x80000000);
+ break;
+ default:
+ device_printf(dev, "Chip rev. 0x%08x\n", hwrev & 0x7c800000);
+ hwrev &= RL_TXCFG_HWREV;
+ break;
+ }
device_printf(dev, "MAC rev. 0x%08x\n", hwrev & 0x00700000);
- hwrev &= RL_TXCFG_HWREV;
while (hw_rev->rl_desc != NULL) {
if (hw_rev->rl_rev == hwrev) {
sc->rl_type = hw_rev->rl_type;
+ sc->rl_hwrev = hw_rev->rl_rev;
break;
}
hw_rev++;
@@ -1229,9 +1238,6 @@ re_attach(device_t dev)
case RL_HWREV_8139CPLUS:
sc->rl_flags |= RL_FLAG_NOJUMBO | RL_FLAG_FASTETHER;
break;
- case RL_HWREV_8110S:
- sc->rl_flags |= RL_FLAG_PHY8110S;
- break;
case RL_HWREV_8100E:
case RL_HWREV_8101E:
sc->rl_flags |= RL_FLAG_NOJUMBO | RL_FLAG_PHYWAKE |
@@ -1273,14 +1279,16 @@ re_attach(device_t dev)
*/
sc->rl_flags |= RL_FLAG_NOJUMBO;
break;
- case RL_HWREV_8169:
- case RL_HWREV_8169S:
- sc->rl_flags |= RL_FLAG_PHY8169;
- break;
case RL_HWREV_8169_8110SB:
- case RL_HWREV_8169_8110SC:
case RL_HWREV_8169_8110SBL:
- sc->rl_flags |= RL_FLAG_PHYWAKE | RL_FLAG_PHY8169;
+ case RL_HWREV_8169_8110SC:
+ case RL_HWREV_8169_8110SCE:
+ sc->rl_flags |= RL_FLAG_PHYWAKE;
+ /* FALLTHROUGH */
+ case RL_HWREV_8169:
+ case RL_HWREV_8169S:
+ case RL_HWREV_8110S:
+ sc->rl_flags |= RL_FLAG_MACRESET;
break;
default:
break;
@@ -2484,6 +2492,7 @@ re_init_locked(struct rl_softc *sc)
{
struct ifnet *ifp = sc->rl_ifp;
struct mii_data *mii;
+ uint32_t reg;
uint16_t cfg;
union {
uint32_t align_dummy;
@@ -2519,6 +2528,17 @@ re_init_locked(struct rl_softc *sc)
} else
cfg |= RL_CPLUSCMD_RXENB | RL_CPLUSCMD_TXENB;
CSR_WRITE_2(sc, RL_CPLUS_CMD, cfg);
+ if (sc->rl_hwrev == RL_HWREV_8169_8110SC ||
+ sc->rl_hwrev == RL_HWREV_8169_8110SCE) {
+ reg = 0x000fff00;
+ if ((CSR_READ_1(sc, RL_CFG2) & RL_CFG2_PCI66MHZ) != 0)
+ reg |= 0x000000ff;
+ if (sc->rl_hwrev == RL_HWREV_8169_8110SCE)
+ reg |= 0x00f00000;
+ CSR_WRITE_4(sc, 0x7c, reg);
+ /* Disable interrupt mitigation. */
+ CSR_WRITE_2(sc, 0xe2, 0);
+ }
/*
* Disable TSO if interface MTU size is greater than MSS
* allowed in controller.
Modified: stable/7/sys/pci/if_rlreg.h
==============================================================================
--- stable/7/sys/pci/if_rlreg.h Wed Mar 18 02:00:23 2009 (r189943)
+++ stable/7/sys/pci/if_rlreg.h Wed Mar 18 02:03:16 2009 (r189944)
@@ -154,8 +154,8 @@
/* Known revision codes. */
#define RL_HWREV_8169 0x00000000
-#define RL_HWREV_8110S 0x00800000
-#define RL_HWREV_8169S 0x04000000
+#define RL_HWREV_8169S 0x00800000
+#define RL_HWREV_8110S 0x04000000
#define RL_HWREV_8169_8110SB 0x10000000
#define RL_HWREV_8169_8110SC 0x18000000
#define RL_HWREV_8102EL 0x24800000
@@ -180,6 +180,7 @@
#define RL_HWREV_8101 0x74c00000
#define RL_HWREV_8100 0x78800000
#define RL_HWREV_8169_8110SBL 0x7CC00000
+#define RL_HWREV_8169_8110SCE 0x98000000
#define RL_TXDMA_16BYTES 0x00000000
#define RL_TXDMA_32BYTES 0x00000100
@@ -859,8 +860,7 @@ struct rl_softc {
#define RL_FLAG_MACSTAT 0x0080
#define RL_FLAG_FASTETHER 0x0100
#define RL_FLAG_CMDSTOP 0x0200
-#define RL_FLAG_PHY8169 0x0400
-#define RL_FLAG_PHY8110S 0x0800
+#define RL_FLAG_MACRESET 0x0400
#define RL_FLAG_WOLRXENB 0x1000
#define RL_FLAG_MACSLEEP 0x2000
#define RL_FLAG_PCIE 0x4000
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