svn commit: r363433 - in stable: 11/sys/x86/x86 12/sys/x86/x86

[Jung-uk Kim]

Author: jkim
Date: Wed Jul 22 21:17:02 2020
New Revision: 363433
URL: https://svnweb.freebsd.org/changeset/base/363433

Log:
  MFC:	r362509
  
  Assume all TSCs are synchronized for AMD Family 17h processors and later
  when it has passed the synchronization test.

Modified:
  stable/12/sys/x86/x86/tsc.c
Directory Properties:
  stable/12/   (props changed)

Changes in other areas also in this revision:
Modified:
  stable/11/sys/x86/x86/tsc.c
Directory Properties:
  stable/11/   (props changed)

Modified: stable/12/sys/x86/x86/tsc.c
==============================================================================
--- stable/12/sys/x86/x86/tsc.c	Wed Jul 22 21:06:32 2020	(r363432)
+++ stable/12/sys/x86/x86/tsc.c	Wed Jul 22 21:17:02 2020	(r363433)
@@ -530,6 +530,13 @@ retry:
 		case CPU_VENDOR_AMD:
 		case CPU_VENDOR_HYGON:
 			/*
+			 * Processor Programming Reference (PPR) for AMD
+			 * Family 17h states that the TSC uses a common
+			 * reference for all sockets, cores and threads.
+			 */
+			if (CPUID_TO_FAMILY(cpu_id) >= 0x17)
+				return (1000);
+			/*
 			 * Starting with Family 15h processors, TSC clock
 			 * source is in the north bridge.  Check whether
 			 * we have a single-socket/multi-core platform.