svn commit: r231110 - in projects/armv6/sys: arm/conf arm/ti arm/ti/omap4 arm/ti/omap4/pandaboard boot/fdt/dts

Oleksandr Tymoshenko gonzo at FreeBSD.org
Tue Feb 7 03:41:09 UTC 2012


Author: gonzo
Date: Tue Feb  7 03:41:08 2012
New Revision: 231110
URL: http://svn.freebsd.org/changeset/base/231110

Log:
  Add first code drop of FDT support for TI platforms:
  
    - Disable all files in omap nbuild that do not support FDT yet
    - Add generic GIC driver. At the time to ti/ directory. Final location TBD
    - Add timer.c with DELAY stub before we get working timer driver
    - Rename omap_cpuid files to ti_cpuid since support for am335x is on its way
  
  Submitted by:	Damjan Marion

Added:
  projects/armv6/sys/arm/ti/bus_space.c
  projects/armv6/sys/arm/ti/common.c
  projects/armv6/sys/arm/ti/gic.c
  projects/armv6/sys/arm/ti/ti_cpuid.c
     - copied, changed from r231102, projects/armv6/sys/arm/ti/omap_cpuid.c
  projects/armv6/sys/arm/ti/ti_cpuid.h
     - copied, changed from r231102, projects/armv6/sys/arm/ti/omap_cpuid.h
  projects/armv6/sys/arm/ti/ti_machdep.c
  projects/armv6/sys/arm/ti/timer.c
  projects/armv6/sys/boot/fdt/dts/pandaboard.dts
Deleted:
  projects/armv6/sys/arm/ti/omap_cpuid.c
  projects/armv6/sys/arm/ti/omap_cpuid.h
  projects/armv6/sys/arm/ti/omap_machdep.c
Modified:
  projects/armv6/sys/arm/conf/PANDABOARD
  projects/armv6/sys/arm/ti/omap4/files.omap44xx
  projects/armv6/sys/arm/ti/omap4/pandaboard/files.pandaboard
  projects/armv6/sys/arm/ti/omapvar.h

Modified: projects/armv6/sys/arm/conf/PANDABOARD
==============================================================================
--- projects/armv6/sys/arm/conf/PANDABOARD	Tue Feb  7 03:37:29 2012	(r231109)
+++ projects/armv6/sys/arm/conf/PANDABOARD	Tue Feb  7 03:41:08 2012	(r231110)
@@ -125,6 +125,9 @@ device		da		# Direct Access (disks)
 # USB Ethernet support, requires miibus
 device		miibus
 device		axe			# ASIX Electronics USB Ethernet
-device		smsc		# SMSC LAN95xx USB Ethernet
-
+# device		smsc		# SMSC LAN95xx USB Ethernet
 
+# Flattened Device Tree
+options         FDT
+options         FDT_DTB_STATIC
+makeoptions     FDT_DTS_FILE=pandaboard.dts

Added: projects/armv6/sys/arm/ti/bus_space.c
==============================================================================
--- /dev/null	00:00:00 1970	(empty, because file is newly added)
+++ projects/armv6/sys/arm/ti/bus_space.c	Tue Feb  7 03:41:08 2012	(r231110)
@@ -0,0 +1,113 @@
+/*-
+ * Copyright (C) 2012 FreeBSD Foundation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of MARVELL nor the names of contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/bus.h>
+#include <sys/kernel.h>
+#include <sys/malloc.h>
+
+#include <machine/bus.h>
+
+/* Prototypes for all the bus_space structure functions */
+bs_protos(generic);
+bs_protos(generic_armv4);
+
+struct bus_space _base_tag = {
+	/* cookie */
+	.bs_cookie	= (void *) 0,
+	
+	/* mapping/unmapping */
+	.bs_map		= generic_bs_map,
+	.bs_unmap	= generic_bs_unmap,
+	.bs_subregion	= generic_bs_subregion,
+	
+	/* allocation/deallocation */
+	.bs_alloc	= generic_bs_alloc,
+	.bs_free	= generic_bs_free,
+	
+	/* barrier */
+	.bs_barrier	= generic_bs_barrier,
+	
+	/* read (single) */
+	.bs_r_1		= generic_bs_r_1,
+	.bs_r_2		= generic_armv4_bs_r_2,
+	.bs_r_4		= generic_bs_r_4,
+	.bs_r_8		= NULL,
+	
+	/* read multiple */
+	.bs_rm_1	= generic_bs_rm_1,
+	.bs_rm_2	= generic_armv4_bs_rm_2,
+	.bs_rm_4	= generic_bs_rm_4,
+	.bs_rm_8	= NULL,
+	
+	/* read region */
+	.bs_rr_1	= generic_bs_rr_1,
+	.bs_rr_2	= generic_armv4_bs_rr_2,
+	.bs_rr_4	= generic_bs_rr_4,
+	.bs_rr_8	= NULL,
+	
+	/* write (single) */
+	.bs_w_1		= generic_bs_w_1,
+	.bs_w_2		= generic_armv4_bs_w_2,
+	.bs_w_4		= generic_bs_w_4,
+	.bs_w_8		= NULL,
+	
+	/* write multiple */
+	.bs_wm_1	= generic_bs_wm_1,
+	.bs_wm_2	= generic_armv4_bs_wm_2,
+	.bs_wm_4	= generic_bs_wm_4,
+	.bs_wm_8	= NULL,
+	
+	/* write region */
+	.bs_wr_1	= generic_bs_wr_1,
+	.bs_wr_2	= generic_armv4_bs_wr_2,
+	.bs_wr_4	= generic_bs_wr_4,
+	.bs_wr_8	= NULL,
+	
+	/* set multiple */
+	/* XXX not implemented */
+	
+	/* set region */
+	.bs_sr_1	= NULL,
+	.bs_sr_2	= generic_armv4_bs_sr_2,
+	.bs_sr_4	= generic_bs_sr_4,
+	.bs_sr_8	= NULL,
+	
+	/* copy */
+	.bs_c_1		= NULL,
+	.bs_c_2		= generic_armv4_bs_c_2,
+	.bs_c_4		= NULL,
+	.bs_c_8		= NULL,
+};
+
+bus_space_tag_t fdtbus_bs_tag = &_base_tag;

Added: projects/armv6/sys/arm/ti/common.c
==============================================================================
--- /dev/null	00:00:00 1970	(empty, because file is newly added)
+++ projects/armv6/sys/arm/ti/common.c	Tue Feb  7 03:41:08 2012	(r231110)
@@ -0,0 +1,74 @@
+/*-
+ * Copyright (C) 2008-2011 MARVELL INTERNATIONAL LTD.
+ * All rights reserved.
+ *
+ * Developed by Semihalf.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of MARVELL nor the names of contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include "opt_global.h"
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/bus.h>
+#include <sys/kernel.h>
+#include <sys/malloc.h>
+#include <sys/kdb.h>
+#include <sys/reboot.h>
+
+#include <dev/fdt/fdt_common.h>
+#include <dev/ofw/openfirm.h>
+
+#include <machine/bus.h>
+#include <machine/fdt.h>
+#include <machine/vmparam.h>
+
+struct fdt_fixup_entry fdt_fixup_table[] = {
+	{ NULL, NULL }
+};
+
+static int
+fdt_gic_decode_ic(phandle_t node, pcell_t *intr, int *interrupt, int *trig,
+    int *pol)
+{
+
+	if (!fdt_is_compatible(node, "arm,gic"))
+		return (ENXIO);
+
+	*interrupt = fdt32_to_cpu(intr[0]);
+	*trig = INTR_TRIGGER_CONFORM;
+	*pol = INTR_POLARITY_CONFORM;
+
+	return (0);
+}
+
+fdt_pic_decode_t fdt_pic_table[] = {
+	&fdt_gic_decode_ic,
+	NULL
+};

Added: projects/armv6/sys/arm/ti/gic.c
==============================================================================
--- /dev/null	00:00:00 1970	(empty, because file is newly added)
+++ projects/armv6/sys/arm/ti/gic.c	Tue Feb  7 03:41:08 2012	(r231110)
@@ -0,0 +1,232 @@
+/*-
+ * Copyright (c) 2011 The FreeBSD Foundation
+ * All rights reserved.
+ *
+ * Developed by Damjan Marion <damjan.marion at gmail.com>
+ *
+ * Based on OMAP4 GIC code by Ben Gray
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. The name of the company nor the name of the author may be used to
+ *    endorse or promote products derived from this software without specific
+ *    prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/bus.h>
+#include <sys/kernel.h>
+#include <sys/ktr.h>
+#include <sys/module.h>
+#include <sys/rman.h>
+#include <machine/bus.h>
+#include <machine/intr.h>
+
+#include <dev/fdt/fdt_common.h>
+#include <dev/ofw/openfirm.h>
+#include <dev/ofw/ofw_bus.h>
+#include <dev/ofw/ofw_bus_subr.h>
+
+
+ /* We are using GICv2 register naming */
+
+ /* Distributor Registers */
+#define GICD_CTLR		0x000			/* v1 ICDDCR */
+#define GICD_TYPER		0x004			/* v1 ICDICTR */
+#define GICD_IIDR		0x008			/* v1 ICDIIDR */
+#define GICD_IGROUPR(n)		(0x0080 + ((n) * 4))	/* v1 ICDISER */
+#define GICD_ISENABLER(n)	(0x0100 + ((n) * 4))	/* v1 ICDISER */
+#define GICD_ICENABLER(n)	(0x0180 + ((n) * 4))	/* v1 ICDICER */
+#define GICD_ISPENDR(n)		(0x0200 + ((n) * 4))	/* v1 ICDISPR */
+#define GICD_ICPENDR(n)		(0x0280 + ((n) * 4))	/* v1 ICDICPR */
+#define GICD_ICACTIVER(n)	(0x0380 + ((n) * 4))	/* v1 ICDABR */
+#define GICD_IPRIORITYR(n)	(0x0400 + ((n) * 4))	/* v1 ICDIPR */
+#define GICD_ITARGETSR(n)	(0x0800 + ((n) * 4))	/* v1 ICDIPTR */
+#define GICD_ICFGR(n)		(0x0C00 + ((n) * 4))	/* v1 ICDICFR */
+#define GICD_SGIR(n)		(0x0F00 + ((n) * 4))	/* v1 ICDSGIR */
+
+ /* CPU Registers */
+#define GICC_CTLR		0x0000			/* v1 ICCICR */
+#define GICC_PMR		0x0004			/* v1 ICCPMR */
+#define GICC_BPR		0x0008			/* v1 ICCBPR */
+#define GICC_IAR		0x000C			/* v1 ICCIAR */
+#define GICC_EOIR		0x0010			/* v1 ICCEOIR */
+#define GICC_RPR		0x0014			/* v1 ICCRPR */
+#define GICC_HPPIR		0x0018			/* v1 ICCHPIR */
+#define GICC_ABPR		0x001C			/* v1 ICCABPR */
+#define GICC_IIDR		0x00FC			/* v1 ICCIIDR*/
+
+
+
+struct arm_gic_softc {
+	struct resource *	gic_res[3];
+	bus_space_tag_t		gic_c_bst;
+	bus_space_tag_t		gic_d_bst;
+	bus_space_handle_t	gic_c_bsh;
+	bus_space_handle_t	gic_d_bsh;
+	uint8_t			ver;
+};
+
+static struct resource_spec arm_gic_spec[] = {
+	{ SYS_RES_MEMORY,	0,	RF_ACTIVE },	/* Distributor registers */
+	{ SYS_RES_MEMORY,	1,	RF_ACTIVE },	/* CPU Interrupt Intf. registers */
+	{ -1, 0 }
+};
+
+
+static struct arm_gic_softc *arm_gic_sc = NULL;
+
+#define	gic_c_read_4(reg)		\
+    bus_space_read_4(arm_gic_sc->gic_c_bst, arm_gic_sc->gic_c_bsh, reg)
+#define	gic_c_write_4(reg, val)		\
+    bus_space_write_4(arm_gic_sc->gic_c_bst, arm_gic_sc->gic_c_bsh, reg, val)
+#define	gic_d_read_4(reg)		\
+    bus_space_read_4(arm_gic_sc->gic_d_bst, arm_gic_sc->gic_d_bsh, reg)
+#define	gic_d_write_4(reg, val)		\
+    bus_space_write_4(arm_gic_sc->gic_d_bst, arm_gic_sc->gic_d_bsh, reg, val)
+
+
+static int
+arm_gic_probe(device_t dev)
+{
+	if (!ofw_bus_is_compatible(dev, "arm,gic"))
+		return (ENXIO);
+	device_set_desc(dev, "ARM Generic Interrupt Controller");
+	return (BUS_PROBE_DEFAULT);
+}
+
+static int
+arm_gic_attach(device_t dev)
+{
+	struct		arm_gic_softc *sc = device_get_softc(dev);
+	int		i;
+	uint32_t	icciidr;
+	uint32_t	nirqs;
+
+	if (arm_gic_sc)
+		return (ENXIO);
+
+	if (bus_alloc_resources(dev, arm_gic_spec, sc->gic_res)) {
+		device_printf(dev, "could not allocate resources\n");
+		return (ENXIO);
+	}
+
+	/* Distributor Interface */
+	sc->gic_d_bst = rman_get_bustag(sc->gic_res[0]);
+	sc->gic_d_bsh = rman_get_bushandle(sc->gic_res[0]);
+
+	/* CPU Interface */
+	sc->gic_c_bst = rman_get_bustag(sc->gic_res[1]);
+	sc->gic_c_bsh = rman_get_bushandle(sc->gic_res[1]);
+
+	arm_gic_sc = sc;
+
+	/* Disable interrupt forwarding to the CPU interface */
+	gic_d_write_4(GICD_CTLR, 0x00);
+
+	/* Get the number of interrupts */
+	nirqs = gic_d_read_4(GICD_TYPER);
+	nirqs = 32 * ((nirqs & 0x1f) + 1);
+
+	icciidr = gic_c_read_4(GICC_IIDR);
+	device_printf(dev,"pn 0x%x, arch 0x%x, rev 0x%x, implementer 0x%x nirqs %u\n", 
+			icciidr>>20, (icciidr>>16) & 0xF, (icciidr>>12) & 0xf,
+			(icciidr & 0xfff), nirqs);
+
+	/* Set all global interrupts to be level triggered, active low. */
+	for (i = 32; i < nirqs; i += 32) {
+		gic_d_write_4(GICD_ICFGR(i >> 5), 0x00000000);
+	}
+
+	/* Disable all interrupts. */
+	for (i = 32; i < nirqs; i += 32) {
+		gic_d_write_4(GICD_ICENABLER(i >> 5), 0xFFFFFFFF);
+	}
+
+	/* Route all interrupts to CPU0 and set priority to 0 */
+	for (i = 32; i < nirqs; i += 32) {
+		gic_d_write_4(GICD_IPRIORITYR(i >> 5), 0x00000000);
+		gic_d_write_4(GICD_ITARGETSR(i >> 5), 0x01010101);
+	}
+
+	/* Enable CPU interface */
+	gic_c_write_4(GICC_CTLR, 1);
+
+	/* Enable interrupt distribution */
+	gic_d_write_4(GICD_CTLR, 0x01);
+
+
+	return (0);
+}
+
+static device_method_t arm_gic_methods[] = {
+	DEVMETHOD(device_probe,		arm_gic_probe),
+	DEVMETHOD(device_attach,	arm_gic_attach),
+	{ 0, 0 }
+};
+
+static driver_t arm_gic_driver = {
+	"gic",
+	arm_gic_methods,
+	sizeof(struct arm_gic_softc),
+};
+
+static devclass_t arm_gic_devclass;
+
+DRIVER_MODULE(gic, simplebus, arm_gic_driver, arm_gic_devclass, 0, 0);
+
+int
+arm_get_next_irq(int last_irq)
+{
+	uint32_t active_irq;
+
+	/* clean-up the last IRQ */
+	if (last_irq != -1) {
+		gic_c_write_4(GICC_EOIR, last_irq);
+	}
+
+	active_irq = gic_c_read_4(GICC_IAR);
+	active_irq &= 0x3FF;
+
+	if (active_irq == 0x3FF) {
+		if (last_irq == -1)
+			printf("Spurious interrupt detected [0x%08x]\n", active_irq);
+		return -1;
+	}
+
+	return active_irq;
+}
+
+void
+arm_mask_irq(uintptr_t nb)
+{
+	gic_d_write_4(GICD_ICENABLER(nb >> 5), (1UL << (nb & 0x1F)));
+}
+
+void
+arm_unmask_irq(uintptr_t nb)
+{
+	gic_d_write_4(GICD_ISENABLER(nb >> 5), (1UL << (nb & 0x1F)));
+}

Modified: projects/armv6/sys/arm/ti/omap4/files.omap44xx
==============================================================================
--- projects/armv6/sys/arm/ti/omap4/files.omap44xx	Tue Feb  7 03:37:29 2012	(r231109)
+++ projects/armv6/sys/arm/ti/omap4/files.omap44xx	Tue Feb  7 03:41:08 2012	(r231110)
@@ -10,20 +10,24 @@ arm/arm/cpufunc_asm_arm11.S			standard
 arm/arm/cpufunc_asm_armv7.S			standard
 arm/arm/irq_dispatch.S				standard
 
-arm/ti/omap_machdep.c				standard
-arm/ti/omap.c					standard
-arm/ti/omap_cpuid.c				standard
-arm/ti/omap_prcm.c				standard
-arm/ti/omap_scm.c				standard
-arm/ti/omap_if.m				standard
 
-arm/ti/omap4/omap4_if.m			standard
-arm/ti/omap4/omap44xx.c			standard
-arm/ti/omap4/omap4_intr.c			standard
-arm/ti/omap4/omap4_prcm_clks.c		standard
-arm/ti/omap4/omap4_scm_padconf.c		standard
-arm/ti/omap4/omap4_timer.c			standard
+arm/ti/ti_machdep.c				standard
+# arm/ti/omap.c					standard
+arm/ti/ti_cpuid.c				standard
+# arm/ti/omap_prcm.c				standard
+# arm/ti/omap_scm.c				standard
+# arm/ti/omap_if.m				standard
+arm/ti/timer.c					standard
+arm/ti/gic.c					standard
 
-arm/ti/omap4/uart_cpu_omap4.c			optional	uart
+arm/ti/common.c					standard
+arm/ti/bus_space.c				standard
+
+# arm/ti/omap4/omap4_if.m			standard
+# arm/ti/omap4/omap44xx.c			standard
+# arm/ti/omap4/omap4_intr.c			standard
+# arm/ti/omap4/omap4_prcm_clks.c		standard
+# arm/ti/omap4/omap4_scm_padconf.c		standard
+# arm/ti/omap4/omap4_timer.c			standard
 
 dev/uart/uart_dev_ns8250.c			optional	uart

Modified: projects/armv6/sys/arm/ti/omap4/pandaboard/files.pandaboard
==============================================================================
--- projects/armv6/sys/arm/ti/omap4/pandaboard/files.pandaboard	Tue Feb  7 03:37:29 2012	(r231109)
+++ projects/armv6/sys/arm/ti/omap4/pandaboard/files.pandaboard	Tue Feb  7 03:41:08 2012	(r231110)
@@ -1,3 +1,3 @@
 # $FreeBSD$
 
-arm/ti/omap4/pandaboard/pandaboard.c		standard
+# arm/ti/omap4/pandaboard/pandaboard.c		standard

Modified: projects/armv6/sys/arm/ti/omapvar.h
==============================================================================
--- projects/armv6/sys/arm/ti/omapvar.h	Tue Feb  7 03:37:29 2012	(r231109)
+++ projects/armv6/sys/arm/ti/omapvar.h	Tue Feb  7 03:41:08 2012	(r231110)
@@ -50,7 +50,7 @@
 #include <machine/resource.h>
 #include <machine/intr.h>
 
-#include <arm/ti/omap_cpuid.h>
+#include <arm/ti/ti_cpuid.h>
 
 
 /*

Copied and modified: projects/armv6/sys/arm/ti/ti_cpuid.c (from r231102, projects/armv6/sys/arm/ti/omap_cpuid.c)
==============================================================================
--- projects/armv6/sys/arm/ti/omap_cpuid.c	Mon Feb  6 21:50:11 2012	(r231102, copy source)
+++ projects/armv6/sys/arm/ti/ti_cpuid.c	Tue Feb  7 03:41:08 2012	(r231110)
@@ -39,6 +39,7 @@ __FBSDID("$FreeBSD$");
 #include <sys/mutex.h>
 
 #include <machine/bus.h>
+#include <machine/fdt.h>
 #include <machine/cpu.h>
 #include <machine/cpufunc.h>
 #include <machine/frame.h>
@@ -46,28 +47,29 @@ __FBSDID("$FreeBSD$");
 #include <machine/intr.h>
 
 #include <arm/ti/omapvar.h>
-#include <arm/ti/omap_cpuid.h>
+#include <arm/ti/ti_cpuid.h>
 
 #include <arm/ti/omap4/omap44xx_reg.h>
 #include <arm/ti/omap3/omap35xx_reg.h>
+#ifdef notyet
+#include <arm/ti/am335x/am335x_reg.h>
+#endif
 
-#define OMAP4_STD_FUSE_DIE_ID_0    0x2200 
+#define OMAP4_STD_FUSE_DIE_ID_0    0x2200
 #define OMAP4_ID_CODE              0x2204
-#define OMAP4_STD_FUSE_DIE_ID_1    0x2208 
-#define OMAP4_STD_FUSE_DIE_ID_2    0x220C 
-#define OMAP4_STD_FUSE_DIE_ID_3    0x2210 
-#define OMAP4_STD_FUSE_PROD_ID_0   0x2214 
+#define OMAP4_STD_FUSE_DIE_ID_1    0x2208
+#define OMAP4_STD_FUSE_DIE_ID_2    0x220C
+#define OMAP4_STD_FUSE_DIE_ID_3    0x2210
+#define OMAP4_STD_FUSE_PROD_ID_0   0x2214
 #define OMAP4_STD_FUSE_PROD_ID_1   0x2218
 
 #define OMAP3_ID_CODE              0xA204
 
-#define REG_READ32(r)              *((volatile uint32_t*)(r))
-
 static uint32_t chip_revision = 0xffffffff;
 
 /**
- *	omap_revision - Returns the revision number of the device
- * 
+ *	ti_revision - Returns the revision number of the device
+ *
  *	Simply returns an identifier for the revision of the chip we are running
  *	on.
  *
@@ -75,14 +77,14 @@ static uint32_t chip_revision = 0xffffff
  *	A 32-bit identifier for the current chip
  */
 uint32_t
-omap_revision(void)
+ti_revision(void)
 {
 	return chip_revision;
 }
 
 /**
  *	omap4_get_revision - determines omap4 revision
- * 
+ *
  *	Reads the registers to determine the revision of the chip we are currently
  *	running on.  Stores the information in global variables.
  *
@@ -94,25 +96,30 @@ omap4_get_revision(void)
 	uint32_t id_code;
 	uint32_t revision;
 	uint32_t hawkeye;
+	bus_space_handle_t bsh;
 
 	/* The chip revsion is read from the device identification registers and
 	 * the JTAG (?) tap registers, which are located in address 0x4A00_2200 to
 	 * 0x4A00_2218.  This is part of the L4_CORE memory range and should have
 	 * been mapped in by the machdep.c code.
 	 *
-	 *   STD_FUSE_DIE_ID_0    0x4A00 2200 
+	 *   STD_FUSE_DIE_ID_0    0x4A00 2200
 	 *   ID_CODE              0x4A00 2204   (this is the only one we need)
-	 *   STD_FUSE_DIE_ID_1    0x4A00 2208 
-	 *   STD_FUSE_DIE_ID_2    0x4A00 220C 
-	 *   STD_FUSE_DIE_ID_3    0x4A00 2210 
-	 *   STD_FUSE_PROD_ID_0   0x4A00 2214 
+	 *   STD_FUSE_DIE_ID_1    0x4A00 2208
+	 *   STD_FUSE_DIE_ID_2    0x4A00 220C
+	 *   STD_FUSE_DIE_ID_3    0x4A00 2210
+	 *   STD_FUSE_PROD_ID_0   0x4A00 2214
 	 *   STD_FUSE_PROD_ID_1   0x4A00 2218
 	 */
-	id_code = REG_READ32(OMAP44XX_L4_CORE_VBASE + OMAP4_ID_CODE);
-	
+	// id_code = REG_READ32(OMAP44XX_L4_CORE_VBASE + OMAP4_ID_CODE); 
+	//FIXME Should we map somewhere else?
+	bus_space_map(fdtbus_bs_tag,OMAP44XX_L4_CORE_HWBASE, 0x4000, 0, &bsh);
+	id_code = bus_space_read_4(fdtbus_bs_tag, bsh, OMAP4_ID_CODE);
+	bus_space_unmap(fdtbus_bs_tag, bsh, 0x4000);
+
 	hawkeye = ((id_code >> 12) & 0xffff);
 	revision = ((id_code >> 28) & 0xf);
-	
+
 	/* Apparently according to the linux code there were some ES2.0 samples that
 	 * have the wrong id code and report themselves as ES1.0 silicon.  So used
 	 * the ARM cpuid to get the correct revision.
@@ -121,7 +128,7 @@ omap4_get_revision(void)
 		id_code = cpufunc_id();
 		revision = (id_code & 0xf) - 1;
 	}
-	
+
 	switch (hawkeye) {
 	case 0xB852:
 		if (revision == 0)
@@ -142,19 +149,19 @@ omap4_get_revision(void)
 		chip_revision = OMAP4430_REV_ES2_3;
 		break;
 	}
-			
-	printf("OMAP%04x ES%u.%u\n", OMAP_REV_DEVICE(chip_revision),
-	       OMAP_REV_MAJOR(chip_revision), OMAP_REV_MINOR(chip_revision));
+	printf("Texas Instruments OMAP%04x Processor, Revision ES%u.%u\n",
+		OMAP_REV_DEVICE(chip_revision), OMAP_REV_MAJOR(chip_revision), 
+		OMAP_REV_MINOR(chip_revision));
 }
 
 /**
  *	omap3_get_revision - determines omap3 revision
- * 
+ *
  *	Reads the registers to determine the revision of the chip we are currently
  *	running on.  Stores the information in global variables.
  *
  *	WARNING: This function currently only really works for OMAP3530 devices.
- *	
+ *
  *
  *
  */
@@ -164,6 +171,7 @@ omap3_get_revision(void)
 	uint32_t id_code;
 	uint32_t revision;
 	uint32_t hawkeye;
+	bus_space_handle_t bsh;
 
 	/* The chip revsion is read from the device identification registers and
 	 * the JTAG (?) tap registers, which are located in address 0x4A00_2200 to
@@ -174,8 +182,11 @@ omap3_get_revision(void)
 	 *
 	 *
 	 */
-	id_code = REG_READ32(OMAP35XX_L4_WAKEUP_VBASE + OMAP3_ID_CODE);
-	
+	//id_code = REG_READ32(OMAP35XX_L4_WAKEUP_VBASE + OMAP3_ID_CODE);
+	bus_space_map(fdtbus_bs_tag,OMAP35XX_L4_WAKEUP_HWBASE, 0x10000, 0, &bsh);
+	id_code = bus_space_read_4(fdtbus_bs_tag, bsh, OMAP3_ID_CODE);
+	bus_space_unmap(fdtbus_bs_tag, bsh, 0x4000);
+
 	hawkeye = ((id_code >> 12) & 0xffff);
 	revision = ((id_code >> 28) & 0xf);
 
@@ -200,15 +211,56 @@ omap3_get_revision(void)
 		chip_revision = OMAP3530_REV_ES3_1_2;
 		break;
 	}
+	printf("Texas Instruments OMAP%04x Processor, Revision ES%u.%u\n",
+		OMAP_REV_DEVICE(chip_revision), OMAP_REV_MAJOR(chip_revision), 
+		OMAP_REV_MINOR(chip_revision));
+}
+
+#ifdef notyet
+static void
+am335x_get_revision(void)
+{
+	uint32_t dev_feature;
+	uint8_t cpu_last_char;
+	bus_space_handle_t bsh;
+
+	bus_space_map(fdtbus_bs_tag, AM335X_CONTROL_BASE, AM335X_CONTROL_SIZE, 0, &bsh);
+	chip_revision = bus_space_read_4(fdtbus_bs_tag, bsh, AM335X_CONTROL_DEVICE_ID);
+	dev_feature = bus_space_read_4(fdtbus_bs_tag, bsh, AM335X_CONTROL_DEV_FEATURE);
+	bus_space_unmap(fdtbus_bs_tag, bsh, AM335X_CONTROL_SIZE);
+
+	switch (dev_feature) {
+		case 0x00FF0382:
+			cpu_last_char='2';
+			break;
+		case 0x20FF0382:
+			cpu_last_char='4';
+			break;
+		case 0x00FF0383:
+			cpu_last_char='6';
+			break;
+		case 0x00FE0383:
+			cpu_last_char='7';
+			break;
+		case 0x20FF0383:
+			cpu_last_char='8';
+			break;
+		case 0x20FE0383:
+			cpu_last_char='9';
+			break;
+		default:
+			cpu_last_char='x';
+	}
 
-	printf("OMAP%04x ES%u.%u\n", OMAP_REV_DEVICE(chip_revision),
-	       OMAP_REV_MAJOR(chip_revision), OMAP_REV_MINOR(chip_revision));
+	printf("Texas Instruments AM335%c Processor, Revision ES1.%u\n",
+		cpu_last_char, AM335X_DEVREV(chip_revision));
 }
+#endif
 
 /**
- *	omap_cpu_ident - attempts to identify the chip we are running on
+ *	ti_cpu_ident - attempts to identify the chip we are running on
  *	@dummy: ignored
- * 
+ *
  *	This function is called before any of the driver are initialised, however
  *	the basic virt to phys maps have been setup in machdep.c so we can still
  *	access the required registers, we just have to use direct register reads
@@ -217,18 +269,23 @@ omap3_get_revision(void)
  *
  */
 static void
-omap_cpu_ident(void *dummy)
+ti_cpu_ident(void *dummy)
 {
-	switch(omap_chip()) {
+	switch(ti_chip()) {
 	case CHIP_OMAP_3:
 		omap3_get_revision();
 		break;
 	case CHIP_OMAP_4:
 		omap4_get_revision();
 		break;
+#ifdef notyet
+	case CHIP_AM335X:
+		am335x_get_revision();
+		break;
+#endif
 	default:
-		panic("Unknown OMAP chip type, fixme!\n");
+		panic("Unknown chip type, fixme!\n");
 	}
 }
 
-SYSINIT(omap_cpu_ident, SI_SUB_CPU, SI_ORDER_SECOND, omap_cpu_ident, NULL);
+SYSINIT(ti_cpu_ident, SI_SUB_CPU, SI_ORDER_SECOND, ti_cpu_ident, NULL);

Copied and modified: projects/armv6/sys/arm/ti/ti_cpuid.h (from r231102, projects/armv6/sys/arm/ti/omap_cpuid.h)
==============================================================================
--- projects/armv6/sys/arm/ti/omap_cpuid.h	Mon Feb  6 21:50:11 2012	(r231102, copy source)
+++ projects/armv6/sys/arm/ti/ti_cpuid.h	Tue Feb  7 03:41:08 2012	(r231110)
@@ -25,8 +25,8 @@
  * SUCH DAMAGE.
  */
 
-#ifndef _OMAP_CPUID_H_
-#define	_OMAP_CPUID_H_
+#ifndef _TI_CPUID_H_
+#define	_TI_CPUID_H_
 
 #define OMAP_MAKEREV(d, a, b, c) \
 	(uint32_t)(((d) << 16) | (((a) & 0xf) << 8) | (((b) & 0xf) << 4) | ((c) & 0xf))
@@ -36,36 +36,38 @@
 #define OMAP_REV_MINOR(x)       (((x) >> 4) & 0xf)
 #define OMAP_REV_MINOR_MINOR(x) (((x) >> 0) & 0xf)
 
-#define OMAP3530_DEV            0x3530
-#define OMAP4430_DEV            0x4430
+#define OMAP3350_REV_ES1_0      OMAP_MAKEREV(0x3530, 1, 0, 0)
+#define OMAP3530_REV_ES2_0      OMAP_MAKEREV(0x3530, 2, 0, 0)
+#define OMAP3530_REV_ES2_1      OMAP_MAKEREV(0x3530, 2, 1, 0)
+#define OMAP3530_REV_ES3_0      OMAP_MAKEREV(0x3530, 3, 0, 0)
+#define OMAP3530_REV_ES3_1      OMAP_MAKEREV(0x3530, 3, 1, 0)
+#define OMAP3530_REV_ES3_1_2    OMAP_MAKEREV(0x3530, 3, 1, 2)
+
+#define OMAP4430_REV_ES1_0      OMAP_MAKEREV(0x4430, 1, 0, 0)
+#define OMAP4430_REV_ES2_0      OMAP_MAKEREV(0x4430, 2, 0, 0)
+#define OMAP4430_REV_ES2_1      OMAP_MAKEREV(0x4430, 2, 1, 0)
+#define OMAP4430_REV_ES2_2      OMAP_MAKEREV(0x4430, 2, 2, 0)
+#define OMAP4430_REV_ES2_3      OMAP_MAKEREV(0x4430, 2, 3, 0)
+
+#define AM335X_DEVREV(x)	((x) >> 28)
+
+#define CHIP_OMAP_3	0
+#define CHIP_OMAP_4	1
+#define CHIP_AM335X	2
 
-#define OMAP3350_REV_ES1_0      OMAP_MAKEREV(OMAP3530_DEV, 1, 0, 0)
-#define OMAP3530_REV_ES2_0      OMAP_MAKEREV(OMAP3530_DEV, 2, 0, 0)
-#define OMAP3530_REV_ES2_1      OMAP_MAKEREV(OMAP3530_DEV, 2, 1, 0)
-#define OMAP3530_REV_ES3_0      OMAP_MAKEREV(OMAP3530_DEV, 3, 0, 0)
-#define OMAP3530_REV_ES3_1      OMAP_MAKEREV(OMAP3530_DEV, 3, 1, 0)
-#define OMAP3530_REV_ES3_1_2    OMAP_MAKEREV(OMAP3530_DEV, 3, 1, 2)
-
-#define OMAP4430_REV_ES1_0      OMAP_MAKEREV(OMAP4430_DEV, 1, 0, 0)
-#define OMAP4430_REV_ES2_0      OMAP_MAKEREV(OMAP4430_DEV, 2, 0, 0)
-#define OMAP4430_REV_ES2_1      OMAP_MAKEREV(OMAP4430_DEV, 2, 1, 0)
-#define OMAP4430_REV_ES2_2      OMAP_MAKEREV(OMAP4430_DEV, 2, 2, 0)
-#define OMAP4430_REV_ES2_3      OMAP_MAKEREV(OMAP4430_DEV, 2, 3, 0)
-
-#define	CHIP_OMAP_3	0
-#define	CHIP_OMAP_4	1
-
-static __inline int omap_chip(void)
+static __inline int ti_chip(void)
 {
 #if defined(SOC_OMAP4)
 	return CHIP_OMAP_4;
 #elif defined(SOC_OMAP3)
 	return CHIP_OMAP_3;
+#elif defined(SOC_TI_AM335X)
+	return CHIP_AM335X;
 #else
-#  error OMAP chip type not defined, ensure SOC_OMAPxxxx is defined
+#  error Chip type not defined, ensure SOC_xxxx is defined
 #endif
 }
 
-uint32_t omap_revision(void);
+uint32_t ti_revision(void);
 
-#endif  /* _OMAP_CPUID_H_ */
+#endif  /* _TI_CPUID_H_ */

Added: projects/armv6/sys/arm/ti/ti_machdep.c
==============================================================================
--- /dev/null	00:00:00 1970	(empty, because file is newly added)
+++ projects/armv6/sys/arm/ti/ti_machdep.c	Tue Feb  7 03:41:08 2012	(r231110)
@@ -0,0 +1,647 @@
+/*-
+ * Copyright (c) 1994-1998 Mark Brinicombe.
+ * Copyright (c) 1994 Brini.
+ * All rights reserved.
+ *
+ * This code is derived from software written for Brini by Mark Brinicombe
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *      This product includes software developed by Brini.
+ * 4. The name of the company nor the name of the author may be used to
+ *    endorse or promote products derived from this software without specific
+ *    prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * from: FreeBSD: //depot/projects/arm/src/sys/arm/at91/kb920x_machdep.c, rev 45
+ */
+
+#include "opt_ddb.h"
+#include "opt_platform.h"
+#include "opt_global.h"
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+
+#define _ARM32_BUS_DMA_PRIVATE
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/sysproto.h>
+#include <sys/signalvar.h>
+#include <sys/imgact.h>
+#include <sys/kernel.h>
+#include <sys/ktr.h>
+#include <sys/linker.h>
+#include <sys/lock.h>
+#include <sys/malloc.h>
+#include <sys/mutex.h>
+#include <sys/pcpu.h>
+#include <sys/proc.h>
+#include <sys/ptrace.h>
+#include <sys/cons.h>
+#include <sys/bio.h>
+#include <sys/bus.h>
+#include <sys/buf.h>
+#include <sys/exec.h>
+#include <sys/kdb.h>
+#include <sys/msgbuf.h>
+#include <machine/reg.h>
+#include <machine/cpu.h>
+#include <machine/fdt.h>
+
+#include <dev/fdt/fdt_common.h>
+#include <dev/ofw/openfirm.h>
+
+#include <vm/vm.h>
+#include <vm/pmap.h>
+#include <vm/vm_object.h>
+#include <vm/vm_page.h>
+#include <vm/vm_pager.h>
+#include <vm/vm_map.h>
+#include <machine/pte.h>
+#include <machine/pmap.h>
+#include <machine/vmparam.h>
+#include <machine/pcb.h>
+#include <machine/undefined.h>
+#include <machine/machdep.h>
+#include <machine/metadata.h>
+#include <machine/armreg.h>
+#include <machine/bus.h>
+#include <sys/reboot.h>
+
+#include <arm/ti/omap4/omap44xx_reg.h>
+
+#define  DEBUG
+#ifdef  DEBUG
+#define debugf(fmt, args...) printf(fmt, ##args)
+#else
+#define debugf(fmt, args...)
+#endif
+
+/*
+ * This is the number of L2 page tables required for covering max
+ * (hypothetical) memsize of 4GB and all kernel mappings (vectors, msgbuf,
+ * stacks etc.), uprounded to be divisible by 4.
+ */
+#define KERNEL_PT_MAX	78
+
+/* Define various stack sizes in pages */
+#define IRQ_STACK_SIZE	1
+#define ABT_STACK_SIZE	1
+#define UND_STACK_SIZE	1
+
+extern unsigned char kernbase[];
+extern unsigned char _etext[];
+extern unsigned char _edata[];
+extern unsigned char __bss_start[];
+extern unsigned char _end[];
+
+#ifdef DDB
+extern vm_offset_t ksym_start, ksym_end;
+#endif
+
+extern u_int data_abort_handler_address;
+extern u_int prefetch_abort_handler_address;
+extern u_int undefined_handler_address;
+
+extern vm_offset_t pmap_bootstrap_lastaddr;
+extern int *end;
+
+struct pv_addr kernel_pt_table[KERNEL_PT_MAX];
+
+/* Physical and virtual addresses for some global pages */
+vm_paddr_t phys_avail[10];
+vm_paddr_t dump_avail[4];
+vm_offset_t physical_pages;
+vm_offset_t pmap_bootstrap_lastaddr;
+vm_paddr_t pmap_pa;
+
+const struct pmap_devmap *pmap_devmap_bootstrap_table;
+struct pv_addr systempage;
+struct pv_addr msgbufpv;
+struct pv_addr irqstack;
+struct pv_addr undstack;
+struct pv_addr abtstack;
+struct pv_addr kernelstack;
+
+void set_stackptrs(int cpu);
+
+static struct trapframe proc0_tf;
+
+static struct mem_region availmem_regions[FDT_MEM_REGIONS];
+static int availmem_regions_sz;
+
+static void print_kenv(void);
+static void print_kernel_section_addr(void);
+
+static void physmap_init(void);
+static int platform_devmap_init(void);
+
+static char *
+kenv_next(char *cp)
+{
+
+	if (cp != NULL) {
+		while (*cp != 0)
+			cp++;
+		cp++;
+		if (*cp == 0)
+			cp = NULL;
+	}
+	return (cp);
+}
+

*** DIFF OUTPUT TRUNCATED AT 1000 LINES ***


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