svn commit: r198626 - projects/mips/sys/dev/rmi/xlr
Randall Stewart
rrs at FreeBSD.org
Thu Oct 29 21:21:02 UTC 2009
Author: rrs
Date: Thu Oct 29 21:21:01 2009
New Revision: 198626
URL: http://svn.freebsd.org/changeset/base/198626
Log:
white space changes
Modified:
projects/mips/sys/dev/rmi/xlr/rge.c
projects/mips/sys/dev/rmi/xlr/rge.h
projects/mips/sys/dev/rmi/xlr/xgmac_mdio.h
Modified: projects/mips/sys/dev/rmi/xlr/rge.c
==============================================================================
--- projects/mips/sys/dev/rmi/xlr/rge.c Thu Oct 29 21:14:10 2009 (r198625)
+++ projects/mips/sys/dev/rmi/xlr/rge.c Thu Oct 29 21:21:01 2009 (r198626)
@@ -79,7 +79,7 @@
#include <machine/param.h>
#include <machine/intr_machdep.h>
#include <machine/clock.h> /* for DELAY */
-#include <machine/bus.h> /* */
+#include <machine/bus.h> /* */
#include <machine/resource.h>
#include <mips/rmi/interrupt.h>
#include <mips/rmi/msgring.h>
@@ -117,7 +117,8 @@ MODULE_DEPEND(rge, miibus, 1, 1, 1);
#ifdef DEBUG
#undef dbg_msg
-int mac_debug = 1;
+int mac_debug = 1;
+
#define dbg_msg(fmt, args...) \
do {\
if (mac_debug) {\
@@ -130,7 +131,8 @@ int mac_debug = 1;
#else
#undef dbg_msg
#define dbg_msg(fmt, args...)
-int mac_debug = 0;
+int mac_debug = 0;
+
#endif
#define MAC_B2B_IPG 88
@@ -165,12 +167,13 @@ int mac_debug = 0;
extern uint32_t cpu_ltop_map[32];
#ifdef ENABLED_DEBUG
-static int port_counters[4][8] __aligned(XLR_CACHELINE_SIZE);
+static int port_counters[4][8] __aligned(XLR_CACHELINE_SIZE);
+
#define port_inc_counter(port, counter) atomic_add_int(&port_counters[port][(counter)], 1)
#define port_set_counter(port, counter, value) atomic_set_int(&port_counters[port][(counter)], (value))
#else
-#define port_inc_counter(port, counter) /*Nothing*/
-#define port_set_counter(port, counter, value) /*Nothing*/
+#define port_inc_counter(port, counter) /* Nothing */
+#define port_set_counter(port, counter, value) /* Nothing */
#endif
int xlr_rge_tx_prepend[MAXCPU];
@@ -181,20 +184,21 @@ int xlr_rge_tx_ok_done[MAXCPU];
int xlr_rge_rx_done[MAXCPU];
int xlr_rge_repl_done[MAXCPU];
-static __inline__ unsigned int
+static __inline__ unsigned int
ldadd_wu(unsigned int value, unsigned long *addr)
{
- __asm__ __volatile__( ".set push\n"
- ".set noreorder\n"
- "move $8, %2\n"
- "move $9, %3\n"
- /* "ldaddwu $8, $9\n" */
- ".word 0x71280011\n"
- "move %0, $8\n"
- ".set pop\n"
- : "=&r"(value), "+m"(*addr)
- : "0"(value), "r" ((unsigned long)addr)
- : "$8", "$9");
+ __asm__ __volatile__(".set push\n"
+ ".set noreorder\n"
+ "move $8, %2\n"
+ "move $9, %3\n"
+ /* "ldaddwu $8, $9\n" */
+ ".word 0x71280011\n"
+ "move %0, $8\n"
+ ".set pop\n"
+ : "=&r"(value), "+m"(*addr)
+ : "0"(value), "r"((unsigned long)addr)
+ : "$8", "$9");
+
return value;
}
@@ -212,85 +216,86 @@ ldadd_wu(unsigned int value, unsigned lo
#define XLR_MAX_MACS 8
#define XLR_MAX_TX_FRAGS 14
-#define MAX_P2D_DESC_PER_PORT 512
+#define MAX_P2D_DESC_PER_PORT 512
struct p2d_tx_desc {
- uint64_t frag [XLR_MAX_TX_FRAGS + 2];
+ uint64_t frag[XLR_MAX_TX_FRAGS + 2];
};
+
#define MAX_TX_RING_SIZE (XLR_MAX_MACS * MAX_P2D_DESC_PER_PORT * sizeof(struct p2d_tx_desc))
struct rge_softc *dev_mac[XLR_MAX_MACS];
-static int dev_mac_xgs0;
-static int dev_mac_gmac0;
+static int dev_mac_xgs0;
+static int dev_mac_gmac0;
-static int gmac_common_init_done;
+static int gmac_common_init_done;
-static int rge_probe(device_t);
-static int rge_attach(device_t);
-static int rge_detach(device_t);
-static int rge_suspend(device_t);
-static int rge_resume(device_t);
-static void rge_release_resources(struct rge_softc *);
-static void rge_rx(struct rge_softc *, vm_paddr_t paddr, int);
-static void rge_intr(void *);
-static void rge_start_locked(struct ifnet *, int);
-static void rge_start(struct ifnet *);
-static int rge_ioctl(struct ifnet *, u_long, caddr_t);
-static void rge_init(void *);
-static void rge_stop(struct rge_softc *);
-static void rge_watchdog(struct ifnet *);
-static int rge_shutdown(device_t);
-static void rge_reset(struct rge_softc *);
+static int rge_probe(device_t);
+static int rge_attach(device_t);
+static int rge_detach(device_t);
+static int rge_suspend(device_t);
+static int rge_resume(device_t);
+static void rge_release_resources(struct rge_softc *);
+static void rge_rx(struct rge_softc *, vm_paddr_t paddr, int);
+static void rge_intr(void *);
+static void rge_start_locked(struct ifnet *, int);
+static void rge_start(struct ifnet *);
+static int rge_ioctl(struct ifnet *, u_long, caddr_t);
+static void rge_init(void *);
+static void rge_stop(struct rge_softc *);
+static void rge_watchdog(struct ifnet *);
+static int rge_shutdown(device_t);
+static void rge_reset(struct rge_softc *);
static struct mbuf *get_mbuf(void);
-static void free_buf(vm_paddr_t paddr);
-static void *get_buf(void);
+static void free_buf(vm_paddr_t paddr);
+static void *get_buf(void);
-static void xlr_mac_get_hwaddr(struct rge_softc *);
-static void xlr_mac_setup_hwaddr(struct driver_data *);
-static void rmi_xlr_mac_set_enable(struct driver_data *priv, int flag);
-static void rmi_xlr_xgmac_init(struct driver_data *priv);
-static void rmi_xlr_gmac_init(struct driver_data *priv);
-static void mac_common_init(void);
-static int rge_mii_write(device_t, int, int, int);
-static int rge_mii_read(device_t, int, int);
-static void rmi_xlr_mac_mii_statchg(device_t);
-static int rmi_xlr_mac_mediachange(struct ifnet *);
-static void rmi_xlr_mac_mediastatus(struct ifnet *, struct ifmediareq *);
-static void xlr_mac_set_rx_mode(struct rge_softc *sc);
-void
+static void xlr_mac_get_hwaddr(struct rge_softc *);
+static void xlr_mac_setup_hwaddr(struct driver_data *);
+static void rmi_xlr_mac_set_enable(struct driver_data *priv, int flag);
+static void rmi_xlr_xgmac_init(struct driver_data *priv);
+static void rmi_xlr_gmac_init(struct driver_data *priv);
+static void mac_common_init(void);
+static int rge_mii_write(device_t, int, int, int);
+static int rge_mii_read(device_t, int, int);
+static void rmi_xlr_mac_mii_statchg(device_t);
+static int rmi_xlr_mac_mediachange(struct ifnet *);
+static void rmi_xlr_mac_mediastatus(struct ifnet *, struct ifmediareq *);
+static void xlr_mac_set_rx_mode(struct rge_softc *sc);
+void
rmi_xlr_mac_msgring_handler(int bucket, int size, int code,
- int stid, struct msgrng_msg *msg,
- void *data);
-static void mac_frin_replenish(void *);
-static int rmi_xlr_mac_open(struct rge_softc *);
-static int rmi_xlr_mac_close(struct rge_softc *);
-static int
+ int stid, struct msgrng_msg *msg,
+ void *data);
+static void mac_frin_replenish(void *);
+static int rmi_xlr_mac_open(struct rge_softc *);
+static int rmi_xlr_mac_close(struct rge_softc *);
+static int
mac_xmit(struct mbuf *, struct rge_softc *,
- struct driver_data *, int, struct p2d_tx_desc *);
-static int rmi_xlr_mac_xmit(struct mbuf *, struct rge_softc *, int, struct p2d_tx_desc *);
+ struct driver_data *, int, struct p2d_tx_desc *);
+static int rmi_xlr_mac_xmit(struct mbuf *, struct rge_softc *, int, struct p2d_tx_desc *);
static struct rge_softc_stats *rmi_xlr_mac_get_stats(struct rge_softc *sc);
-static void rmi_xlr_mac_set_multicast_list(struct rge_softc *sc);
-static int rmi_xlr_mac_change_mtu(struct rge_softc *sc, int new_mtu);
-static int rmi_xlr_mac_fill_rxfr(struct rge_softc *sc);
-static void rmi_xlr_config_spill_area(struct driver_data *priv);
-static int rmi_xlr_mac_set_speed(struct driver_data *s, xlr_mac_speed_t speed);
-static int
+static void rmi_xlr_mac_set_multicast_list(struct rge_softc *sc);
+static int rmi_xlr_mac_change_mtu(struct rge_softc *sc, int new_mtu);
+static int rmi_xlr_mac_fill_rxfr(struct rge_softc *sc);
+static void rmi_xlr_config_spill_area(struct driver_data *priv);
+static int rmi_xlr_mac_set_speed(struct driver_data *s, xlr_mac_speed_t speed);
+static int
rmi_xlr_mac_set_duplex(struct driver_data *s,
- xlr_mac_duplex_t duplex, xlr_mac_fc_t fc);
+ xlr_mac_duplex_t duplex, xlr_mac_fc_t fc);
static void serdes_regs_init(struct driver_data *priv);
static int rmi_xlr_gmac_reset(struct driver_data *priv);
/*Statistics...*/
static int get_p2d_desc_failed = 0;
-static int msg_snd_failed =0;
+static int msg_snd_failed = 0;
SYSCTL_INT(_hw, OID_AUTO, get_p2d_failed, CTLFLAG_RW,
- &get_p2d_desc_failed, 0, "p2d desc failed");
+ &get_p2d_desc_failed, 0, "p2d desc failed");
SYSCTL_INT(_hw, OID_AUTO, msg_snd_failed, CTLFLAG_RW,
- &msg_snd_failed, 0, "msg snd failed");
+ &msg_snd_failed, 0, "msg snd failed");
-struct callout xlr_tx_stop_bkp;
+struct callout xlr_tx_stop_bkp;
static device_method_t rge_methods[] = {
/* Device interface */
@@ -308,7 +313,7 @@ static device_method_t rge_methods[] = {
{0, 0}
};
-static driver_t rge_driver = {
+static driver_t rge_driver = {
"rge",
rge_methods,
sizeof(struct rge_softc)
@@ -328,60 +333,61 @@ DRIVER_MODULE(miibus, rge, miibus_driver
#define XKPHYS 0x8000000000000000
-static __inline__ uint32_t
+static __inline__ uint32_t
lw_40bit_phys(uint64_t phys, int cca)
{
- uint64_t addr;
- uint32_t value = 0;
- unsigned long flags;
+ uint64_t addr;
+ uint32_t value = 0;
+ unsigned long flags;
+
+ addr = XKPHYS | ((uint64_t) cca << 59) | (phys & 0xfffffffffcULL);
- addr = XKPHYS | ((uint64_t)cca << 59) | (phys & 0xfffffffffcULL);
-
enable_KX(flags);
- __asm__ __volatile__(
- ".set push\n"
- ".set noreorder\n"
- ".set mips64\n"
- "lw %0, 0(%1) \n"
- ".set pop\n"
- : "=r" (value)
- : "r" (addr) );
+ __asm__ __volatile__(
+ ".set push\n"
+ ".set noreorder\n"
+ ".set mips64\n"
+ "lw %0, 0(%1) \n"
+ ".set pop\n"
+ : "=r"(value)
+ : "r"(addr));
disable_KX(flags);
return value;
}
-static __inline__ uint64_t
+static __inline__ uint64_t
ld_40bit_phys(uint64_t phys, int cca)
{
- uint64_t addr;
- uint64_t value = 0;
- unsigned long flags;
+ uint64_t addr;
+ uint64_t value = 0;
+ unsigned long flags;
- addr = XKPHYS | ((uint64_t)cca << 59) | (phys & 0xfffffffffcULL);
+ addr = XKPHYS | ((uint64_t) cca << 59) | (phys & 0xfffffffffcULL);
enable_KX(flags);
- __asm__ __volatile__(
- ".set push\n"
- ".set noreorder\n"
- ".set mips64\n"
- "ld %0, 0(%1) \n"
- ".set pop\n"
- : "=r" (value)
- : "r" (addr));
+ __asm__ __volatile__(
+ ".set push\n"
+ ".set noreorder\n"
+ ".set mips64\n"
+ "ld %0, 0(%1) \n"
+ ".set pop\n"
+ : "=r"(value)
+ : "r"(addr));
disable_KX(flags);
return value;
}
-void *xlr_tx_ring_mem;
+void *xlr_tx_ring_mem;
struct tx_desc_node {
struct p2d_tx_desc *ptr;
- TAILQ_ENTRY (tx_desc_node) list;
+ TAILQ_ENTRY(tx_desc_node) list;
};
+
#define XLR_MAX_TX_DESC_NODES (XLR_MAX_MACS * MAX_P2D_DESC_PER_PORT)
struct tx_desc_node tx_desc_nodes[XLR_MAX_TX_DESC_NODES];
static volatile int xlr_tot_avail_p2d[XLR_MAX_CORE];
@@ -391,37 +397,38 @@ static int xlr_total_active_core = 0;
* This should contain the list of all free tx frag desc nodes pointing to tx
* p2d arrays
*/
-static
+static
TAILQ_HEAD(, tx_desc_node) tx_frag_desc[XLR_MAX_CORE] =
- {
- TAILQ_HEAD_INITIALIZER(tx_frag_desc[0]),
- TAILQ_HEAD_INITIALIZER(tx_frag_desc[1]),
- TAILQ_HEAD_INITIALIZER(tx_frag_desc[2]),
- TAILQ_HEAD_INITIALIZER(tx_frag_desc[3]),
- TAILQ_HEAD_INITIALIZER(tx_frag_desc[4]),
- TAILQ_HEAD_INITIALIZER(tx_frag_desc[5]),
- TAILQ_HEAD_INITIALIZER(tx_frag_desc[6]),
- TAILQ_HEAD_INITIALIZER(tx_frag_desc[7]),
- };
+{
+ TAILQ_HEAD_INITIALIZER(tx_frag_desc[0]),
+ TAILQ_HEAD_INITIALIZER(tx_frag_desc[1]),
+ TAILQ_HEAD_INITIALIZER(tx_frag_desc[2]),
+ TAILQ_HEAD_INITIALIZER(tx_frag_desc[3]),
+ TAILQ_HEAD_INITIALIZER(tx_frag_desc[4]),
+ TAILQ_HEAD_INITIALIZER(tx_frag_desc[5]),
+ TAILQ_HEAD_INITIALIZER(tx_frag_desc[6]),
+ TAILQ_HEAD_INITIALIZER(tx_frag_desc[7]),
+};
/* This contains a list of free tx frag node descriptors */
-static TAILQ_HEAD(, tx_desc_node) free_tx_frag_desc[XLR_MAX_CORE] =
- {
- TAILQ_HEAD_INITIALIZER(free_tx_frag_desc[0]),
- TAILQ_HEAD_INITIALIZER(free_tx_frag_desc[1]),
- TAILQ_HEAD_INITIALIZER(free_tx_frag_desc[2]),
- TAILQ_HEAD_INITIALIZER(free_tx_frag_desc[3]),
- TAILQ_HEAD_INITIALIZER(free_tx_frag_desc[4]),
- TAILQ_HEAD_INITIALIZER(free_tx_frag_desc[5]),
- TAILQ_HEAD_INITIALIZER(free_tx_frag_desc[6]),
- TAILQ_HEAD_INITIALIZER(free_tx_frag_desc[7]),
- };
+static
+TAILQ_HEAD(, tx_desc_node) free_tx_frag_desc[XLR_MAX_CORE] =
+{
+ TAILQ_HEAD_INITIALIZER(free_tx_frag_desc[0]),
+ TAILQ_HEAD_INITIALIZER(free_tx_frag_desc[1]),
+ TAILQ_HEAD_INITIALIZER(free_tx_frag_desc[2]),
+ TAILQ_HEAD_INITIALIZER(free_tx_frag_desc[3]),
+ TAILQ_HEAD_INITIALIZER(free_tx_frag_desc[4]),
+ TAILQ_HEAD_INITIALIZER(free_tx_frag_desc[5]),
+ TAILQ_HEAD_INITIALIZER(free_tx_frag_desc[6]),
+ TAILQ_HEAD_INITIALIZER(free_tx_frag_desc[7]),
+};
static struct mtx tx_desc_lock[XLR_MAX_CORE];
static inline void
-mac_make_desc_rfr(struct msgrng_msg *msg,
- vm_paddr_t addr)
+mac_make_desc_rfr(struct msgrng_msg *msg,
+ vm_paddr_t addr)
{
msg->msg0 = (uint64_t) addr & 0xffffffffe0ULL;
msg->msg1 = msg->msg2 = msg->msg3 = 0;
@@ -432,8 +439,8 @@ mac_make_desc_rfr(struct msgrng_msg *msg
static void
init_p2d_allocation(void)
{
- int active_core[8]= {0};
- int i=0;
+ int active_core[8] = {0};
+ int i = 0;
uint32_t cpumask;
int cpu;
@@ -442,43 +449,43 @@ init_p2d_allocation(void)
for (i = 0; i < 32; i++) {
if (cpumask & (1 << i)) {
cpu = cpu_ltop_map[i];
- if(!active_core[cpu/4]){
- active_core[cpu/4] = 1;
+ if (!active_core[cpu / 4]) {
+ active_core[cpu / 4] = 1;
xlr_total_active_core++;
}
}
}
- for(i=0; i<XLR_MAX_CORE; i++){
- if(active_core[i])
- xlr_tot_avail_p2d[i] = XLR_MAX_TX_DESC_NODES/xlr_total_active_core;
+ for (i = 0; i < XLR_MAX_CORE; i++) {
+ if (active_core[i])
+ xlr_tot_avail_p2d[i] = XLR_MAX_TX_DESC_NODES / xlr_total_active_core;
}
- printf("Total Active Core %d\n",xlr_total_active_core);
+ printf("Total Active Core %d\n", xlr_total_active_core);
}
static void
init_tx_ring(void)
{
- int i;
- int j=0;
+ int i;
+ int j = 0;
struct tx_desc_node *start, *node;
struct p2d_tx_desc *tx_desc;
- vm_paddr_t paddr;
- vm_offset_t unmapped_addr;
+ vm_paddr_t paddr;
+ vm_offset_t unmapped_addr;
- for(i=0; i<XLR_MAX_CORE; i++)
+ for (i = 0; i < XLR_MAX_CORE; i++)
mtx_init(&tx_desc_lock[i], "xlr tx_desc", NULL, MTX_SPIN);
start = &tx_desc_nodes[0];
/* TODO: try to get this from KSEG0 */
xlr_tx_ring_mem = contigmalloc((MAX_TX_RING_SIZE + XLR_CACHELINE_SIZE),
- M_DEVBUF, M_NOWAIT | M_ZERO, 0,
- 0x10000000, XLR_CACHELINE_SIZE, 0);
+ M_DEVBUF, M_NOWAIT | M_ZERO, 0,
+ 0x10000000, XLR_CACHELINE_SIZE, 0);
if (xlr_tx_ring_mem == NULL) {
panic("TX ring memory allocation failed");
}
- paddr = vtophys((vm_offset_t) xlr_tx_ring_mem);
+ paddr = vtophys((vm_offset_t)xlr_tx_ring_mem);
unmapped_addr = MIPS_PHYS_TO_KSEG0(paddr);
@@ -490,7 +497,7 @@ init_tx_ring(void)
node->ptr = tx_desc;
tx_desc++;
TAILQ_INSERT_HEAD(&tx_frag_desc[j], node, list);
- j = (i / (XLR_MAX_TX_DESC_NODES/xlr_total_active_core));
+ j = (i / (XLR_MAX_TX_DESC_NODES / xlr_total_active_core));
}
}
@@ -508,14 +515,14 @@ get_p2d_desc(void)
TAILQ_REMOVE(&tx_frag_desc[cpu], node, list);
tx_desc = node->ptr;
TAILQ_INSERT_HEAD(&free_tx_frag_desc[cpu], node, list);
- }else{
- /*Increment p2d desc fail count*/
+ } else {
+ /* Increment p2d desc fail count */
get_p2d_desc_failed++;
}
mtx_unlock_spin(&tx_desc_lock[cpu]);
return tx_desc;
}
-static void
+static void
free_p2d_desc(struct p2d_tx_desc *tx_desc)
{
struct tx_desc_node *node;
@@ -533,17 +540,18 @@ free_p2d_desc(struct p2d_tx_desc *tx_des
}
-static int
+static int
build_frag_list(struct mbuf *m_head, struct msgrng_msg *p2p_msg, struct p2d_tx_desc *tx_desc)
{
- struct mbuf *m;
- vm_paddr_t paddr;
- uint64_t p2d_len;
- int nfrag;
- vm_paddr_t p1 , p2;
- uint32_t len1 , len2;
- vm_offset_t taddr;
- uint64_t fr_stid;
+ struct mbuf *m;
+ vm_paddr_t paddr;
+ uint64_t p2d_len;
+ int nfrag;
+ vm_paddr_t p1, p2;
+ uint32_t len1, len2;
+ vm_offset_t taddr;
+ uint64_t fr_stid;
+
fr_stid = (xlr_cpu_id() << 3) + xlr_thr_id() + 4;
if (tx_desc == NULL)
@@ -558,21 +566,21 @@ build_frag_list(struct mbuf *m_head, str
if (m->m_len != 0) {
paddr = vtophys(mtod(m, vm_offset_t));
p1 = paddr + m->m_len;
- p2 = vtophys(((vm_offset_t) m->m_data + m->m_len));
+ p2 = vtophys(((vm_offset_t)m->m_data + m->m_len));
if (p1 != p2) {
len1 = (uint32_t)
- (PAGE_SIZE - (paddr & PAGE_MASK));
+ (PAGE_SIZE - (paddr & PAGE_MASK));
tx_desc->frag[nfrag] = (127ULL << 54) |
- ((uint64_t) len1 << 40) | paddr;
+ ((uint64_t) len1 << 40) | paddr;
nfrag++;
- taddr = (vm_offset_t) m->m_data + len1;
+ taddr = (vm_offset_t)m->m_data + len1;
p2 = vtophys(taddr);
len2 = m->m_len - len1;
if (nfrag >= XLR_MAX_TX_FRAGS)
panic("TX frags exceeded");
tx_desc->frag[nfrag] = (127ULL << 54) |
- ((uint64_t) len2 << 40) | p2;
+ ((uint64_t) len2 << 40) | p2;
taddr += len2;
p1 = vtophys(taddr);
@@ -580,76 +588,76 @@ build_frag_list(struct mbuf *m_head, str
if ((p2 + len2) != p1) {
printf("p1 = %p p2 = %p\n", (void *)p1, (void *)p2);
printf("len1 = %x len2 = %x\n", len1,
- len2);
+ len2);
printf("m_data %p\n", m->m_data);
DELAY(1000000);
panic("Multiple Mbuf segment discontiguous\n");
}
} else {
tx_desc->frag[nfrag] = (127ULL << 54) |
- ((uint64_t) m->m_len << 40) | paddr;
+ ((uint64_t) m->m_len << 40) | paddr;
}
nfrag++;
}
}
/* set eop in the last tx p2d desc */
tx_desc->frag[nfrag - 1] |= (1ULL << 63);
- paddr = vtophys((vm_offset_t) tx_desc);
+ paddr = vtophys((vm_offset_t)tx_desc);
tx_desc->frag[nfrag] = (1ULL << 63) | (fr_stid << 54) | paddr;
nfrag++;
- tx_desc->frag[XLR_MAX_TX_FRAGS] = (uint64_t) (vm_offset_t) tx_desc;
- tx_desc->frag[XLR_MAX_TX_FRAGS + 1] = (uint64_t) (vm_offset_t) m_head;
+ tx_desc->frag[XLR_MAX_TX_FRAGS] = (uint64_t) (vm_offset_t)tx_desc;
+ tx_desc->frag[XLR_MAX_TX_FRAGS + 1] = (uint64_t) (vm_offset_t)m_head;
p2d_len = (nfrag * 8);
p2p_msg->msg0 = (1ULL << 63) | (1ULL << 62) | (127ULL << 54) |
- (p2d_len << 40) | paddr;
+ (p2d_len << 40) | paddr;
return 0;
}
-static void
+static void
release_tx_desc(struct msgrng_msg *msg, int rel_buf)
{
- vm_paddr_t paddr = msg->msg0 & 0xffffffffffULL;
- uint64_t temp;
+ vm_paddr_t paddr = msg->msg0 & 0xffffffffffULL;
+ uint64_t temp;
struct p2d_tx_desc *tx_desc;
- struct mbuf *m;
+ struct mbuf *m;
paddr += (XLR_MAX_TX_FRAGS * sizeof(uint64_t));
temp = ld_40bit_phys(paddr, 3);
- tx_desc = (struct p2d_tx_desc *)((vm_offset_t) temp);
+ tx_desc = (struct p2d_tx_desc *)((vm_offset_t)temp);
if (rel_buf) {
paddr += sizeof(uint64_t);
temp = ld_40bit_phys(paddr, 3);
- m = (struct mbuf *)((vm_offset_t) temp);
+ m = (struct mbuf *)((vm_offset_t)temp);
m_freem(m);
}
-
free_p2d_desc(tx_desc);
}
#ifdef RX_COPY
#define RGE_MAX_NUM_DESC (6 * MAX_NUM_DESC)
-uint8_t *rge_rx_buffers[RGE_MAX_NUM_DESC];
+uint8_t *rge_rx_buffers[RGE_MAX_NUM_DESC];
static struct mtx rge_rx_mtx;
-int g_rx_buf_head;
+int g_rx_buf_head;
-static void
+static void
init_rx_buf(void)
{
- int i;
- uint8_t *buf, *start;
- uint32_t size , *ptr;
+ int i;
+ uint8_t *buf, *start;
+ uint32_t size, *ptr;
+
mtx_init(&rge_rx_mtx, "xlr rx_desc", NULL, MTX_SPIN);
size = (RGE_MAX_NUM_DESC * (MAX_FRAME_SIZE + XLR_CACHELINE_SIZE));
start = (uint8_t *) contigmalloc(size, M_DEVBUF, M_NOWAIT | M_ZERO,
- 0, 0xffffffff, XLR_CACHELINE_SIZE, 0);
+ 0, 0xffffffff, XLR_CACHELINE_SIZE, 0);
if (start == NULL)
panic("NO RX BUFFERS");
buf = start;
@@ -662,10 +670,11 @@ init_rx_buf(void)
}
}
-static void *
+static void *
get_rx_buf(void)
{
- void *ptr = NULL;
+ void *ptr = NULL;
+
mtx_lock_spin(&rge_rx_mtx);
if (g_rx_buf_head < RGE_MAX_NUM_DESC) {
ptr = (void *)rge_rx_buffers[g_rx_buf_head];
@@ -674,12 +683,13 @@ get_rx_buf(void)
mtx_unlock_spin(&rge_rx_mtx);
return ptr;
}
+
#endif
-static struct mbuf *
+static struct mbuf *
get_mbuf(void)
{
- struct mbuf *m_new = NULL;
+ struct mbuf *m_new = NULL;
if ((m_new = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR)) == NULL)
return NULL;
@@ -689,11 +699,11 @@ get_mbuf(void)
return m_new;
}
-static void
+static void
free_buf(vm_paddr_t paddr)
{
- struct mbuf *m;
- vm_offset_t temp;
+ struct mbuf *m;
+ vm_offset_t temp;
temp = lw_40bit_phys((paddr - XLR_CACHELINE_SIZE), 3);
m = (struct mbuf *)temp;
@@ -707,9 +717,11 @@ get_buf(void)
#ifdef RX_COPY
return get_rx_buf();
#else
- struct mbuf *m_new = NULL;
+ struct mbuf *m_new = NULL;
+
#ifdef INVARIANTS
- vm_paddr_t temp1, temp2;
+ vm_paddr_t temp1, temp2;
+
#endif
unsigned int *md;
@@ -727,8 +739,8 @@ get_buf(void)
/* return (void *)m_new; */
#ifdef INVARIANTS
- temp1 = vtophys((vm_offset_t) m_new->m_data);
- temp2 = vtophys((vm_offset_t) m_new->m_data + 1536);
+ temp1 = vtophys((vm_offset_t)m_new->m_data);
+ temp2 = vtophys((vm_offset_t)m_new->m_data + 1536);
if ((temp1 + 1536) != temp2)
panic("ALLOCED BUFFER IS NOT CONTIGUOUS\n");
#endif
@@ -738,16 +750,16 @@ get_buf(void)
/**********************************************************************
**********************************************************************/
-static void
+static void
rmi_xlr_mac_set_enable(struct driver_data *priv, int flag)
{
- uint32_t regval;
- int tx_threshold = 1518;
+ uint32_t regval;
+ int tx_threshold = 1518;
if (flag) {
regval = xlr_read_reg(priv->mmio, R_TX_CONTROL);
regval |= (1 << O_TX_CONTROL__TxEnable) |
- (tx_threshold << O_TX_CONTROL__TxThreshold);
+ (tx_threshold << O_TX_CONTROL__TxThreshold);
xlr_write_reg(priv->mmio, R_TX_CONTROL, regval);
@@ -763,7 +775,7 @@ rmi_xlr_mac_set_enable(struct driver_dat
} else {
regval = xlr_read_reg(priv->mmio, R_TX_CONTROL);
regval &= ~((1 << O_TX_CONTROL__TxEnable) |
- (tx_threshold << O_TX_CONTROL__TxThreshold));
+ (tx_threshold << O_TX_CONTROL__TxThreshold));
xlr_write_reg(priv->mmio, R_TX_CONTROL, regval);
@@ -779,19 +791,19 @@ rmi_xlr_mac_set_enable(struct driver_dat
/**********************************************************************
**********************************************************************/
-static __inline__ int
+static __inline__ int
xlr_mac_send_fr(struct driver_data *priv,
- vm_paddr_t addr, int len)
+ vm_paddr_t addr, int len)
{
- int stid = priv->rfrbucket;
+ int stid = priv->rfrbucket;
struct msgrng_msg msg;
- int vcpu = (xlr_cpu_id()<<2)+xlr_thr_id();
+ int vcpu = (xlr_cpu_id() << 2) + xlr_thr_id();
- mac_make_desc_rfr(&msg, addr);
+ mac_make_desc_rfr(&msg, addr);
/* Send the packet to MAC */
dbg_msg("mac_%d: Sending free packet %llx to stid %d\n",
- priv->instance, addr, stid);
+ priv->instance, addr, stid);
if (priv->type == XLR_XGMAC) {
while (message_send(1, MSGRNG_CODE_XGMAC, stid, &msg));
} else {
@@ -804,11 +816,12 @@ xlr_mac_send_fr(struct driver_data *priv
/**************************************************************/
-static void
+static void
xgmac_mdio_setup(volatile unsigned int *_mmio)
{
- int i;
- uint32_t rd_data;
+ int i;
+ uint32_t rd_data;
+
for (i = 0; i < 4; i++) {
rd_data = xmdio_read(_mmio, 1, 0x8000 + i);
rd_data = rd_data & 0xffffdfff; /* clear isolate bit */
@@ -824,10 +837,10 @@ xgmac_mdio_setup(volatile unsigned int *
********************************************************************* */
#define PHY_STATUS_RETRIES 25000
-static void
+static void
rmi_xlr_mac_mii_init(struct driver_data *priv)
{
- xlr_reg_t *mii_mmio = priv->mii_mmio;
+ xlr_reg_t *mii_mmio = priv->mii_mmio;
/* use the lowest clock divisor - divisor 28 */
xlr_write_reg(mii_mmio, R_MII_MGMT_CONFIG, 0x07);
@@ -845,17 +858,17 @@ rmi_xlr_mac_mii_init(struct driver_data
* value read, or 0 if an error occurred.
********************************************************************* */
-static int
-rge_mii_read_internal(xlr_reg_t *mii_mmio, int phyaddr, int regidx)
+static int
+rge_mii_read_internal(xlr_reg_t * mii_mmio, int phyaddr, int regidx)
{
- int i = 0;
+ int i = 0;
/* setup the phy reg to be used */
xlr_write_reg(mii_mmio, R_MII_MGMT_ADDRESS,
- (phyaddr << 8) | (regidx << 0));
+ (phyaddr << 8) | (regidx << 0));
/* Issue the read command */
xlr_write_reg(mii_mmio, R_MII_MGMT_COMMAND,
- (1 << O_MII_MGMT_COMMAND__rstat));
+ (1 << O_MII_MGMT_COMMAND__rstat));
/* poll for the read cycle to complete */
for (i = 0; i < PHY_STATUS_RETRIES; i++) {
@@ -873,10 +886,11 @@ rge_mii_read_internal(xlr_reg_t *mii_mmi
return xlr_read_reg(mii_mmio, R_MII_MGMT_STATUS);
}
-static int
+static int
rge_mii_read(device_t dev, int phyaddr, int regidx)
{
struct rge_softc *sc = device_get_softc(dev);
+
return rge_mii_read_internal(sc->priv.mii_mmio, phyaddr, regidx);
}
@@ -889,7 +903,7 @@ rge_mii_read(device_t dev, int phyaddr,
* Return value:
* nothing
********************************************************************* */
-static int
+static int
rmi_xlr_mac_mediachange(struct ifnet *ifp)
{
struct rge_softc *sc = ifp->if_softc;
@@ -915,11 +929,11 @@ rmi_xlr_mac_mediastatus(struct ifnet *if
{
struct rge_softc *sc = ifp->if_softc;
- /*Check whether this is interface is active or not.*/
+ /* Check whether this is interface is active or not. */
ifmr->ifm_status = IFM_AVALID;
- if(sc->link_up){
+ if (sc->link_up) {
ifmr->ifm_status |= IFM_ACTIVE;
- }else{
+ } else {
ifmr->ifm_active = IFM_ETHER;
}
}
@@ -937,12 +951,12 @@ rmi_xlr_mac_mediastatus(struct ifnet *if
* nothing
********************************************************************* */
static void
-rge_mii_write_internal(xlr_reg_t *mii_mmio, int phyaddr, int regidx, int regval)
+rge_mii_write_internal(xlr_reg_t * mii_mmio, int phyaddr, int regidx, int regval)
{
- int i = 0;
+ int i = 0;
xlr_write_reg(mii_mmio, R_MII_MGMT_ADDRESS,
- (phyaddr << 8) | (regidx << 0));
+ (phyaddr << 8) | (regidx << 0));
/* Write the data which starts the write cycle */
xlr_write_reg(mii_mmio, R_MII_MGMT_WRITE_DATA, regval);
@@ -965,7 +979,7 @@ rge_mii_write(device_t dev, int phyaddr,
return (0);
}
-static void
+static void
rmi_xlr_mac_mii_statchg(struct device *dev)
{
}
@@ -973,12 +987,12 @@ rmi_xlr_mac_mii_statchg(struct device *d
static void
serdes_regs_init(struct driver_data *priv)
{
- xlr_reg_t *mmio_gpio = (xlr_reg_t *)(xlr_io_base + XLR_IO_GPIO_OFFSET);
+ xlr_reg_t *mmio_gpio = (xlr_reg_t *) (xlr_io_base + XLR_IO_GPIO_OFFSET);
int i;
/* Initialize SERDES CONTROL Registers */
rge_mii_write_internal(priv->serdes_mmio, 26, 0, 0x6DB0);
- rge_mii_write_internal(priv->serdes_mmio, 26, 1, 0xFFFF);
+ rge_mii_write_internal(priv->serdes_mmio, 26, 1, 0xFFFF);
rge_mii_write_internal(priv->serdes_mmio, 26, 2, 0xB6D0);
rge_mii_write_internal(priv->serdes_mmio, 26, 3, 0x00FF);
rge_mii_write_internal(priv->serdes_mmio, 26, 4, 0x0000);
@@ -987,87 +1001,92 @@ serdes_regs_init(struct driver_data *pri
rge_mii_write_internal(priv->serdes_mmio, 26, 7, 0x0001);
rge_mii_write_internal(priv->serdes_mmio, 26, 8, 0x0000);
rge_mii_write_internal(priv->serdes_mmio, 26, 9, 0x0000);
- rge_mii_write_internal(priv->serdes_mmio, 26,10, 0x0000);
+ rge_mii_write_internal(priv->serdes_mmio, 26, 10, 0x0000);
- /*
+ /*
* For loop delay and GPIO programming crud from Linux driver,
*/
- for(i=0;i<10000000;i++){}
+ for (i = 0; i < 10000000; i++) {
+ }
mmio_gpio[0x20] = 0x7e6802;
mmio_gpio[0x10] = 0x7104;
- for(i=0;i<100000000;i++){}
+ for (i = 0; i < 100000000; i++) {
+ }
return;
-}
+}
-static void serdes_autoconfig(struct driver_data *priv)
+static void
+serdes_autoconfig(struct driver_data *priv)
{
- int delay = 100000;
+ int delay = 100000;
- /* Enable Auto negotiation in the PCS Layer*/
- rge_mii_write_internal(priv->pcs_mmio, 27, 0, 0x1000);
- DELAY(delay);
- rge_mii_write_internal(priv->pcs_mmio, 27, 0, 0x0200);
- DELAY(delay);
-
- rge_mii_write_internal(priv->pcs_mmio, 28, 0, 0x1000);
- DELAY(delay);
- rge_mii_write_internal(priv->pcs_mmio, 28, 0, 0x0200);
- DELAY(delay);
-
- rge_mii_write_internal(priv->pcs_mmio, 29, 0, 0x1000);
- DELAY(delay);
- rge_mii_write_internal(priv->pcs_mmio, 29, 0, 0x0200);
- DELAY(delay);
-
- rge_mii_write_internal(priv->pcs_mmio, 30, 0, 0x1000);
- DELAY(delay);
- rge_mii_write_internal(priv->pcs_mmio, 30, 0, 0x0200);
- DELAY(delay);
+ /* Enable Auto negotiation in the PCS Layer */
+ rge_mii_write_internal(priv->pcs_mmio, 27, 0, 0x1000);
+ DELAY(delay);
+ rge_mii_write_internal(priv->pcs_mmio, 27, 0, 0x0200);
+ DELAY(delay);
+
+ rge_mii_write_internal(priv->pcs_mmio, 28, 0, 0x1000);
+ DELAY(delay);
+ rge_mii_write_internal(priv->pcs_mmio, 28, 0, 0x0200);
+ DELAY(delay);
+
+ rge_mii_write_internal(priv->pcs_mmio, 29, 0, 0x1000);
+ DELAY(delay);
+ rge_mii_write_internal(priv->pcs_mmio, 29, 0, 0x0200);
+ DELAY(delay);
+
+ rge_mii_write_internal(priv->pcs_mmio, 30, 0, 0x1000);
+ DELAY(delay);
+ rge_mii_write_internal(priv->pcs_mmio, 30, 0, 0x0200);
+ DELAY(delay);
}
/*****************************************************************
* Initialize GMAC
*****************************************************************/
-static void
+static void
rmi_xlr_config_pde(struct driver_data *priv)
{
- int i = 0, cpu = 0, bucket = 0;
- uint64_t bucket_map = 0;
+ int i = 0, cpu = 0, bucket = 0;
+ uint64_t bucket_map = 0;
+
/* uint32_t desc_pack_ctrl = 0; */
- uint32_t cpumask;
+ uint32_t cpumask;
cpumask = PCPU_GET(cpumask) | PCPU_GET(other_cpus);
for (i = 0; i < 32; i++) {
if (cpumask & (1 << i)) {
cpu = cpu_ltop_map[i];
- bucket = ((cpu >> 2) << 3);//| (cpu & 0x03);
+ bucket = ((cpu >> 2) << 3);
+ //|(cpu & 0x03);
bucket_map |= (1ULL << bucket);
dbg_msg("i=%d, cpu=%d, bucket = %d, bucket_map=%llx\n",
- i, cpu, bucket, bucket_map);
+ i, cpu, bucket, bucket_map);
}
}
/* bucket_map = 0x1; */
xlr_write_reg(priv->mmio, R_PDE_CLASS_0, (bucket_map & 0xffffffff));
xlr_write_reg(priv->mmio, R_PDE_CLASS_0 + 1,
- ((bucket_map >> 32) & 0xffffffff));
+ ((bucket_map >> 32) & 0xffffffff));
*** DIFF OUTPUT TRUNCATED AT 1000 LINES ***
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