svn commit: r192131 - projects/mips/sys/mips/atheros
Oleksandr Tymoshenko
gonzo at FreeBSD.org
Fri May 15 01:51:48 UTC 2009
Author: gonzo
Date: Fri May 15 01:51:47 2009
New Revision: 192131
URL: http://svn.freebsd.org/changeset/base/192131
Log:
- Add definitions for PLL CPU Config register fields
Modified:
projects/mips/sys/mips/atheros/ar71xxreg.h
Modified: projects/mips/sys/mips/atheros/ar71xxreg.h
==============================================================================
--- projects/mips/sys/mips/atheros/ar71xxreg.h Fri May 15 00:18:31 2009 (r192130)
+++ projects/mips/sys/mips/atheros/ar71xxreg.h Fri May 15 01:51:47 2009 (r192131)
@@ -136,7 +136,26 @@
#define USB_CTRL_CONFIG_RESUME_UTMI_PLS_DIS (1 << 1)
#define USB_CTRL_CONFIG_UTMI_BACKWARD_ENB (1 << 0)
+#define AR71XX_BASE_FREQ 40000000
#define AR71XX_PLL_CPU_CONFIG 0x18050000
+#define PLL_SW_UPDATE (1 << 31)
+#define PLL_LOCKED (1 << 30)
+#define PLL_AHB_DIV_SHIFT 20
+#define PLL_AHB_DIV_MASK 7
+#define PLL_DDR_DIV_SEL_SHIFT 18
+#define PLL_DDR_DIV_SEL_MASK 3
+#define PLL_CPU_DIV_SEL_SHIFT 16
+#define PLL_CPU_DIV_SEL_MASK 2
+#define PLL_LOOP_BW_SHIFT 12
+#define PLL_LOOP_BW_MASK 0xf
+#define PLL_DIV_IN_SHIFT 10
+#define PLL_DIV_IN_MASK 3
+#define PLL_DIV_OUT_SHIFT 8
+#define PLL_DIV_OUT_MASK 3
+#define PLL_FB_SHIFT 3
+#define PLL_FB_MASK 0x1f
+#define PLL_BYPASS (1 << 1)
+#define PLL_POWER_DOWN (1 << 0)
#define AR71XX_PLL_SEC_CONFIG 0x18050004
#define AR71XX_PLL_CPU_CLK_CTRL 0x18050008
#define AR71XX_PLL_ETH_INT0_CLK 0x18050010
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