svn commit: r188045 - projects/releng_7_xen/sys/i386/xen

[Kip Macy]

Author: kmacy
Date: Tue Feb  3 04:35:31 2009
New Revision: 188045
URL: http://svn.freebsd.org/changeset/base/188045

Log:
  IFC 188042
  - page faults and other traps need to have interrupts disabled on entry

Modified:
  projects/releng_7_xen/sys/i386/xen/xen_machdep.c

Modified: projects/releng_7_xen/sys/i386/xen/xen_machdep.c
==============================================================================
--- projects/releng_7_xen/sys/i386/xen/xen_machdep.c	Tue Feb  3 04:28:45 2009	(r188044)
+++ projects/releng_7_xen/sys/i386/xen/xen_machdep.c	Tue Feb  3 04:35:31 2009	(r188045)
@@ -1098,13 +1098,13 @@ initvalues(start_info_t *startinfo)
 
 trap_info_t trap_table[] = {
 	{ 0,   0, GSEL(GCODE_SEL, SEL_KPL), (unsigned long) &IDTVEC(div)},
-	{ 1,   0, GSEL(GCODE_SEL, SEL_KPL), (unsigned long) &IDTVEC(dbg)},
-	{ 3,   3, GSEL(GCODE_SEL, SEL_KPL), (unsigned long) &IDTVEC(bpt)},
+	{ 1,   0|4, GSEL(GCODE_SEL, SEL_KPL), (unsigned long) &IDTVEC(dbg)},
+	{ 3,   3|4, GSEL(GCODE_SEL, SEL_KPL), (unsigned long) &IDTVEC(bpt)},
 	{ 4,   3, GSEL(GCODE_SEL, SEL_KPL), (unsigned long) &IDTVEC(ofl)},
 	/* This is UPL on Linux and KPL on BSD */
 	{ 5,   3, GSEL(GCODE_SEL, SEL_KPL), (unsigned long) &IDTVEC(bnd)},
 	{ 6,   0, GSEL(GCODE_SEL, SEL_KPL), (unsigned long) &IDTVEC(ill)},
-	{ 7,   0, GSEL(GCODE_SEL, SEL_KPL), (unsigned long) &IDTVEC(dna)},
+	{ 7,   0|4, GSEL(GCODE_SEL, SEL_KPL), (unsigned long) &IDTVEC(dna)},
 	/*
 	 * { 8,   0, GSEL(GCODE_SEL, SEL_KPL), (unsigned long) &IDTVEC(XXX)},
 	 *   no handler for double fault
@@ -1114,7 +1114,7 @@ trap_info_t trap_table[] = {
 	{11,   0, GSEL(GCODE_SEL, SEL_KPL), (unsigned long) &IDTVEC(missing)},
 	{12,   0, GSEL(GCODE_SEL, SEL_KPL), (unsigned long) &IDTVEC(stk)},
 	{13,   0, GSEL(GCODE_SEL, SEL_KPL), (unsigned long) &IDTVEC(prot)},
-	{14,   0, GSEL(GCODE_SEL, SEL_KPL), (unsigned long) &IDTVEC(page)},
+	{14,   0|4, GSEL(GCODE_SEL, SEL_KPL), (unsigned long) &IDTVEC(page)},
 	{15,   0, GSEL(GCODE_SEL, SEL_KPL), (unsigned long) &IDTVEC(rsvd)},
 	{16,   0, GSEL(GCODE_SEL, SEL_KPL), (unsigned long) &IDTVEC(fpu)},
 	{17,   0, GSEL(GCODE_SEL, SEL_KPL), (unsigned long) &IDTVEC(align)},