svn commit: r191084 - in projects/mips/sys: conf mips/adm5120
mips/alchemy mips/idt mips/include mips/malta mips/mips
Oleksandr Tymoshenko
gonzo at FreeBSD.org
Tue Apr 14 19:28:27 PDT 2009
Author: gonzo
Date: Wed Apr 15 02:28:26 2009
New Revision: 191084
URL: http://svn.freebsd.org/changeset/base/191084
Log:
Use FreeBSD/arm approach for handling bus space access: space tag is a pointer
to bus_space structure that defines access methods and hence every bus can
define own accessors. Default space is mips_bus_space_generic. It's a simple
interface to physical memory, values are read with regard to host system
byte order.
Added:
projects/mips/sys/mips/mips/bus_space_generic.c
Modified:
projects/mips/sys/conf/files.mips
projects/mips/sys/mips/adm5120/obio.c
projects/mips/sys/mips/adm5120/uart_cpu_adm5120.c
projects/mips/sys/mips/alchemy/obio.c
projects/mips/sys/mips/alchemy/uart_cpu_alchemy.c
projects/mips/sys/mips/idt/uart_bus_rc32434.c
projects/mips/sys/mips/idt/uart_cpu_rc32434.c
projects/mips/sys/mips/include/_bus.h
projects/mips/sys/mips/include/bus.h
projects/mips/sys/mips/malta/gt_pci.c
projects/mips/sys/mips/malta/obio.c
projects/mips/sys/mips/malta/uart_bus_maltausart.c
projects/mips/sys/mips/malta/uart_cpu_maltausart.c
Modified: projects/mips/sys/conf/files.mips
==============================================================================
--- projects/mips/sys/conf/files.mips Wed Apr 15 01:47:52 2009 (r191083)
+++ projects/mips/sys/conf/files.mips Wed Apr 15 02:28:26 2009 (r191084)
@@ -54,6 +54,7 @@ mips/mips/pm_machdep.c standard
mips/mips/swtch.S standard
mips/mips/tlb.S standard
+mips/mips/bus_space_generic.c standard
mips/mips/busdma_machdep.c standard
mips/mips/cache.c standard
mips/mips/cache_mipsNN.c standard
Modified: projects/mips/sys/mips/adm5120/obio.c
==============================================================================
--- projects/mips/sys/mips/adm5120/obio.c Wed Apr 15 01:47:52 2009 (r191083)
+++ projects/mips/sys/mips/adm5120/obio.c Wed Apr 15 02:28:26 2009 (r191084)
@@ -269,7 +269,7 @@ obio_activate_resource(device_t bus, dev
vaddr = (void *)MIPS_PHYS_TO_KSEG1((intptr_t)rman_get_start(r));
rman_set_virtual(r, vaddr);
- rman_set_bustag(r, MIPS_BUS_SPACE_MEM);
+ rman_set_bustag(r, &mips_bus_space_generic);
rman_set_bushandle(r, (bus_space_handle_t)vaddr);
}
Modified: projects/mips/sys/mips/adm5120/uart_cpu_adm5120.c
==============================================================================
--- projects/mips/sys/mips/adm5120/uart_cpu_adm5120.c Wed Apr 15 01:47:52 2009 (r191083)
+++ projects/mips/sys/mips/adm5120/uart_cpu_adm5120.c Wed Apr 15 02:28:26 2009 (r191084)
@@ -67,7 +67,7 @@ uart_cpu_getdev(int devtype, struct uart
di->ops = uart_getops(&uart_adm5120_uart_class);
di->bas.chan = 0;
- di->bas.bst = 0;
+ di->bas.bst = &mips_bus_space_generic;
di->bas.regshft = 0;
di->bas.rclk = 0;
di->baudrate = 115200;
@@ -76,7 +76,7 @@ uart_cpu_getdev(int devtype, struct uart
di->parity = UART_PARITY_NONE;
uart_bus_space_io = 0;
- uart_bus_space_mem = MIPS_PHYS_TO_KSEG1(ADM5120_BASE_UART0);
+ uart_bus_space_mem = &mips_bus_space_generic;
di->bas.bsh = MIPS_PHYS_TO_KSEG1(ADM5120_BASE_UART0);
return (0);
Modified: projects/mips/sys/mips/alchemy/obio.c
==============================================================================
--- projects/mips/sys/mips/alchemy/obio.c Wed Apr 15 01:47:52 2009 (r191083)
+++ projects/mips/sys/mips/alchemy/obio.c Wed Apr 15 02:28:26 2009 (r191084)
@@ -269,7 +269,7 @@ obio_activate_resource(device_t bus, dev
vaddr = (void *)MIPS_PHYS_TO_KSEG1((intptr_t)rman_get_start(r));
rman_set_virtual(r, vaddr);
- rman_set_bustag(r, MIPS_BUS_SPACE_MEM);
+ rman_set_bustag(r, &mips_bus_space_generic);
rman_set_bushandle(r, (bus_space_handle_t)vaddr);
}
Modified: projects/mips/sys/mips/alchemy/uart_cpu_alchemy.c
==============================================================================
--- projects/mips/sys/mips/alchemy/uart_cpu_alchemy.c Wed Apr 15 01:47:52 2009 (r191083)
+++ projects/mips/sys/mips/alchemy/uart_cpu_alchemy.c Wed Apr 15 02:28:26 2009 (r191084)
@@ -63,7 +63,7 @@ uart_cpu_getdev(int devtype, struct uart
di->ops = uart_getops(&uart_ns8250_class);
di->bas.chan = 0;
- di->bas.bst = 0;
+ di->bas.bst = &mips_bus_space_generic;
di->bas.regshft = 0;
di->bas.rclk = 0;
di->baudrate = 115200;
@@ -72,7 +72,7 @@ uart_cpu_getdev(int devtype, struct uart
di->parity = UART_PARITY_NONE;
uart_bus_space_io = 0;
- uart_bus_space_mem = MIPS_PHYS_TO_KSEG1(UART0_BASE);
+ uart_bus_space_mem = &mips_bus_space_generic;
di->bas.bsh = MIPS_PHYS_TO_KSEG1(UART0_BASE);
return (0);
Modified: projects/mips/sys/mips/idt/uart_bus_rc32434.c
==============================================================================
--- projects/mips/sys/mips/idt/uart_bus_rc32434.c Wed Apr 15 01:47:52 2009 (r191083)
+++ projects/mips/sys/mips/idt/uart_bus_rc32434.c Wed Apr 15 02:28:26 2009 (r191084)
@@ -88,10 +88,10 @@ uart_rc32434_probe(device_t dev)
sc->sc_class = &uart_ns8250_class;
bcopy(&sc->sc_sysdev->bas, &sc->sc_bas, sizeof(sc->sc_bas));
sc->sc_sysdev->bas.regshft = 2;
- sc->sc_sysdev->bas.bst = 0;
+ sc->sc_sysdev->bas.bst = &mips_bus_space_generic;
sc->sc_sysdev->bas.bsh = MIPS_PHYS_TO_KSEG1(IDT_BASE_UART0);
sc->sc_bas.regshft = 2;
- sc->sc_bas.bst = 0;
+ sc->sc_bas.bst = &mips_bus_space_generic;
sc->sc_bas.bsh = MIPS_PHYS_TO_KSEG1(IDT_BASE_UART0);
return (uart_bus_probe(dev, 2, 330000000UL/2, 0, 0));
Modified: projects/mips/sys/mips/idt/uart_cpu_rc32434.c
==============================================================================
--- projects/mips/sys/mips/idt/uart_cpu_rc32434.c Wed Apr 15 01:47:52 2009 (r191083)
+++ projects/mips/sys/mips/idt/uart_cpu_rc32434.c Wed Apr 15 02:28:26 2009 (r191084)
@@ -71,7 +71,7 @@ uart_cpu_getdev(int devtype, struct uart
/* Got it. Fill in the instance and return it. */
di->ops = uart_getops(&uart_ns8250_class);
di->bas.chan = 0;
- di->bas.bst = 0;
+ di->bas.bst = &mips_bus_space_generic;
di->bas.regshft = 2;
di->bas.rclk = 330000000UL/2; /* IPbus clock */
di->baudrate = 115200;
@@ -79,7 +79,7 @@ uart_cpu_getdev(int devtype, struct uart
di->stopbits = 1;
di->parity = UART_PARITY_NONE;
uart_bus_space_io = 0;
- uart_bus_space_mem = 0;
+ uart_bus_space_mem = &mips_bus_space_generic;
di->bas.bsh = MIPS_PHYS_TO_KSEG1(maddr);
return (0);
}
Modified: projects/mips/sys/mips/include/_bus.h
==============================================================================
--- projects/mips/sys/mips/include/_bus.h Wed Apr 15 01:47:52 2009 (r191083)
+++ projects/mips/sys/mips/include/_bus.h Wed Apr 15 02:28:26 2009 (r191084)
@@ -43,7 +43,7 @@ typedef uintptr_t bus_size_t;
/*
* Access methods for bus resources and address space.
*/
-typedef long bus_space_tag_t;
+typedef struct bus_space *bus_space_tag_t;
typedef u_long bus_space_handle_t;
#endif
#endif /* MIPS_INCLUDE__BUS_H */
Modified: projects/mips/sys/mips/include/bus.h
==============================================================================
--- projects/mips/sys/mips/include/bus.h Wed Apr 15 01:47:52 2009 (r191083)
+++ projects/mips/sys/mips/include/bus.h Wed Apr 15 02:28:26 2009 (r191084)
@@ -1,8 +1,7 @@
-/* $NetBSD: bus.h,v 1.12 1997/10/01 08:25:15 fvdl Exp $ */
+/* $NetBSD: bus.h,v 1.11 2003/07/28 17:35:54 thorpej Exp $ */
+
/*-
- * $Id: bus.h,v 1.6 2007/08/09 11:23:32 katta Exp $
- *
- * Copyright (c) 1996, 1997 The NetBSD Foundation, Inc.
+ * Copyright (c) 1996, 1997, 1998, 2001 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
@@ -38,7 +37,7 @@
* POSSIBILITY OF SUCH DAMAGE.
*/
-/*
+/*-
* Copyright (c) 1996 Charles M. Hannum. All rights reserved.
* Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
*
@@ -68,842 +67,657 @@
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
- * from: src/sys/alpha/include/bus.h,v 1.5 1999/08/28 00:38:40 peter
* $FreeBSD$
-*/
+ */
#ifndef _MACHINE_BUS_H_
-#define _MACHINE_BUS_H_
+#define _MACHINE_BUS_H_
-#ifdef TARGET_OCTEON
-#include <machine/bus_octeon.h>
-#else
#include <machine/_bus.h>
-#include <machine/cpufunc.h>
-
-/*
- * Values for the mips bus space tag, not to be used directly by MI code.
- */
-#define MIPS_BUS_SPACE_IO 0 /* space is i/o space */
-#define MIPS_BUS_SPACE_MEM 1 /* space is mem space */
+struct bus_space {
+ /* cookie */
+ void *bs_cookie;
+
+ /* mapping/unmapping */
+ int (*bs_map) (void *, bus_addr_t, bus_size_t,
+ int, bus_space_handle_t *);
+ void (*bs_unmap) (void *, bus_space_handle_t, bus_size_t);
+ int (*bs_subregion) (void *, bus_space_handle_t,
+ bus_size_t, bus_size_t, bus_space_handle_t *);
+
+ /* allocation/deallocation */
+ int (*bs_alloc) (void *, bus_addr_t, bus_addr_t,
+ bus_size_t, bus_size_t, bus_size_t, int,
+ bus_addr_t *, bus_space_handle_t *);
+ void (*bs_free) (void *, bus_space_handle_t,
+ bus_size_t);
+
+ /* get kernel virtual address */
+ /* barrier */
+ void (*bs_barrier) (void *, bus_space_handle_t,
+ bus_size_t, bus_size_t, int);
+
+ /* read (single) */
+ u_int8_t (*bs_r_1) (void *, bus_space_handle_t, bus_size_t);
+ u_int16_t (*bs_r_2) (void *, bus_space_handle_t, bus_size_t);
+ u_int32_t (*bs_r_4) (void *, bus_space_handle_t, bus_size_t);
+ u_int64_t (*bs_r_8) (void *, bus_space_handle_t, bus_size_t);
+
+ /* read multiple */
+ void (*bs_rm_1) (void *, bus_space_handle_t, bus_size_t,
+ u_int8_t *, bus_size_t);
+ void (*bs_rm_2) (void *, bus_space_handle_t, bus_size_t,
+ u_int16_t *, bus_size_t);
+ void (*bs_rm_4) (void *, bus_space_handle_t,
+ bus_size_t, u_int32_t *, bus_size_t);
+ void (*bs_rm_8) (void *, bus_space_handle_t,
+ bus_size_t, u_int64_t *, bus_size_t);
+
+ /* read region */
+ void (*bs_rr_1) (void *, bus_space_handle_t,
+ bus_size_t, u_int8_t *, bus_size_t);
+ void (*bs_rr_2) (void *, bus_space_handle_t,
+ bus_size_t, u_int16_t *, bus_size_t);
+ void (*bs_rr_4) (void *, bus_space_handle_t,
+ bus_size_t, u_int32_t *, bus_size_t);
+ void (*bs_rr_8) (void *, bus_space_handle_t,
+ bus_size_t, u_int64_t *, bus_size_t);
+
+ /* write (single) */
+ void (*bs_w_1) (void *, bus_space_handle_t,
+ bus_size_t, u_int8_t);
+ void (*bs_w_2) (void *, bus_space_handle_t,
+ bus_size_t, u_int16_t);
+ void (*bs_w_4) (void *, bus_space_handle_t,
+ bus_size_t, u_int32_t);
+ void (*bs_w_8) (void *, bus_space_handle_t,
+ bus_size_t, u_int64_t);
+
+ /* write multiple */
+ void (*bs_wm_1) (void *, bus_space_handle_t,
+ bus_size_t, const u_int8_t *, bus_size_t);
+ void (*bs_wm_2) (void *, bus_space_handle_t,
+ bus_size_t, const u_int16_t *, bus_size_t);
+ void (*bs_wm_4) (void *, bus_space_handle_t,
+ bus_size_t, const u_int32_t *, bus_size_t);
+ void (*bs_wm_8) (void *, bus_space_handle_t,
+ bus_size_t, const u_int64_t *, bus_size_t);
+
+ /* write region */
+ void (*bs_wr_1) (void *, bus_space_handle_t,
+ bus_size_t, const u_int8_t *, bus_size_t);
+ void (*bs_wr_2) (void *, bus_space_handle_t,
+ bus_size_t, const u_int16_t *, bus_size_t);
+ void (*bs_wr_4) (void *, bus_space_handle_t,
+ bus_size_t, const u_int32_t *, bus_size_t);
+ void (*bs_wr_8) (void *, bus_space_handle_t,
+ bus_size_t, const u_int64_t *, bus_size_t);
+
+ /* set multiple */
+ void (*bs_sm_1) (void *, bus_space_handle_t,
+ bus_size_t, u_int8_t, bus_size_t);
+ void (*bs_sm_2) (void *, bus_space_handle_t,
+ bus_size_t, u_int16_t, bus_size_t);
+ void (*bs_sm_4) (void *, bus_space_handle_t,
+ bus_size_t, u_int32_t, bus_size_t);
+ void (*bs_sm_8) (void *, bus_space_handle_t,
+ bus_size_t, u_int64_t, bus_size_t);
+
+ /* set region */
+ void (*bs_sr_1) (void *, bus_space_handle_t,
+ bus_size_t, u_int8_t, bus_size_t);
+ void (*bs_sr_2) (void *, bus_space_handle_t,
+ bus_size_t, u_int16_t, bus_size_t);
+ void (*bs_sr_4) (void *, bus_space_handle_t,
+ bus_size_t, u_int32_t, bus_size_t);
+ void (*bs_sr_8) (void *, bus_space_handle_t,
+ bus_size_t, u_int64_t, bus_size_t);
+
+ /* copy */
+ void (*bs_c_1) (void *, bus_space_handle_t, bus_size_t,
+ bus_space_handle_t, bus_size_t, bus_size_t);
+ void (*bs_c_2) (void *, bus_space_handle_t, bus_size_t,
+ bus_space_handle_t, bus_size_t, bus_size_t);
+ void (*bs_c_4) (void *, bus_space_handle_t, bus_size_t,
+ bus_space_handle_t, bus_size_t, bus_size_t);
+ void (*bs_c_8) (void *, bus_space_handle_t, bus_size_t,
+ bus_space_handle_t, bus_size_t, bus_size_t);
+
+ /* read stream (single) */
+ u_int8_t (*bs_r_1_s) (void *, bus_space_handle_t, bus_size_t);
+ u_int16_t (*bs_r_2_s) (void *, bus_space_handle_t, bus_size_t);
+ u_int32_t (*bs_r_4_s) (void *, bus_space_handle_t, bus_size_t);
+ u_int64_t (*bs_r_8_s) (void *, bus_space_handle_t, bus_size_t);
+
+ /* read multiple stream */
+ void (*bs_rm_1_s) (void *, bus_space_handle_t, bus_size_t,
+ u_int8_t *, bus_size_t);
+ void (*bs_rm_2_s) (void *, bus_space_handle_t, bus_size_t,
+ u_int16_t *, bus_size_t);
+ void (*bs_rm_4_s) (void *, bus_space_handle_t,
+ bus_size_t, u_int32_t *, bus_size_t);
+ void (*bs_rm_8_s) (void *, bus_space_handle_t,
+ bus_size_t, u_int64_t *, bus_size_t);
+
+ /* read region stream */
+ void (*bs_rr_1_s) (void *, bus_space_handle_t,
+ bus_size_t, u_int8_t *, bus_size_t);
+ void (*bs_rr_2_s) (void *, bus_space_handle_t,
+ bus_size_t, u_int16_t *, bus_size_t);
+ void (*bs_rr_4_s) (void *, bus_space_handle_t,
+ bus_size_t, u_int32_t *, bus_size_t);
+ void (*bs_rr_8_s) (void *, bus_space_handle_t,
+ bus_size_t, u_int64_t *, bus_size_t);
+
+ /* write stream (single) */
+ void (*bs_w_1_s) (void *, bus_space_handle_t,
+ bus_size_t, u_int8_t);
+ void (*bs_w_2_s) (void *, bus_space_handle_t,
+ bus_size_t, u_int16_t);
+ void (*bs_w_4_s) (void *, bus_space_handle_t,
+ bus_size_t, u_int32_t);
+ void (*bs_w_8_s) (void *, bus_space_handle_t,
+ bus_size_t, u_int64_t);
+
+ /* write multiple stream */
+ void (*bs_wm_1_s) (void *, bus_space_handle_t,
+ bus_size_t, const u_int8_t *, bus_size_t);
+ void (*bs_wm_2_s) (void *, bus_space_handle_t,
+ bus_size_t, const u_int16_t *, bus_size_t);
+ void (*bs_wm_4_s) (void *, bus_space_handle_t,
+ bus_size_t, const u_int32_t *, bus_size_t);
+ void (*bs_wm_8_s) (void *, bus_space_handle_t,
+ bus_size_t, const u_int64_t *, bus_size_t);
+
+ /* write region stream */
+ void (*bs_wr_1_s) (void *, bus_space_handle_t,
+ bus_size_t, const u_int8_t *, bus_size_t);
+ void (*bs_wr_2_s) (void *, bus_space_handle_t,
+ bus_size_t, const u_int16_t *, bus_size_t);
+ void (*bs_wr_4_s) (void *, bus_space_handle_t,
+ bus_size_t, const u_int32_t *, bus_size_t);
+ void (*bs_wr_8_s) (void *, bus_space_handle_t,
+ bus_size_t, const u_int64_t *, bus_size_t);
+};
+
+
+/*
+ * Utility macros; INTERNAL USE ONLY.
+ */
+#define __bs_c(a,b) __CONCAT(a,b)
+#define __bs_opname(op,size) __bs_c(__bs_c(__bs_c(bs_,op),_),size)
+
+#define __bs_rs(sz, t, h, o) \
+ (*(t)->__bs_opname(r,sz))((t)->bs_cookie, h, o)
+#define __bs_ws(sz, t, h, o, v) \
+ (*(t)->__bs_opname(w,sz))((t)->bs_cookie, h, o, v)
+#define __bs_nonsingle(type, sz, t, h, o, a, c) \
+ (*(t)->__bs_opname(type,sz))((t)->bs_cookie, h, o, a, c)
+#define __bs_set(type, sz, t, h, o, v, c) \
+ (*(t)->__bs_opname(type,sz))((t)->bs_cookie, h, o, v, c)
+#define __bs_copy(sz, t, h1, o1, h2, o2, cnt) \
+ (*(t)->__bs_opname(c,sz))((t)->bs_cookie, h1, o1, h2, o2, cnt)
+
+#define __bs_opname_s(op,size) __bs_c(__bs_c(__bs_c(__bs_c(bs_,op),_),size),_s)
+#define __bs_rs_s(sz, t, h, o) \
+ (*(t)->__bs_opname_s(r,sz))((t)->bs_cookie, h, o)
+#define __bs_ws_s(sz, t, h, o, v) \
+ (*(t)->__bs_opname_s(w,sz))((t)->bs_cookie, h, o, v)
+#define __bs_nonsingle_s(type, sz, t, h, o, a, c) \
+ (*(t)->__bs_opname_s(type,sz))((t)->bs_cookie, h, o, a, c)
+
+
+/*
+ * Mapping and unmapping operations.
+ */
+#define bus_space_map(t, a, s, c, hp) \
+ (*(t)->bs_map)((t)->bs_cookie, (a), (s), (c), (hp))
+#define bus_space_unmap(t, h, s) \
+ (*(t)->bs_unmap)((t)->bs_cookie, (h), (s))
+#define bus_space_subregion(t, h, o, s, hp) \
+ (*(t)->bs_subregion)((t)->bs_cookie, (h), (o), (s), (hp))
+
+
+/*
+ * Allocation and deallocation operations.
+ */
+#define bus_space_alloc(t, rs, re, s, a, b, c, ap, hp) \
+ (*(t)->bs_alloc)((t)->bs_cookie, (rs), (re), (s), (a), (b), \
+ (c), (ap), (hp))
+#define bus_space_free(t, h, s) \
+ (*(t)->bs_free)((t)->bs_cookie, (h), (s))
+
+/*
+ * Bus barrier operations.
+ */
+#define bus_space_barrier(t, h, o, l, f) \
+ (*(t)->bs_barrier)((t)->bs_cookie, (h), (o), (l), (f))
+
+#define BUS_SPACE_BARRIER_READ 0x01
+#define BUS_SPACE_BARRIER_WRITE 0x02
+
+/*
+ * Bus read (single) operations.
+ */
+#define bus_space_read_1(t, h, o) __bs_rs(1,(t),(h),(o))
+#define bus_space_read_2(t, h, o) __bs_rs(2,(t),(h),(o))
+#define bus_space_read_4(t, h, o) __bs_rs(4,(t),(h),(o))
+#define bus_space_read_8(t, h, o) __bs_rs(8,(t),(h),(o))
+
+#define bus_space_read_stream_1(t, h, o) __bs_rs_s(1,(t), (h), (o))
+#define bus_space_read_stream_2(t, h, o) __bs_rs_s(2,(t), (h), (o))
+#define bus_space_read_stream_4(t, h, o) __bs_rs_s(4,(t), (h), (o))
+#define bus_space_read_stream_8(t, h, o) __bs_rs_s(8,8,(t),(h),(o))
+
+/*
+ * Bus read multiple operations.
+ */
+#define bus_space_read_multi_1(t, h, o, a, c) \
+ __bs_nonsingle(rm,1,(t),(h),(o),(a),(c))
+#define bus_space_read_multi_2(t, h, o, a, c) \
+ __bs_nonsingle(rm,2,(t),(h),(o),(a),(c))
+#define bus_space_read_multi_4(t, h, o, a, c) \
+ __bs_nonsingle(rm,4,(t),(h),(o),(a),(c))
+#define bus_space_read_multi_8(t, h, o, a, c) \
+ __bs_nonsingle(rm,8,(t),(h),(o),(a),(c))
+
+#define bus_space_read_multi_stream_1(t, h, o, a, c) \
+ __bs_nonsingle_s(rm,1,(t),(h),(o),(a),(c))
+#define bus_space_read_multi_stream_2(t, h, o, a, c) \
+ __bs_nonsingle_s(rm,2,(t),(h),(o),(a),(c))
+#define bus_space_read_multi_stream_4(t, h, o, a, c) \
+ __bs_nonsingle_s(rm,4,(t),(h),(o),(a),(c))
+#define bus_space_read_multi_stream_8(t, h, o, a, c) \
+ __bs_nonsingle_s(rm,8,(t),(h),(o),(a),(c))
+
+
+/*
+ * Bus read region operations.
+ */
+#define bus_space_read_region_1(t, h, o, a, c) \
+ __bs_nonsingle(rr,1,(t),(h),(o),(a),(c))
+#define bus_space_read_region_2(t, h, o, a, c) \
+ __bs_nonsingle(rr,2,(t),(h),(o),(a),(c))
+#define bus_space_read_region_4(t, h, o, a, c) \
+ __bs_nonsingle(rr,4,(t),(h),(o),(a),(c))
+#define bus_space_read_region_8(t, h, o, a, c) \
+ __bs_nonsingle(rr,8,(t),(h),(o),(a),(c))
+
+#define bus_space_read_region_stream_1(t, h, o, a, c) \
+ __bs_nonsingle_s(rr,1,(t),(h),(o),(a),(c))
+#define bus_space_read_region_stream_2(t, h, o, a, c) \
+ __bs_nonsingle_s(rr,2,(t),(h),(o),(a),(c))
+#define bus_space_read_region_stream_4(t, h, o, a, c) \
+ __bs_nonsingle_s(rr,4,(t),(h),(o),(a),(c))
+#define bus_space_read_region_stream_8(t, h, o, a, c) \
+ __bs_nonsingle_s(rr,8,(t),(h),(o),(a),(c))
+
+
+/*
+ * Bus write (single) operations.
+ */
+#define bus_space_write_1(t, h, o, v) __bs_ws(1,(t),(h),(o),(v))
+#define bus_space_write_2(t, h, o, v) __bs_ws(2,(t),(h),(o),(v))
+#define bus_space_write_4(t, h, o, v) __bs_ws(4,(t),(h),(o),(v))
+#define bus_space_write_8(t, h, o, v) __bs_ws(8,(t),(h),(o),(v))
+
+#define bus_space_write_stream_1(t, h, o, v) __bs_ws_s(1,(t),(h),(o),(v))
+#define bus_space_write_stream_2(t, h, o, v) __bs_ws_s(2,(t),(h),(o),(v))
+#define bus_space_write_stream_4(t, h, o, v) __bs_ws_s(4,(t),(h),(o),(v))
+#define bus_space_write_stream_8(t, h, o, v) __bs_ws_s(8,(t),(h),(o),(v))
+
+
+/*
+ * Bus write multiple operations.
+ */
+#define bus_space_write_multi_1(t, h, o, a, c) \
+ __bs_nonsingle(wm,1,(t),(h),(o),(a),(c))
+#define bus_space_write_multi_2(t, h, o, a, c) \
+ __bs_nonsingle(wm,2,(t),(h),(o),(a),(c))
+#define bus_space_write_multi_4(t, h, o, a, c) \
+ __bs_nonsingle(wm,4,(t),(h),(o),(a),(c))
+#define bus_space_write_multi_8(t, h, o, a, c) \
+ __bs_nonsingle(wm,8,(t),(h),(o),(a),(c))
-#define BUS_SPACE_MAXSIZE_24BIT 0xFFFFFF
-#define BUS_SPACE_MAXSIZE_32BIT 0xFFFFFFFF
-#define BUS_SPACE_MAXSIZE 0xFFFFFFFF /* Maximum supported size */
-#define BUS_SPACE_MAXADDR_24BIT 0xFFFFFF
-#define BUS_SPACE_MAXADDR_32BIT 0xFFFFFFFF
-#define BUS_SPACE_MAXADDR 0xFFFFFFFF
+#define bus_space_write_multi_stream_1(t, h, o, a, c) \
+ __bs_nonsingle_s(wm,1,(t),(h),(o),(a),(c))
+#define bus_space_write_multi_stream_2(t, h, o, a, c) \
+ __bs_nonsingle_s(wm,2,(t),(h),(o),(a),(c))
+#define bus_space_write_multi_stream_4(t, h, o, a, c) \
+ __bs_nonsingle_s(wm,4,(t),(h),(o),(a),(c))
+#define bus_space_write_multi_stream_8(t, h, o, a, c) \
+ __bs_nonsingle_s(wm,8,(t),(h),(o),(a),(c))
-#define BUS_SPACE_UNRESTRICTED (~0)
/*
- * Map a region of device bus space into CPU virtual address space.
+ * Bus write region operations.
*/
+#define bus_space_write_region_1(t, h, o, a, c) \
+ __bs_nonsingle(wr,1,(t),(h),(o),(a),(c))
+#define bus_space_write_region_2(t, h, o, a, c) \
+ __bs_nonsingle(wr,2,(t),(h),(o),(a),(c))
+#define bus_space_write_region_4(t, h, o, a, c) \
+ __bs_nonsingle(wr,4,(t),(h),(o),(a),(c))
+#define bus_space_write_region_8(t, h, o, a, c) \
+ __bs_nonsingle(wr,8,(t),(h),(o),(a),(c))
-__inline int bus_space_map(bus_space_tag_t t, bus_addr_t addr,
- bus_size_t size, int flags, bus_space_handle_t *bshp);
-
-static __inline int
-bus_space_map(bus_space_tag_t t __unused, bus_addr_t addr,
- bus_size_t size __unused, int flags __unused,
- bus_space_handle_t *bshp)
-{
+#define bus_space_write_region_stream_1(t, h, o, a, c) \
+ __bs_nonsingle_s(wr,1,(t),(h),(o),(a),(c))
+#define bus_space_write_region_stream_2(t, h, o, a, c) \
+ __bs_nonsingle_s(wr,2,(t),(h),(o),(a),(c))
+#define bus_space_write_region_stream_4(t, h, o, a, c) \
+ __bs_nonsingle_s(wr,4,(t),(h),(o),(a),(c))
+#define bus_space_write_region_stream_8(t, h, o, a, c) \
+ __bs_nonsingle_s(wr,8,(t),(h),(o),(a),(c))
- *bshp = addr;
- return (0);
-}
/*
- * Unmap a region of device bus space.
+ * Set multiple operations.
*/
+#define bus_space_set_multi_1(t, h, o, v, c) \
+ __bs_set(sm,1,(t),(h),(o),(v),(c))
+#define bus_space_set_multi_2(t, h, o, v, c) \
+ __bs_set(sm,2,(t),(h),(o),(v),(c))
+#define bus_space_set_multi_4(t, h, o, v, c) \
+ __bs_set(sm,4,(t),(h),(o),(v),(c))
+#define bus_space_set_multi_8(t, h, o, v, c) \
+ __bs_set(sm,8,(t),(h),(o),(v),(c))
-void bus_space_unmap(bus_space_tag_t t, bus_space_handle_t bsh,
- bus_size_t size);
/*
- * Get a new handle for a subregion of an already-mapped area of bus space.
+ * Set region operations.
*/
+#define bus_space_set_region_1(t, h, o, v, c) \
+ __bs_set(sr,1,(t),(h),(o),(v),(c))
+#define bus_space_set_region_2(t, h, o, v, c) \
+ __bs_set(sr,2,(t),(h),(o),(v),(c))
+#define bus_space_set_region_4(t, h, o, v, c) \
+ __bs_set(sr,4,(t),(h),(o),(v),(c))
+#define bus_space_set_region_8(t, h, o, v, c) \
+ __bs_set(sr,8,(t),(h),(o),(v),(c))
-int bus_space_subregion(bus_space_tag_t t, bus_space_handle_t bsh,
- bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp);
/*
- * Allocate a region of memory that is accessible to devices in bus space.
+ * Copy operations.
*/
-
-int bus_space_alloc(bus_space_tag_t t, bus_addr_t rstart,
- bus_addr_t rend, bus_size_t size, bus_size_t align,
- bus_size_t boundary, int flags, bus_addr_t *addrp,
- bus_space_handle_t *bshp);
+#define bus_space_copy_region_1(t, h1, o1, h2, o2, c) \
+ __bs_copy(1, t, h1, o1, h2, o2, c)
+#define bus_space_copy_region_2(t, h1, o1, h2, o2, c) \
+ __bs_copy(2, t, h1, o1, h2, o2, c)
+#define bus_space_copy_region_4(t, h1, o1, h2, o2, c) \
+ __bs_copy(4, t, h1, o1, h2, o2, c)
+#define bus_space_copy_region_8(t, h1, o1, h2, o2, c) \
+ __bs_copy(8, t, h1, o1, h2, o2, c)
/*
- * Free a region of bus space accessible memory.
+ * Macros to provide prototypes for all the functions used in the
+ * bus_space structure
*/
-void bus_space_free(bus_space_tag_t t, bus_space_handle_t bsh,
+#define bs_map_proto(f) \
+int __bs_c(f,_bs_map) (void *t, bus_addr_t addr, \
+ bus_size_t size, int cacheable, bus_space_handle_t *bshp);
+
+#define bs_unmap_proto(f) \
+void __bs_c(f,_bs_unmap) (void *t, bus_space_handle_t bsh, \
bus_size_t size);
+#define bs_subregion_proto(f) \
+int __bs_c(f,_bs_subregion) (void *t, bus_space_handle_t bsh, \
+ bus_size_t offset, bus_size_t size, \
+ bus_space_handle_t *nbshp);
+
+#define bs_alloc_proto(f) \
+int __bs_c(f,_bs_alloc) (void *t, bus_addr_t rstart, \
+ bus_addr_t rend, bus_size_t size, bus_size_t align, \
+ bus_size_t boundary, int cacheable, bus_addr_t *addrp, \
+ bus_space_handle_t *bshp);
-/*
- * Read a 1, 2, 4, or 8 byte quantity from bus space
- * described by tag/handle/offset.
- */
-static __inline u_int8_t bus_space_read_1(bus_space_tag_t tag,
- bus_space_handle_t handle,
- bus_size_t offset);
-
-static __inline u_int16_t bus_space_read_2(bus_space_tag_t tag,
- bus_space_handle_t handle,
- bus_size_t offset);
-
-static __inline u_int32_t bus_space_read_4(bus_space_tag_t tag,
- bus_space_handle_t handle,
- bus_size_t offset);
-
-static __inline u_int8_t
-bus_space_read_1(bus_space_tag_t tag, bus_space_handle_t handle,
- bus_size_t offset)
-{
-
- if (tag == MIPS_BUS_SPACE_IO)
- return (inb(handle + offset));
- return (readb(handle + offset));
-}
-
-static __inline u_int16_t
-bus_space_read_2(bus_space_tag_t tag, bus_space_handle_t handle,
- bus_size_t offset)
-{
-
- if (tag == MIPS_BUS_SPACE_IO)
- return (inw(handle + offset));
- return (readw(handle + offset));
-}
-
-static __inline u_int32_t
-bus_space_read_4(bus_space_tag_t tag, bus_space_handle_t handle,
- bus_size_t offset)
-{
-
- if (tag == MIPS_BUS_SPACE_IO)
- return (inl(handle + offset));
- return (readl(handle + offset));
-}
-
-#if 0 /* Cause a link error for bus_space_read_8 */
-#define bus_space_read_8(t, h, o) !!! bus_space_read_8 unimplemented !!!
-#endif
-
-/*
- * Read `count' 1, 2, 4, or 8 byte quantities from bus space
- * described by tag/handle/offset and copy into buffer provided.
- */
-static __inline void bus_space_read_multi_1(bus_space_tag_t tag,
- bus_space_handle_t bsh,
- bus_size_t offset, u_int8_t *addr,
- size_t count);
-
-static __inline void bus_space_read_multi_2(bus_space_tag_t tag,
- bus_space_handle_t bsh,
- bus_size_t offset, u_int16_t *addr,
- size_t count);
-
-static __inline void bus_space_read_multi_4(bus_space_tag_t tag,
- bus_space_handle_t bsh,
- bus_size_t offset, u_int32_t *addr,
- size_t count);
-
-static __inline void
-bus_space_read_multi_1(bus_space_tag_t tag, bus_space_handle_t bsh,
- bus_size_t offset, u_int8_t *addr, size_t count)
-{
-
- if (tag == MIPS_BUS_SPACE_IO)
- while (count--)
- *addr++ = inb(bsh + offset);
- else
- while (count--)
- *addr++ = readb(bsh + offset);
-}
-
-static __inline void
-bus_space_read_multi_2(bus_space_tag_t tag, bus_space_handle_t bsh,
- bus_size_t offset, u_int16_t *addr, size_t count)
-{
- bus_addr_t baddr = bsh + offset;
-
- if (tag == MIPS_BUS_SPACE_IO)
- while (count--)
- *addr++ = inw(baddr);
- else
- while (count--)
- *addr++ = readw(baddr);
-}
-
-static __inline void
-bus_space_read_multi_4(bus_space_tag_t tag, bus_space_handle_t bsh,
- bus_size_t offset, u_int32_t *addr, size_t count)
-{
- bus_addr_t baddr = bsh + offset;
-
- if (tag == MIPS_BUS_SPACE_IO)
- while (count--)
- *addr++ = inl(baddr);
- else
- while (count--)
- *addr++ = readl(baddr);
-}
-
-#if 0 /* Cause a link error for bus_space_read_multi_8 */
-#define bus_space_read_multi_8 !!! bus_space_read_multi_8 unimplemented !!!
-#endif
-
-/*
- * Read `count' 1, 2, 4, or 8 byte quantities from bus space
- * described by tag/handle and starting at `offset' and copy into
- * buffer provided.
- */
-static __inline void bus_space_read_region_1(bus_space_tag_t tag,
- bus_space_handle_t bsh,
- bus_size_t offset, u_int8_t *addr,
- size_t count);
-
-static __inline void bus_space_read_region_2(bus_space_tag_t tag,
- bus_space_handle_t bsh,
- bus_size_t offset, u_int16_t *addr,
- size_t count);
-
-static __inline void bus_space_read_region_4(bus_space_tag_t tag,
- bus_space_handle_t bsh,
- bus_size_t offset, u_int32_t *addr,
- size_t count);
-
-
-static __inline void
-bus_space_read_region_1(bus_space_tag_t tag, bus_space_handle_t bsh,
- bus_size_t offset, u_int8_t *addr, size_t count)
-{
- bus_addr_t baddr = bsh + offset;
-
- if (tag == MIPS_BUS_SPACE_IO)
- while (count--) {
- *addr++ = inb(baddr);
- baddr += 1;
- }
- else
- while (count--) {
- *addr++ = readb(baddr);
- baddr += 1;
- }
-}
-
-static __inline void
-bus_space_read_region_2(bus_space_tag_t tag, bus_space_handle_t bsh,
- bus_size_t offset, u_int16_t *addr, size_t count)
-{
- bus_addr_t baddr = bsh + offset;
-
- if (tag == MIPS_BUS_SPACE_IO)
- while (count--) {
- *addr++ = inw(baddr);
- baddr += 2;
- }
- else
- while (count--) {
- *addr++ = readw(baddr);
- baddr += 2;
- }
-}
-
-static __inline void
-bus_space_read_region_4(bus_space_tag_t tag, bus_space_handle_t bsh,
- bus_size_t offset, u_int32_t *addr, size_t count)
-{
- bus_addr_t baddr = bsh + offset;
-
- if (tag == MIPS_BUS_SPACE_IO)
- while (count--) {
- *addr++ = inl(baddr);
- baddr += 4;
- }
- else
- while (count--) {
- *addr++ = readb(baddr);
- baddr += 4;
- }
-}
-
-#if 0 /* Cause a link error for bus_space_read_region_8 */
-#define bus_space_read_region_8 !!! bus_space_read_region_8 unimplemented !!!
-#endif
-
-/*
- * Write the 1, 2, 4, or 8 byte value `value' to bus space
- * described by tag/handle/offset.
- */
-
-static __inline void bus_space_write_1(bus_space_tag_t tag,
- bus_space_handle_t bsh,
- bus_size_t offset, u_int8_t value);
-
-static __inline void bus_space_write_2(bus_space_tag_t tag,
- bus_space_handle_t bsh,
- bus_size_t offset, u_int16_t value);
-
-static __inline void bus_space_write_4(bus_space_tag_t tag,
- bus_space_handle_t bsh,
- bus_size_t offset, u_int32_t value);
-
-static __inline void
-bus_space_write_1(bus_space_tag_t tag, bus_space_handle_t bsh,
- bus_size_t offset, u_int8_t value)
-{
-
- if (tag == MIPS_BUS_SPACE_IO)
- outb(bsh + offset, value);
- else
- writeb(bsh + offset, value);
-}
-
-static __inline void
-bus_space_write_2(bus_space_tag_t tag, bus_space_handle_t bsh,
- bus_size_t offset, u_int16_t value)
-{
-
- if (tag == MIPS_BUS_SPACE_IO)
- outw(bsh + offset, value);
- else
- writew(bsh + offset, value);
-}
-
-static __inline void
-bus_space_write_4(bus_space_tag_t tag, bus_space_handle_t bsh,
- bus_size_t offset, u_int32_t value)
-{
-
- if (tag == MIPS_BUS_SPACE_IO)
- outl(bsh + offset, value);
- else
- writel(bsh + offset, value);
-}
-
-#if 0 /* Cause a link error for bus_space_write_8 */
-#define bus_space_write_8 !!! bus_space_write_8 not implemented !!!
-#endif
-
-/*
- * Write `count' 1, 2, 4, or 8 byte quantities from the buffer
- * provided to bus space described by tag/handle/offset.
- */
-
-static __inline void bus_space_write_multi_1(bus_space_tag_t tag,
- bus_space_handle_t bsh,
- bus_size_t offset,
- const u_int8_t *addr,
- size_t count);
-static __inline void bus_space_write_multi_2(bus_space_tag_t tag,
- bus_space_handle_t bsh,
- bus_size_t offset,
- const u_int16_t *addr,
- size_t count);
-
-static __inline void bus_space_write_multi_4(bus_space_tag_t tag,
- bus_space_handle_t bsh,
- bus_size_t offset,
- const u_int32_t *addr,
- size_t count);
-
-static __inline void
-bus_space_write_multi_1(bus_space_tag_t tag, bus_space_handle_t bsh,
- bus_size_t offset, const u_int8_t *addr, size_t count)
-{
- bus_addr_t baddr = bsh + offset;
-
- if (tag == MIPS_BUS_SPACE_IO)
- while (count--)
- outb(baddr, *addr++);
- else
- while (count--)
- writeb(baddr, *addr++);
-}
-
-static __inline void
-bus_space_write_multi_2(bus_space_tag_t tag, bus_space_handle_t bsh,
- bus_size_t offset, const u_int16_t *addr, size_t count)
-{
- bus_addr_t baddr = bsh + offset;
-
- if (tag == MIPS_BUS_SPACE_IO)
- while (count--)
- outw(baddr, *addr++);
- else
- while (count--)
- writew(baddr, *addr++);
-}
-
-static __inline void
-bus_space_write_multi_4(bus_space_tag_t tag, bus_space_handle_t bsh,
- bus_size_t offset, const u_int32_t *addr, size_t count)
-{
- bus_addr_t baddr = bsh + offset;
-
- if (tag == MIPS_BUS_SPACE_IO)
- while (count--)
- outl(baddr, *addr++);
- else
- while (count--)
- writel(baddr, *addr++);
-}
+#define bs_free_proto(f) \
+void __bs_c(f,_bs_free) (void *t, bus_space_handle_t bsh, \
+ bus_size_t size);
-#if 0 /* Cause a link error for bus_space_write_multi_8 */
-#define bus_space_write_multi_8(t, h, o, a, c) \
- !!! bus_space_write_multi_8 unimplemented !!!
-#endif
+#define bs_barrier_proto(f) \
+void __bs_c(f,_bs_barrier) (void *t, bus_space_handle_t bsh, \
+ bus_size_t offset, bus_size_t len, int flags);
+
+#define bs_r_1_proto(f) \
+u_int8_t __bs_c(f,_bs_r_1) (void *t, bus_space_handle_t bsh, \
+ bus_size_t offset);
+
+#define bs_r_2_proto(f) \
+u_int16_t __bs_c(f,_bs_r_2) (void *t, bus_space_handle_t bsh, \
+ bus_size_t offset);
+
+#define bs_r_4_proto(f) \
+u_int32_t __bs_c(f,_bs_r_4) (void *t, bus_space_handle_t bsh, \
+ bus_size_t offset);
+
+#define bs_r_8_proto(f) \
+u_int64_t __bs_c(f,_bs_r_8) (void *t, bus_space_handle_t bsh, \
+ bus_size_t offset);
+
+#define bs_r_1_s_proto(f) \
+u_int8_t __bs_c(f,_bs_r_1_s) (void *t, bus_space_handle_t bsh, \
+ bus_size_t offset);
+
+#define bs_r_2_s_proto(f) \
+u_int16_t __bs_c(f,_bs_r_2_s) (void *t, bus_space_handle_t bsh, \
+ bus_size_t offset);
+
+#define bs_r_4_s_proto(f) \
+u_int32_t __bs_c(f,_bs_r_4_s) (void *t, bus_space_handle_t bsh, \
+ bus_size_t offset);
+
+#define bs_w_1_proto(f) \
+void __bs_c(f,_bs_w_1) (void *t, bus_space_handle_t bsh, \
+ bus_size_t offset, u_int8_t value);
+
+#define bs_w_2_proto(f) \
+void __bs_c(f,_bs_w_2) (void *t, bus_space_handle_t bsh, \
+ bus_size_t offset, u_int16_t value);
+
+#define bs_w_4_proto(f) \
+void __bs_c(f,_bs_w_4) (void *t, bus_space_handle_t bsh, \
+ bus_size_t offset, u_int32_t value);
+
+#define bs_w_8_proto(f) \
+void __bs_c(f,_bs_w_8) (void *t, bus_space_handle_t bsh, \
+ bus_size_t offset, u_int64_t value);
+
+#define bs_w_1_s_proto(f) \
+void __bs_c(f,_bs_w_1_s) (void *t, bus_space_handle_t bsh, \
+ bus_size_t offset, u_int8_t value);
+
+#define bs_w_2_s_proto(f) \
+void __bs_c(f,_bs_w_2_s) (void *t, bus_space_handle_t bsh, \
+ bus_size_t offset, u_int16_t value);
+
+#define bs_w_4_s_proto(f) \
+void __bs_c(f,_bs_w_4_s) (void *t, bus_space_handle_t bsh, \
+ bus_size_t offset, u_int32_t value);
+
+#define bs_rm_1_proto(f) \
+void __bs_c(f,_bs_rm_1) (void *t, bus_space_handle_t bsh, \
+ bus_size_t offset, u_int8_t *addr, bus_size_t count);
+
+#define bs_rm_2_proto(f) \
+void __bs_c(f,_bs_rm_2) (void *t, bus_space_handle_t bsh, \
+ bus_size_t offset, u_int16_t *addr, bus_size_t count);
+
+#define bs_rm_4_proto(f) \
+void __bs_c(f,_bs_rm_4) (void *t, bus_space_handle_t bsh, \
+ bus_size_t offset, u_int32_t *addr, bus_size_t count);
+
+#define bs_rm_8_proto(f) \
+void __bs_c(f,_bs_rm_8) (void *t, bus_space_handle_t bsh, \
+ bus_size_t offset, u_int64_t *addr, bus_size_t count);
+
+#define bs_wm_1_proto(f) \
+void __bs_c(f,_bs_wm_1) (void *t, bus_space_handle_t bsh, \
+ bus_size_t offset, const u_int8_t *addr, bus_size_t count);
+
+#define bs_wm_2_proto(f) \
+void __bs_c(f,_bs_wm_2) (void *t, bus_space_handle_t bsh, \
+ bus_size_t offset, const u_int16_t *addr, bus_size_t count);
+
*** DIFF OUTPUT TRUNCATED AT 1000 LINES ***
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