svn commit: r354339 - head/contrib/llvm/lib/Target/PowerPC

Dimitry Andric dim at FreeBSD.org
Mon Nov 4 19:38:08 UTC 2019


Author: dim
Date: Mon Nov  4 19:38:07 2019
New Revision: 354339
URL: https://svnweb.freebsd.org/changeset/base/354339

Log:
  Merge commit 97e362607 from llvm git (by Nemanja Ivanovic):
  
    [PowerPC] Do not emit HW loop if the body contains calls to
    lrint/lround
  
    These two intrinsics are lowered to calls so should prevent the
    formation of CTR loops. In a subsequent patch, we will handle all
    currently known intrinsics and prevent the formation of HW loops if
    any unknown intrinsics are encountered.
  
    Differential revision: https://reviews.llvm.org/D68841
  
  This should fix an "invalid CRT loop" assertion when building the
  www/node port for powerpc64.
  
  Requested by:	Alfredo Dal'Ava Júnior <alfredo.junior at eldorado.org.br>
  MFC after:	1 month
  X-MFC-With:	r353358

Modified:
  head/contrib/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp

Modified: head/contrib/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
==============================================================================
--- head/contrib/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp	Mon Nov  4 19:30:19 2019	(r354338)
+++ head/contrib/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp	Mon Nov  4 19:38:07 2019	(r354339)
@@ -331,8 +331,12 @@ bool PPCTTIImpl::mightUseCTR(BasicBlock *BB,
           case Intrinsic::ceil:               Opcode = ISD::FCEIL;      break;
           case Intrinsic::trunc:              Opcode = ISD::FTRUNC;     break;
           case Intrinsic::rint:               Opcode = ISD::FRINT;      break;
+          case Intrinsic::lrint:              Opcode = ISD::LRINT;      break;
+          case Intrinsic::llrint:             Opcode = ISD::LLRINT;     break;
           case Intrinsic::nearbyint:          Opcode = ISD::FNEARBYINT; break;
           case Intrinsic::round:              Opcode = ISD::FROUND;     break;
+          case Intrinsic::lround:             Opcode = ISD::LROUND;     break;
+          case Intrinsic::llround:            Opcode = ISD::LLROUND;    break;
           case Intrinsic::minnum:             Opcode = ISD::FMINNUM;    break;
           case Intrinsic::maxnum:             Opcode = ISD::FMAXNUM;    break;
           case Intrinsic::umul_with_overflow: Opcode = ISD::UMULO;      break;


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