svn commit: r347017 - in head/sys: arm64/conf conf dts/arm64/overlays modules/dtb/allwinner
Emmanuel Vadot
manu at FreeBSD.org
Thu May 2 12:56:15 UTC 2019
Author: manu
Date: Thu May 2 12:56:13 2019
New Revision: 347017
URL: https://svnweb.freebsd.org/changeset/base/347017
Log:
arm64: Add support for NanoPI NEO2
Add overlay files and activate devicetree file for NanoPi NEO2 featuring
Allwinner H5 ARM64 core.
To enable sound, dma and codec drivers are enabled for build.
Submitted by: Manuel Stühn (freebsdnewbie at freenet.de)
MFC after: 1 month
Differential Revision: https://reviews.freebsd.org/D20129
Added:
head/sys/dts/arm64/overlays/sun50i-h5-nanopi-neo2-opp.dtso (contents, props changed)
head/sys/dts/arm64/overlays/sun50i-h5-opp.dtso (contents, props changed)
head/sys/dts/arm64/overlays/sun50i-h5-sid.dtso (contents, props changed)
head/sys/dts/arm64/overlays/sun50i-h5-ths.dtso (contents, props changed)
Modified:
head/sys/arm64/conf/GENERIC
head/sys/conf/files.arm64
head/sys/modules/dtb/allwinner/Makefile
Modified: head/sys/arm64/conf/GENERIC
==============================================================================
--- head/sys/arm64/conf/GENERIC Thu May 2 09:00:36 2019 (r347016)
+++ head/sys/arm64/conf/GENERIC Thu May 2 12:56:13 2019 (r347017)
@@ -215,11 +215,19 @@ device muge
device smcphy
device smsc
+# Sound support
+device sound
+device a10_codec
+
+# DMA controller
+device a31_dmac
+
# GPIO / PINCTRL
device aw_gpio # Allwinner GPIO controller
device gpio
device gpioled
device fdt_pinctrl
+device gpioregulator
device mv_gpio # Marvell GPIO controller
device mvebu_pinctrl # Marvell Pinmux Controller
device rk_gpio # RockChip GPIO Controller
Modified: head/sys/conf/files.arm64
==============================================================================
--- head/sys/conf/files.arm64 Thu May 2 09:00:36 2019 (r347016)
+++ head/sys/conf/files.arm64 Thu May 2 12:56:13 2019 (r347017)
@@ -27,6 +27,9 @@ cloudabi64_vdso_blob.o optional compat_cloudabi64 \
# Allwinner common files
arm/allwinner/a10_ehci.c optional ehci aw_ehci fdt
arm/allwinner/a10_timer.c optional a10_timer fdt
+arm/allwinner/a10_codec.c optional sound a10_codec
+arm/allwinner/a31_dmac.c optional a31_dmac
+arm/allwinner/sunxi_dma_if.m optional a31_dmac
arm/allwinner/aw_cir.c optional evdev aw_cir fdt
arm/allwinner/aw_gpio.c optional gpio aw_gpio fdt
arm/allwinner/aw_mmc.c optional mmc aw_mmc fdt | mmccam aw_mmc fdt
Added: head/sys/dts/arm64/overlays/sun50i-h5-nanopi-neo2-opp.dtso
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/sys/dts/arm64/overlays/sun50i-h5-nanopi-neo2-opp.dtso Thu May 2 12:56:13 2019 (r347017)
@@ -0,0 +1,32 @@
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+ compatible = "allwinner,sun50i-h5";
+};
+
+&{/} {
+ vdd_cpux: gpio-regulator {
+ compatible = "regulator-gpio";
+ pinctrl-names = "default";
+ regulator-name = "vdd-cpux";
+ regulator-type = "voltage";
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-ramp-delay = <50>; /* 4ms */
+ gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
+ gpios-states = <0x1>;
+ states = <1100000 0x0
+ 1300000 0x1>;
+ };
+
+};
+
+&{/cpus/cpu at 0} {
+ cpu-supply = <&vdd_cpux>;
+};
+
Added: head/sys/dts/arm64/overlays/sun50i-h5-opp.dtso
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/sys/dts/arm64/overlays/sun50i-h5-opp.dtso Thu May 2 12:56:13 2019 (r347017)
@@ -0,0 +1,99 @@
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/clock/sun8i-h3-ccu.h>
+
+/ {
+ compatible = "allwinner,sun50i-h5";
+};
+
+&{/} {
+ cpu_opp_table: opp_table {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ opp at 408000000 {
+ opp-hz = /bits/ 64 <408000000>;
+ opp-microvolt = <1000000 1000000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp at 648000000 {
+ opp-hz = /bits/ 64 <648000000>;
+ opp-microvolt = <1040000 1040000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp at 816000000 {
+ opp-hz = /bits/ 64 <816000000>;
+ opp-microvolt = <1080000 1080000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp at 912000000 {
+ opp-hz = /bits/ 64 <912000000>;
+ opp-microvolt = <1120000 1120000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp at 960000000 {
+ opp-hz = /bits/ 64 <960000000>;
+ opp-microvolt = <1160000 1160000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp at 1008000000 {
+ opp-hz = /bits/ 64 <1008000000>;
+ opp-microvolt = <1200000 1200000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp at 1056000000 {
+ opp-hz = /bits/ 64 <1056000000>;
+ opp-microvolt = <1240000 1240000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp at 1104000000 {
+ opp-hz = /bits/ 64 <1104000000>;
+ opp-microvolt = <1260000 1260000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp at 1152000000 {
+ opp-hz = /bits/ 64 <1152000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+ };
+
+ reg_cpu_fallback: reg_cpu_fallback {
+ compatible = "regulator-fixed";
+ regulator-name = "vdd-cpux-dummy";
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1100000>;
+ };
+
+};
+
+&{/cpus/cpu at 0} {
+ clocks = <&ccu CLK_CPUX>;
+ clock-names = "cpu";
+ clock-latency = <244144>; /* 8 32k periods */
+ operating-points-v2 = <&cpu_opp_table>;
+ cpu-supply = <®_cpu_fallback>;
+ #cooling-cells = <2>;
+};
+
+&{/cpus/cpu at 1} {
+ operating-points-v2 = <&cpu_opp_table>;
+};
+
+&{/cpus/cpu at 2} {
+ operating-points-v2 = <&cpu_opp_table>;
+};
+
+&{/cpus/cpu at 3} {
+ operating-points-v2 = <&cpu_opp_table>;
+};
+
Added: head/sys/dts/arm64/overlays/sun50i-h5-sid.dtso
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/sys/dts/arm64/overlays/sun50i-h5-sid.dtso Thu May 2 12:56:13 2019 (r347017)
@@ -0,0 +1,17 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+ compatible = "allwinner,sun50i-h5";
+};
+
+&{/soc} {
+ sid: eeprom at 1c14000 {
+ compatible = "allwinner,sun50i-h5-sid";
+ reg = <0x1c14000 0x400>;
+
+ ths_calib: calib at 234 {
+ reg = <0x234 0x4>;
+ };
+ };
+};
Added: head/sys/dts/arm64/overlays/sun50i-h5-ths.dtso
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/sys/dts/arm64/overlays/sun50i-h5-ths.dtso Thu May 2 12:56:13 2019 (r347017)
@@ -0,0 +1,26 @@
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/clock/sun8i-h3-ccu.h>
+#include <dt-bindings/reset/sun8i-h3-ccu.h>
+
+/ {
+ compatible = "allwinner,sun50i-h5";
+};
+
+&{/soc} {
+ ths: thermal_sensor at 1c25000 {
+ compatible = "allwinner,sun50i-h5-ths";
+ reg = <0x01c25000 0x100>;
+ interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_THS>, <&ccu CLK_THS>;
+ clock-names = "apb", "ths";
+ resets = <&ccu RST_BUS_THS>;
+ reset-names = "apb";
+ #thermal-sensor-cells = <1>;
+
+ nvmem-cells = <&ths_calib>;
+ nvmem-cell-names = "ths-calib";
+ };
+};
Modified: head/sys/modules/dtb/allwinner/Makefile
==============================================================================
--- head/sys/modules/dtb/allwinner/Makefile Thu May 2 09:00:36 2019 (r347016)
+++ head/sys/modules/dtb/allwinner/Makefile Thu May 2 12:56:13 2019 (r347017)
@@ -44,14 +44,19 @@ DTS= \
allwinner/sun50i-a64-pine64-plus.dts \
allwinner/sun50i-a64-pine64.dts \
allwinner/sun50i-a64-sopine-baseboard.dts \
- allwinner/sun50i-h5-orangepi-pc2.dts
+ allwinner/sun50i-h5-orangepi-pc2.dts \
+ allwinner/sun50i-h5-nanopi-neo2.dts
DTSO= sun50i-a64-opp.dtso \
sun50i-a64-pwm.dtso \
sun50i-a64-rpwm.dtso \
sun50i-a64-sid.dtso \
sun50i-a64-ths.dtso \
- sun50i-a64-timer.dtso
+ sun50i-a64-timer.dtso \
+ sun50i-h5-opp.dtso \
+ sun50i-h5-sid.dtso \
+ sun50i-h5-ths.dtso \
+ sun50i-h5-nanopi-neo2-opp.dtso
.endif
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