svn commit: r328932 - head/sys/mips/mips

[Alex Richardson]

Author: arichardson
Date: Tue Feb  6 15:41:15 2018
New Revision: 328932
URL: https://svnweb.freebsd.org/changeset/base/328932

Log:
  Make mips_postboot_fixup work when building the kernel with clang+lld
  
  The compiler/linker can align fake_preload anyway it would like. When
  building the kernel with gcc+bfd this always happened to be a multiple of 8.
  When I built the kernel with clang and linked with lld fake_preload
  happened to only be aligned to 4 bytes which caused a an ADDRS trap because
  the compiler will emit sd instructions to store to this buffer.
  
  Reviewed By:	jhb, imp
  Approved By:	jhb (mentor)
  Differential Revision: https://reviews.freebsd.org/D14018

Modified:
  head/sys/mips/mips/machdep.c

Modified: head/sys/mips/mips/machdep.c
==============================================================================
--- head/sys/mips/mips/machdep.c	Tue Feb  6 15:30:17 2018	(r328931)
+++ head/sys/mips/mips/machdep.c	Tue Feb  6 15:41:15 2018	(r328932)
@@ -383,7 +383,11 @@ mips_vector_init(void)
 void
 mips_postboot_fixup(void)
 {
-	static char fake_preload[256];
+	/*
+	 * We store u_long sized objects into the reload area, so the array
+	 * must be so aligned. The standard allows any alignment for char data.
+	 */
+	static char fake_preload[256] _Alignas(_Alignof(u_long));
 	caddr_t preload_ptr = (caddr_t)&fake_preload[0];
 	size_t size = 0;