svn commit: r264051 - in head/sys/arm: arm ti/omap4

[Ian Lepore]

Author: ian
Date: Wed Apr  2 18:49:50 2014
New Revision: 264051
URL: http://svnweb.freebsd.org/changeset/base/264051

Log:
  Trivial changes/forced-commit to document previous change r264050 whose
  description was eaten by the dog (or an editor crash or something).
  
  Add variable-frequency support to the arm mpcore eventtimer driver.
  
  This allows a platform's early init code to tell the mpcore driver that the
  clock frequency can vary.  That causes the mpcore driver to register an
  eventtimer, but not a timecounter.  The platform has to provide a time
  counter using some other fixed-frequency clock, but can still use the
  per-cpu goodness of the mpcore hardware for event timers.
  
  When the platform support code does something to change the frequency of
  the CPU clocks (power saving, thermal management) it must tell the mpcore
  driver code about it using arm_tmr_change_frequency().

Modified:
  head/sys/arm/arm/mpcore_timer.c
  head/sys/arm/arm/mpcore_timervar.h
  head/sys/arm/ti/omap4/omap4_prcm_clks.c

Modified: head/sys/arm/arm/mpcore_timer.c
==============================================================================
--- head/sys/arm/arm/mpcore_timer.c	Wed Apr  2 18:43:56 2014	(r264050)
+++ head/sys/arm/arm/mpcore_timer.c	Wed Apr  2 18:49:50 2014	(r264051)
@@ -30,16 +30,16 @@
  */
 
 /**
- *	The ARM Cortex-A9 core can support a global timer plus a private and
- *	watchdog timer per core.  This driver reserves memory and interrupt
- *	resources for accessing both timer register sets, these resources are
- *	stored globally and used to setup the timecount and eventtimer.
+ * The ARM Cortex-A9 core can support a global timer plus a private and
+ * watchdog timer per core.  This driver reserves memory and interrupt
+ * resources for accessing both timer register sets, these resources are
+ * stored globally and used to setup the timecount and eventtimer.
  *
- *	The timecount timer uses the global 64-bit counter, whereas the
- *	per-CPU eventtimer uses the private 32-bit counters.
+ * The timecount timer uses the global 64-bit counter, whereas the
+ * per-CPU eventtimer uses the private 32-bit counters.
  *
  *
- *	REF: ARM Cortex-A9 MPCore, Technical Reference Manual (rev. r2p2)
+ * REF: ARM Cortex-A9 MPCore, Technical Reference Manual (rev. r2p2)
  */
 
 #include <sys/cdefs.h>

Modified: head/sys/arm/arm/mpcore_timervar.h
==============================================================================
--- head/sys/arm/arm/mpcore_timervar.h	Wed Apr  2 18:43:56 2014	(r264050)
+++ head/sys/arm/arm/mpcore_timervar.h	Wed Apr  2 18:49:50 2014	(r264051)
@@ -42,6 +42,6 @@
  * Inform the mpcore timer driver of a new clock frequency.  This can be called
  * both before and after the mpcore timer driver attaches.
  */
-void	arm_tmr_change_frequency(uint64_t newfreq);
+void arm_tmr_change_frequency(uint64_t newfreq);
 
 #endif

Modified: head/sys/arm/ti/omap4/omap4_prcm_clks.c
==============================================================================
--- head/sys/arm/ti/omap4/omap4_prcm_clks.c	Wed Apr  2 18:43:56 2014	(r264050)
+++ head/sys/arm/ti/omap4/omap4_prcm_clks.c	Wed Apr  2 18:49:50 2014	(r264051)
@@ -86,7 +86,6 @@ __FBSDID("$FreeBSD$");
  *	OMAP4 devices are different from the previous OMAP3 devices in that there
  *	is no longer a separate functional and interface clock for each module,
  *	instead there is typically an interface clock that spans many modules.
- *
  */
 
 #define FREQ_96MHZ    96000000