svn commit: r233961 - head/sys/x86/x86

[Nathan Whitehorn]

On 04/09/12 10:45, Jaakko Heinonen wrote:
> Hi,
>
> On 2012-04-06, Justin T. Gibbs wrote:
>>    Fix interrupt load balancing regression, introduced in revision
>>    222813, that left all un-pinned interrupts assigned to CPU 0.
>>
>>    sys/x86/x86/intr_machdep.c:
>>    	In intr_shuffle_irqs(), remove CPU_SETOF() call that initialized
>>    	the "intr_cpus" cpuset to only contain CPU0.
>>
>>    	This initialization is too late and nullifies the results of calls
>>    	the intr_add_cpu() that occur much earlier in the boot process.
>>    	Since "intr_cpus" is statically initialized to the empty set, and
>>    	all processors, including the BSP, already add themselves to
>>    	"intr_cpus" no special initialization for the BSP is necessary.
> My Pentium 4 system hangs on boot after this commit. These are the last
> lines from a verbose boot:
>
> SMP: AP CPU #1 Launched!
> cpu1 AP:
>       ID: 0x01000000   VER: 0x00050014 LDR: 0x00000000 DFR: 0xffffffff
>    lint0: 0x00010700 lint1: 0x00000400 TPR: 0x00000000 SVR: 0x000001ff
>    timer: 0x000100ef therm: 0x00010000 err: 0x000000f0 pmc: 0x00010400

For whatever it's worth, I had a similar problem on PPC with interrupt 
distribution where interrupts were going very early in boot to non-BSP 
CPUs before they were launched, and so getting lost.
-Nathan