svn commit: r228018 - head/sys/mips/atheros
Aleksandr Rybalko
ray at FreeBSD.org
Sun Nov 27 11:15:59 UTC 2011
Author: ray
Date: Sun Nov 27 11:15:59 2011
New Revision: 228018
URL: http://svn.freebsd.org/changeset/base/228018
Log:
Join chip depended methods for arge0 and arge1 into single call with unit.
Approved by: adrian (mentor)
Modified:
head/sys/mips/atheros/ar71xx_chip.c
head/sys/mips/atheros/ar71xx_cpudef.h
head/sys/mips/atheros/ar724x_chip.c
head/sys/mips/atheros/ar91xx_chip.c
head/sys/mips/atheros/if_arge.c
Modified: head/sys/mips/atheros/ar71xx_chip.c
==============================================================================
--- head/sys/mips/atheros/ar71xx_chip.c Sun Nov 27 06:55:57 2011 (r228017)
+++ head/sys/mips/atheros/ar71xx_chip.c Sun Nov 27 11:15:59 2011 (r228018)
@@ -140,7 +140,7 @@ ar71xx_chip_device_stopped(uint32_t mask
/* Speed is either 10, 100 or 1000 */
static void
-ar71xx_chip_set_pll_ge0(int speed)
+ar71xx_chip_set_pll_ge(int unit, int speed)
{
uint32_t pll;
@@ -155,46 +155,43 @@ ar71xx_chip_set_pll_ge0(int speed)
pll = PLL_ETH_INT_CLK_1000;
break;
default:
- printf("ar71xx_chip_set_pll_ge0: invalid speed %d\n", speed);
+ printf("%s%d: invalid speed %d\n",
+ __func__, unit, speed);
return;
}
-
- ar71xx_write_pll(AR71XX_PLL_SEC_CONFIG, AR71XX_PLL_ETH_INT0_CLK, pll, AR71XX_PLL_ETH0_SHIFT);
-}
-
-static void
-ar71xx_chip_set_pll_ge1(int speed)
-{
- uint32_t pll;
-
- switch(speed) {
- case 10:
- pll = PLL_ETH_INT_CLK_10;
- break;
- case 100:
- pll = PLL_ETH_INT_CLK_100;
- break;
- case 1000:
- pll = PLL_ETH_INT_CLK_1000;
- break;
- default:
- printf("ar71xx_chip_set_pll_ge1: invalid speed %d\n", speed);
- return;
+ switch (unit) {
+ case 0:
+ ar71xx_write_pll(AR71XX_PLL_SEC_CONFIG,
+ AR71XX_PLL_ETH_INT0_CLK, pll,
+ AR71XX_PLL_ETH0_SHIFT);
+ break;
+ case 1:
+ ar71xx_write_pll(AR71XX_PLL_SEC_CONFIG,
+ AR71XX_PLL_ETH_INT1_CLK, pll,
+ AR71XX_PLL_ETH1_SHIFT);
+ break;
+ default:
+ printf("%s: invalid PLL set for arge unit: %d\n",
+ __func__, unit);
+ return;
}
-
- ar71xx_write_pll(AR71XX_PLL_SEC_CONFIG, AR71XX_PLL_ETH_INT1_CLK, pll, AR71XX_PLL_ETH1_SHIFT);
-}
-
-static void
-ar71xx_chip_ddr_flush_ge0(void)
-{
- ar71xx_ddr_flush(AR71XX_WB_FLUSH_GE0);
}
static void
-ar71xx_chip_ddr_flush_ge1(void)
+ar71xx_chip_ddr_flush_ge(int unit)
{
- ar71xx_ddr_flush(AR71XX_WB_FLUSH_GE1);
+ switch (unit) {
+ case 0:
+ ar71xx_ddr_flush(AR71XX_WB_FLUSH_GE0);
+ break;
+ case 1:
+ ar71xx_ddr_flush(AR71XX_WB_FLUSH_GE1);
+ break;
+ default:
+ printf("%s: invalid DDR flush for arge unit: %d\n",
+ __func__, unit);
+ return;
+ }
}
static void
@@ -234,10 +231,8 @@ struct ar71xx_cpu_def ar71xx_chip_def =
&ar71xx_chip_device_stop,
&ar71xx_chip_device_start,
&ar71xx_chip_device_stopped,
- &ar71xx_chip_set_pll_ge0,
- &ar71xx_chip_set_pll_ge1,
- &ar71xx_chip_ddr_flush_ge0,
- &ar71xx_chip_ddr_flush_ge1,
+ &ar71xx_chip_set_pll_ge,
+ &ar71xx_chip_ddr_flush_ge,
&ar71xx_chip_get_eth_pll,
&ar71xx_chip_ddr_flush_ip2,
&ar71xx_chip_init_usb_peripheral,
Modified: head/sys/mips/atheros/ar71xx_cpudef.h
==============================================================================
--- head/sys/mips/atheros/ar71xx_cpudef.h Sun Nov 27 06:55:57 2011 (r228017)
+++ head/sys/mips/atheros/ar71xx_cpudef.h Sun Nov 27 11:15:59 2011 (r228018)
@@ -35,10 +35,8 @@ struct ar71xx_cpu_def {
void (* ar71xx_chip_device_stop) (uint32_t);
void (* ar71xx_chip_device_start) (uint32_t);
int (* ar71xx_chip_device_stopped) (uint32_t);
- void (* ar71xx_chip_set_pll_ge0) (int);
- void (* ar71xx_chip_set_pll_ge1) (int);
- void (* ar71xx_chip_ddr_flush_ge0) (void);
- void (* ar71xx_chip_ddr_flush_ge1) (void);
+ void (* ar71xx_chip_set_pll_ge) (int, int);
+ void (* ar71xx_chip_ddr_flush_ge) (int);
uint32_t (* ar71xx_chip_get_eth_pll) (unsigned int, int);
/*
@@ -81,24 +79,14 @@ static inline int ar71xx_device_stopped(
return ar71xx_cpu_ops->ar71xx_chip_device_stopped(mask);
}
-static inline void ar71xx_device_set_pll_ge0(int speed)
+static inline void ar71xx_device_set_pll_ge(int unit, int speed)
{
- ar71xx_cpu_ops->ar71xx_chip_set_pll_ge0(speed);
+ ar71xx_cpu_ops->ar71xx_chip_set_pll_ge(unit, speed);
}
-static inline void ar71xx_device_set_pll_ge1(int speed)
+static inline void ar71xx_device_flush_ddr_ge(int unit)
{
- ar71xx_cpu_ops->ar71xx_chip_set_pll_ge1(speed);
-}
-
-static inline void ar71xx_device_flush_ddr_ge0(void)
-{
- ar71xx_cpu_ops->ar71xx_chip_ddr_flush_ge0();
-}
-
-static inline void ar71xx_device_flush_ddr_ge1(void)
-{
- ar71xx_cpu_ops->ar71xx_chip_ddr_flush_ge1();
+ ar71xx_cpu_ops->ar71xx_chip_ddr_flush_ge(unit);
}
static inline void ar71xx_init_usb_peripheral(void)
Modified: head/sys/mips/atheros/ar724x_chip.c
==============================================================================
--- head/sys/mips/atheros/ar724x_chip.c Sun Nov 27 06:55:57 2011 (r228017)
+++ head/sys/mips/atheros/ar724x_chip.c Sun Nov 27 11:15:59 2011 (r228018)
@@ -123,25 +123,37 @@ ar724x_chip_device_stopped(uint32_t mask
}
static void
-ar724x_chip_set_pll_ge0(int speed)
+ar724x_chip_set_pll_ge(int unit, int speed)
{
+ switch (unit) {
+ case 0:
+ /* TODO */
+ break;
+ case 1:
+ /* TODO */
+ break;
+ default:
+ printf("%s: invalid PLL set for arge unit: %d\n",
+ __func__, unit);
+ return;
+ }
}
static void
-ar724x_chip_set_pll_ge1(int speed)
-{
-}
-
-static void
-ar724x_chip_ddr_flush_ge0(void)
-{
- ar71xx_ddr_flush(AR724X_DDR_REG_FLUSH_GE0);
-}
-
-static void
-ar724x_chip_ddr_flush_ge1(void)
+ar724x_chip_ddr_flush_ge(int unit)
{
- ar71xx_ddr_flush(AR724X_DDR_REG_FLUSH_GE1);
+ switch (unit) {
+ case 0:
+ ar71xx_ddr_flush(AR724X_DDR_REG_FLUSH_GE0);
+ break;
+ case 1:
+ ar71xx_ddr_flush(AR724X_DDR_REG_FLUSH_GE1);
+ break;
+ default:
+ printf("%s: invalid DDR flush for arge unit: %d\n",
+ __func__, unit);
+ return;
+ }
}
static void
@@ -207,10 +219,8 @@ struct ar71xx_cpu_def ar724x_chip_def =
&ar724x_chip_device_stop,
&ar724x_chip_device_start,
&ar724x_chip_device_stopped,
- &ar724x_chip_set_pll_ge0,
- &ar724x_chip_set_pll_ge1,
- &ar724x_chip_ddr_flush_ge0,
- &ar724x_chip_ddr_flush_ge1,
+ &ar724x_chip_set_pll_ge,
+ &ar724x_chip_ddr_flush_ge,
&ar724x_chip_get_eth_pll,
&ar724x_chip_ddr_flush_ip2,
&ar724x_chip_init_usb_peripheral
Modified: head/sys/mips/atheros/ar91xx_chip.c
==============================================================================
--- head/sys/mips/atheros/ar91xx_chip.c Sun Nov 27 06:55:57 2011 (r228017)
+++ head/sys/mips/atheros/ar91xx_chip.c Sun Nov 27 11:15:59 2011 (r228018)
@@ -113,7 +113,7 @@ ar91xx_chip_device_stopped(uint32_t mask
}
static void
-ar91xx_chip_set_pll_ge0(int speed)
+ar91xx_chip_set_pll_ge(int unit, int speed)
{
uint32_t pll;
@@ -128,48 +128,43 @@ ar91xx_chip_set_pll_ge0(int speed)
pll = AR91XX_PLL_VAL_1000;
break;
default:
- printf("ar91xx_chip_set_pll_ge0: invalid speed %d\n",
- speed);
+ printf("%s%d: invalid speed %d\n",
+ __func__, unit, speed);
return;
}
- ar71xx_write_pll(AR91XX_PLL_REG_ETH_CONFIG,
- AR91XX_PLL_REG_ETH0_INT_CLOCK, pll, AR91XX_ETH0_PLL_SHIFT);
-}
-
-static void
-ar91xx_chip_set_pll_ge1(int speed)
-{
- uint32_t pll;
-
- switch(speed) {
- case 10:
- pll = AR91XX_PLL_VAL_10;
- break;
- case 100:
- pll = AR91XX_PLL_VAL_100;
- break;
- case 1000:
- pll = AR91XX_PLL_VAL_1000;
- break;
- default:
- printf("ar91xx_chip_set_pll_ge0: invalid speed %d\n",
- speed);
- return;
+ switch (unit) {
+ case 0:
+ ar71xx_write_pll(AR91XX_PLL_REG_ETH_CONFIG,
+ AR91XX_PLL_REG_ETH0_INT_CLOCK, pll,
+ AR91XX_ETH0_PLL_SHIFT);
+ break;
+ case 1:
+ ar71xx_write_pll(AR91XX_PLL_REG_ETH_CONFIG,
+ AR91XX_PLL_REG_ETH1_INT_CLOCK, pll,
+ AR91XX_ETH1_PLL_SHIFT);
+ break;
+ default:
+ printf("%s: invalid PLL set for arge unit: %d\n",
+ __func__, unit);
+ return;
}
- ar71xx_write_pll(AR91XX_PLL_REG_ETH_CONFIG,
- AR91XX_PLL_REG_ETH1_INT_CLOCK, pll, AR91XX_ETH1_PLL_SHIFT);
}
static void
-ar91xx_chip_ddr_flush_ge0(void)
+ar91xx_chip_ddr_flush_ge(int unit)
{
- ar71xx_ddr_flush(AR91XX_DDR_REG_FLUSH_GE0);
-}
-
-static void
-ar91xx_chip_ddr_flush_ge1(void)
-{
- ar71xx_ddr_flush(AR91XX_DDR_REG_FLUSH_GE1);
+ switch (unit) {
+ case 0:
+ ar71xx_ddr_flush(AR91XX_DDR_REG_FLUSH_GE0);
+ break;
+ case 1:
+ ar71xx_ddr_flush(AR91XX_DDR_REG_FLUSH_GE1);
+ break;
+ default:
+ printf("%s: invalid DDR flush for arge unit: %d\n",
+ __func__, unit);
+ return;
+ }
}
static void
@@ -211,10 +206,8 @@ struct ar71xx_cpu_def ar91xx_chip_def =
&ar91xx_chip_device_stop,
&ar91xx_chip_device_start,
&ar91xx_chip_device_stopped,
- &ar91xx_chip_set_pll_ge0,
- &ar91xx_chip_set_pll_ge1,
- &ar91xx_chip_ddr_flush_ge0,
- &ar91xx_chip_ddr_flush_ge1,
+ &ar91xx_chip_set_pll_ge,
+ &ar91xx_chip_ddr_flush_ge,
&ar91xx_chip_get_eth_pll,
&ar91xx_chip_ddr_flush_ip2,
&ar91xx_chip_init_usb_peripheral,
Modified: head/sys/mips/atheros/if_arge.c
==============================================================================
--- head/sys/mips/atheros/if_arge.c Sun Nov 27 06:55:57 2011 (r228017)
+++ head/sys/mips/atheros/if_arge.c Sun Nov 27 11:15:59 2011 (r228018)
@@ -774,10 +774,7 @@ arge_set_pll(struct arge_softc *sc, int
ARGE_WRITE(sc, AR71XX_MAC_FIFO_TX_THRESHOLD, fifo_tx);
/* set PLL registers */
- if (sc->arge_mac_unit == 0)
- ar71xx_device_set_pll_ge0(if_speed);
- else
- ar71xx_device_set_pll_ge1(if_speed);
+ ar71xx_device_set_pll_ge(sc->arge_mac_unit, if_speed);
}
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