svn commit: r228980 - in head/sys/dev/ath/ath_hal: ar5210 ar5211

[Dimitry Andric]

Author: dim
Date: Fri Dec 30 02:58:37 2011
New Revision: 228980
URL: http://svn.freebsd.org/changeset/base/228980

Log:
  Reapply r228785 now it has been tested by Adrian.  Also add comments
  with the old AR_SCR_SLE_XXX values, with a short explanation why they
  were changed.
  
  Reviewed by:	adrian
  MFC after:	1 week

Modified:
  head/sys/dev/ath/ath_hal/ar5210/ar5210reg.h
  head/sys/dev/ath/ath_hal/ar5211/ar5211reg.h

Modified: head/sys/dev/ath/ath_hal/ar5210/ar5210reg.h
==============================================================================
--- head/sys/dev/ath/ath_hal/ar5210/ar5210reg.h	Fri Dec 30 02:07:50 2011	(r228979)
+++ head/sys/dev/ath/ath_hal/ar5210/ar5210reg.h	Fri Dec 30 02:58:37 2011	(r228980)
@@ -245,9 +245,20 @@
 #define	AR_SCR_SLDUR		0x0000ffff	/* sleep duration */
 #define	AR_SCR_SLE		0x00030000	/* sleep enable */
 #define	AR_SCR_SLE_S		16
-#define	AR_SCR_SLE_WAKE		0x00000000	/* force wake */
-#define	AR_SCR_SLE_SLP		0x00010000	/* force sleep */
-#define	AR_SCR_SLE_ALLOW	0x00020000	/* allow to control sleep */
+/*
+ * The previous values for the following three defines were:
+ *
+ *	AR_SCR_SLE_WAKE		0x00000000
+ *	AR_SCR_SLE_SLP		0x00010000
+ *	AR_SCR_SLE_ALLOW	0x00020000
+ *
+ * However, these have been pre-shifted with AR_SCR_SLE_S.  The
+ * OS_REG_READ() macro would attempt to shift them again, effectively
+ * shifting out any of the set bits completely.
+ */
+#define	AR_SCR_SLE_WAKE		0		/* force wake */
+#define	AR_SCR_SLE_SLP		1		/* force sleep */
+#define	AR_SCR_SLE_ALLOW	2		/* allow to control sleep */
 #define	AR_SCR_BITS	"\20\20SLE_SLP\21SLE_ALLOW"
 
 #define	AR_INTPEND_IP		0x00000001	/* interrupt pending */

Modified: head/sys/dev/ath/ath_hal/ar5211/ar5211reg.h
==============================================================================
--- head/sys/dev/ath/ath_hal/ar5211/ar5211reg.h	Fri Dec 30 02:07:50 2011	(r228979)
+++ head/sys/dev/ath/ath_hal/ar5211/ar5211reg.h	Fri Dec 30 02:58:37 2011	(r228980)
@@ -618,9 +618,20 @@
 #define	AR_SCR_SLDUR_S	0
 #define	AR_SCR_SLE	0x00030000	/* sleep enable mask */
 #define	AR_SCR_SLE_S	16		/* sleep enable bits shift */
-#define	AR_SCR_SLE_WAKE	0x00000000	/* force wake */
-#define	AR_SCR_SLE_SLP	0x00010000	/* force sleep */
-#define	AR_SCR_SLE_NORM	0x00020000	/* sleep logic normal operation */
+/*
+ * The previous values for the following three defines were:
+ *
+ *	AR_SCR_SLE_WAKE	0x00000000
+ *	AR_SCR_SLE_SLP	0x00010000
+ *	AR_SCR_SLE_NORM	0x00020000
+ *
+ * However, these have been pre-shifted with AR_SCR_SLE_S.  The
+ * OS_REG_READ() macro would attempt to shift them again, effectively
+ * shifting out any of the set bits completely.
+ */
+#define	AR_SCR_SLE_WAKE	0		/* force wake */
+#define	AR_SCR_SLE_SLP	1		/* force sleep */
+#define	AR_SCR_SLE_NORM	2		/* sleep logic normal operation */
 #define	AR_SCR_SLE_UNITS	0x00000008	/* SCR units/TU */
 #define	AR_SCR_BITS	"\20\20SLE_SLP\21SLE"