svn commit: r202839 - in head/sys/mips: atheros conf
Oleksandr Tymoshenko
gonzo at FreeBSD.org
Fri Jan 22 22:14:13 UTC 2010
Author: gonzo
Date: Fri Jan 22 22:14:12 2010
New Revision: 202839
URL: http://svn.freebsd.org/changeset/base/202839
Log:
- Add driver for PCF2123, SPI real time clock/calendar
Added:
head/sys/mips/atheros/pcf2123_rtc.c (contents, props changed)
head/sys/mips/atheros/pcf2123reg.h (contents, props changed)
Modified:
head/sys/mips/atheros/files.ar71xx
head/sys/mips/conf/AR71XX.hints
Modified: head/sys/mips/atheros/files.ar71xx
==============================================================================
--- head/sys/mips/atheros/files.ar71xx Fri Jan 22 21:36:34 2010 (r202838)
+++ head/sys/mips/atheros/files.ar71xx Fri Jan 22 22:14:12 2010 (r202839)
@@ -7,6 +7,7 @@ mips/atheros/ar71xx_ohci.c optional ohci
mips/atheros/ar71xx_pci.c optional pci
mips/atheros/ar71xx_pci_bus_space.c optional pci
mips/atheros/ar71xx_spi.c optional ar71xx_spi
+mips/atheros/pcf2123_rtc.c optional pcf2123_rtc ar71xx_spi
mips/atheros/ar71xx_wdog.c optional ar71xx_wdog
mips/atheros/if_arge.c optional arge
mips/atheros/uart_bus_ar71xx.c optional uart
Added: head/sys/mips/atheros/pcf2123_rtc.c
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/sys/mips/atheros/pcf2123_rtc.c Fri Jan 22 22:14:12 2010 (r202839)
@@ -0,0 +1,204 @@
+/*-
+ * Copyright (c) 2010, Oleksandr Tymoshenko <gonzo at FreeBSD.org>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice unmodified, this list of conditions, and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+
+#include <sys/param.h>
+#include <sys/bus.h>
+#include <sys/lock.h>
+#include <sys/time.h>
+#include <sys/clock.h>
+#include <sys/resource.h>
+#include <sys/systm.h>
+#include <sys/rman.h>
+#include <sys/kernel.h>
+#include <sys/module.h>
+
+#include <mips/atheros/pcf2123reg.h>
+
+#include <dev/spibus/spi.h>
+#include "spibus_if.h"
+
+#include "clock_if.h"
+
+#define YEAR_BASE 1970
+#define PCF2123_DELAY 50
+
+struct pcf2123_rtc_softc {
+ device_t dev;
+};
+
+static int pcf2123_rtc_probe(device_t dev);
+static int pcf2123_rtc_attach(device_t dev);
+
+static int pcf2123_rtc_gettime(device_t dev, struct timespec *ts);
+static int pcf2123_rtc_settime(device_t dev, struct timespec *ts);
+
+static int
+pcf2123_rtc_probe(device_t dev)
+{
+
+ device_set_desc(dev, "PCF2123 SPI RTC");
+ return (0);
+}
+
+static int
+pcf2123_rtc_attach(device_t dev)
+{
+ struct pcf2123_rtc_softc *sc;
+ struct spi_command cmd;
+ unsigned char rxBuf[3];
+ unsigned char txBuf[3];
+ int err;
+
+ sc = device_get_softc(dev);
+ sc->dev = dev;
+
+ clock_register(dev, 1000000);
+
+ memset(&cmd, 0, sizeof(cmd));
+ memset(rxBuf, 0, sizeof(rxBuf));
+ memset(txBuf, 0, sizeof(txBuf));
+
+ /* Make sure Ctrl1 and Ctrl2 are zeroes */
+ txBuf[0] = PCF2123_WRITE(PCF2123_REG_CTRL1);
+ cmd.rx_cmd = rxBuf;
+ cmd.tx_cmd = txBuf;
+ cmd.rx_cmd_sz = sizeof(rxBuf);
+ cmd.tx_cmd_sz = sizeof(txBuf);
+ err = SPIBUS_TRANSFER(device_get_parent(dev), dev, &cmd);
+ DELAY(PCF2123_DELAY);
+
+ return (0);
+}
+
+static int
+pcf2123_rtc_gettime(device_t dev, struct timespec *ts)
+{
+ struct clocktime ct;
+ struct spi_command cmd;
+ unsigned char rxTimedate[8];
+ unsigned char txTimedate[8];
+ int err;
+
+ memset(&cmd, 0, sizeof(cmd));
+ memset(rxTimedate, 0, sizeof(rxTimedate));
+ memset(txTimedate, 0, sizeof(txTimedate));
+
+ /*
+ * Counter is stopped when access to time registers is in progress
+ * So there is no need to stop/start counter
+ */
+ /* Start reading from seconds */
+ txTimedate[0] = PCF2123_READ(PCF2123_REG_SECONDS);
+ cmd.rx_cmd = rxTimedate;
+ cmd.tx_cmd = txTimedate;
+ cmd.rx_cmd_sz = sizeof(rxTimedate);
+ cmd.tx_cmd_sz = sizeof(txTimedate);
+ err = SPIBUS_TRANSFER(device_get_parent(dev), dev, &cmd);
+ DELAY(PCF2123_DELAY);
+
+ ct.nsec = 0;
+ ct.sec = FROMBCD(rxTimedate[1] & 0x7f);
+ ct.min = FROMBCD(rxTimedate[2] & 0x7f);
+ ct.hour = FROMBCD(rxTimedate[3] & 0x3f);
+
+ ct.dow = FROMBCD(rxTimedate[5] & 0x3f);
+
+ ct.day = FROMBCD(rxTimedate[4] & 0x3f);
+ ct.mon = FROMBCD(rxTimedate[6] & 0x1f);
+ ct.year = YEAR_BASE + FROMBCD(rxTimedate[7]);
+
+ return (clock_ct_to_ts(&ct, ts));
+}
+
+static int
+pcf2123_rtc_settime(device_t dev, struct timespec *ts)
+{
+ struct clocktime ct;
+ struct pcf2123_rtc_softc *sc;
+ struct spi_command cmd;
+ unsigned char rxTimedate[8];
+ unsigned char txTimedate[8];
+ int err;
+
+ sc = device_get_softc(dev);
+
+ /* Resolution: 1 sec */
+ if (ts->tv_nsec >= 500000000)
+ ts->tv_sec++;
+ ts->tv_nsec = 0;
+ clock_ts_to_ct(ts, &ct);
+
+ memset(&cmd, 0, sizeof(cmd));
+ memset(rxTimedate, 0, sizeof(rxTimedate));
+ memset(txTimedate, 0, sizeof(txTimedate));
+
+ /* Start reading from seconds */
+ cmd.rx_cmd = rxTimedate;
+ cmd.tx_cmd = txTimedate;
+ cmd.rx_cmd_sz = sizeof(rxTimedate);
+ cmd.tx_cmd_sz = sizeof(txTimedate);
+
+ /*
+ * Counter is stopped when access to time registers is in progress
+ * So there is no need to stop/start counter
+ */
+ txTimedate[0] = PCF2123_WRITE(PCF2123_REG_SECONDS);
+ txTimedate[1] = TOBCD(ct.sec);
+ txTimedate[2] = TOBCD(ct.min);
+ txTimedate[3] = TOBCD(ct.hour);
+ txTimedate[4] = TOBCD(ct.day);
+ txTimedate[5] = TOBCD(ct.dow);
+ txTimedate[6] = TOBCD(ct.mon);
+ txTimedate[7] = TOBCD(ct.year - YEAR_BASE);
+
+ err = SPIBUS_TRANSFER(device_get_parent(dev), dev, &cmd);
+ DELAY(PCF2123_DELAY);
+
+ return (err);
+}
+
+static device_method_t pcf2123_rtc_methods[] = {
+ DEVMETHOD(device_probe, pcf2123_rtc_probe),
+ DEVMETHOD(device_attach, pcf2123_rtc_attach),
+
+ DEVMETHOD(clock_gettime, pcf2123_rtc_gettime),
+ DEVMETHOD(clock_settime, pcf2123_rtc_settime),
+
+ { 0, 0 },
+};
+
+static driver_t pcf2123_rtc_driver = {
+ "rtc",
+ pcf2123_rtc_methods,
+ sizeof(struct pcf2123_rtc_softc),
+};
+static devclass_t pcf2123_rtc_devclass;
+
+DRIVER_MODULE(pcf2123_rtc, spibus, pcf2123_rtc_driver, pcf2123_rtc_devclass, 0, 0);
Added: head/sys/mips/atheros/pcf2123reg.h
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/sys/mips/atheros/pcf2123reg.h Fri Jan 22 22:14:12 2010 (r202839)
@@ -0,0 +1,67 @@
+/*-
+ * Copyright (c) 2009, Oleksandr Tymoshenko <gonzo at FreeBSD.org>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice unmodified, this list of conditions, and the following
+ * disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+/* $FreeBSD$ */
+
+#ifndef __PCF2123REG_H__
+#define __PCF2123REG_H__
+
+/* Control and status */
+#define PCF2123_REG_CTRL1 0x0
+#define PCF2123_REG_CTRL2 0x1
+
+/* Time and date */
+#define PCF2123_REG_SECONDS 0x2
+#define PCF2123_REG_MINUTES 0x3
+#define PCF2123_REG_HOURS 0x4
+#define PCF2123_REG_DAYS 0x5
+#define PCF2123_REG_WEEKDAYS 0x6
+#define PCF2123_REG_MONTHS 0x7
+#define PCF2123_REG_YEARS 0x8
+
+/* Alarm registers */
+#define PCF2123_REG_MINUTE_ALARM 0x9
+#define PCF2123_REG_HOUR_ALARM 0xA
+#define PCF2123_REG_DAY_ALARM 0xB
+#define PCF2123_REG_WEEKDAY_ALARM 0xC
+
+/* Offset */
+#define PCF2123_REG_OFFSET 0xD
+
+/* Timer */
+#define PCF2123_REG_TIMER_CLKOUT 0xE
+#define PCF2123_REG_COUNTDOWN_TIMER 0xF
+
+/* Commands */
+#define PCF2123_CMD_READ (1 << 7)
+#define PCF2123_CMD_WRITE (0 << 7)
+
+#define PCF2123_READ(reg) (PCF2123_CMD_READ | (1 << 4) | (reg))
+#define PCF2123_WRITE(reg) (PCF2123_CMD_WRITE | (1 << 4) | (reg))
+
+#endif /* __PCF2123REG_H__ */
+
Modified: head/sys/mips/conf/AR71XX.hints
==============================================================================
--- head/sys/mips/conf/AR71XX.hints Fri Jan 22 21:36:34 2010 (r202838)
+++ head/sys/mips/conf/AR71XX.hints Fri Jan 22 22:14:12 2010 (r202839)
@@ -55,5 +55,11 @@ hint.spi.0.msize=0x10
hint.mx25l.0.at="spibus0"
hint.mx25l.0.cs=0
+# shares the same bus with mx25l.
+# CE low for flash, CE high for RTC
+# at the moment it's just stub until SPI bus is ready for such hacks
+# hint.rtc.0.at="spibus0"
+# hint.rtc.0.cs=0
+
# Watchdog
hint.ar71xx_wdog.0.at="nexus0"
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