svn commit: r200540 - head/sys/dev/vge
Pyun YongHyeon
yongari at FreeBSD.org
Mon Dec 14 12:39:42 PST 2009
Author: yongari
Date: Mon Dec 14 20:39:42 2009
New Revision: 200540
URL: http://svn.freebsd.org/changeset/base/200540
Log:
Save PHY address by reading VGE_MIICFG register. For PCIe
controllers(VT613x), we assume the PHY address is 1.
Use the saved PHY address in MII register access routines and
remove accessing VGE_MIICFG register.
While I'm here save PCI express capability register which will be
used in near future.
Modified:
head/sys/dev/vge/if_vge.c
head/sys/dev/vge/if_vgevar.h
Modified: head/sys/dev/vge/if_vge.c
==============================================================================
--- head/sys/dev/vge/if_vge.c Mon Dec 14 20:26:27 2009 (r200539)
+++ head/sys/dev/vge/if_vge.c Mon Dec 14 20:39:42 2009 (r200540)
@@ -353,7 +353,7 @@ vge_miibus_readreg(device_t dev, int phy
sc = device_get_softc(dev);
- if (phy != (CSR_READ_1(sc, VGE_MIICFG) & 0x1F))
+ if (phy != sc->vge_phyaddr)
return (0);
vge_miipoll_stop(sc);
@@ -389,7 +389,7 @@ vge_miibus_writereg(device_t dev, int ph
sc = device_get_softc(dev);
- if (phy != (CSR_READ_1(sc, VGE_MIICFG) & 0x1F))
+ if (phy != sc->vge_phyaddr)
return (0);
vge_miipoll_stop(sc);
@@ -954,7 +954,7 @@ vge_attach(device_t dev)
u_char eaddr[ETHER_ADDR_LEN];
struct vge_softc *sc;
struct ifnet *ifp;
- int error = 0, rid;
+ int error = 0, cap, rid;
sc = device_get_softc(dev);
sc->vge_dev = dev;
@@ -978,6 +978,11 @@ vge_attach(device_t dev)
goto fail;
}
+ if (pci_find_extcap(dev, PCIY_EXPRESS, &cap) == 0) {
+ sc->vge_flags |= VGE_FLAG_PCIE;
+ sc->vge_expcap = cap;
+ }
+
/* Allocate interrupt */
rid = 0;
sc->vge_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
@@ -996,7 +1001,17 @@ vge_attach(device_t dev)
* Get station address from the EEPROM.
*/
vge_read_eeprom(sc, (caddr_t)eaddr, VGE_EE_EADDR, 3, 0);
-
+ /*
+ * Save configured PHY address.
+ * It seems the PHY address of PCIe controllers just
+ * reflects media jump strapping status so we assume the
+ * internal PHY address of PCIe controller is at 1.
+ */
+ if ((sc->vge_flags & VGE_FLAG_PCIE) != 0)
+ sc->vge_phyaddr = 1;
+ else
+ sc->vge_phyaddr = CSR_READ_1(sc, VGE_MIICFG) &
+ VGE_MIICFG_PHYADDR;
error = vge_dma_alloc(sc);
if (error)
goto fail;
Modified: head/sys/dev/vge/if_vgevar.h
==============================================================================
--- head/sys/dev/vge/if_vgevar.h Mon Dec 14 20:26:27 2009 (r200539)
+++ head/sys/dev/vge/if_vgevar.h Mon Dec 14 20:39:42 2009 (r200540)
@@ -141,8 +141,11 @@ struct vge_softc {
device_t vge_miibus;
uint8_t vge_type;
int vge_if_flags;
+ int vge_phyaddr;
int vge_flags;
+#define VGE_FLAG_PCIE 0x0001
#define VGE_FLAG_LINK 0x8000
+ int vge_expcap;
int vge_camidx;
struct mtx vge_mtx;
struct callout vge_watchdog;
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