svn commit: r260886 - head/sys/arm/at91
Warner Losh
imp at FreeBSD.org
Sun Jan 19 17:59:35 UTC 2014
Author: imp
Date: Sun Jan 19 17:59:34 2014
New Revision: 260886
URL: http://svnweb.freebsd.org/changeset/base/260886
Log:
Connect NAND for the SAM9260EK eval board, as well as the HotE HL-201.
# expect more refinement as do more boards.
Modified:
head/sys/arm/at91/board_hl201.c
head/sys/arm/at91/board_sam9260ek.c
head/sys/arm/at91/uart_dev_at91usart.c
Modified: head/sys/arm/at91/board_hl201.c
==============================================================================
--- head/sys/arm/at91/board_hl201.c Sun Jan 19 17:53:51 2014 (r260885)
+++ head/sys/arm/at91/board_hl201.c Sun Jan 19 17:59:34 2014 (r260886)
@@ -34,6 +34,36 @@ __FBSDID("$FreeBSD$");
#include <arm/at91/at91sam9g20reg.h>
#include <arm/at91/at91_piovar.h>
#include <arm/at91/at91_pio_sam9g20.h>
+#include <arm/at91/at91_smc.h>
+#include <arm/at91/at91_gpio.h>
+#include <dev/nand/nfc_at91.h>
+
+static struct at91_smc_init nand_smc = {
+ .ncs_rd_setup = 0,
+ .nrd_setup = 2,
+ .ncs_wr_setup = 0,
+ .nwe_setup = 2,
+
+ .ncs_rd_pulse = 4,
+ .nrd_pulse = 4,
+ .ncs_wr_pulse = 4,
+ .nwe_pulse = 4,
+
+ .nrd_cycle = 7,
+ .nwe_cycle = 7,
+
+ .mode = SMC_MODE_READ | SMC_MODE_WRITE | SMC_MODE_EXNW_DISABLED,
+ .tdf_cycles = 3,
+};
+
+static struct at91_nand_params nand_param = {
+ .ale = 1u << 21,
+ .cle = 1u << 22,
+ .width = 8,
+ .rnb_pin = AT91_PIN_PC13, /* Note: These pins not confirmed */
+ .nce_pin = AT91_PIN_PC14,
+ .cs = 3,
+};
BOARD_INIT long
board_init(void)
@@ -64,6 +94,27 @@ board_init(void)
at91_pio_use_periph_b(AT91SAM9G20_PIOA_BASE, AT91C_PIO_PA24, 0); /* ETX3 */
at91_pio_use_periph_b(AT91SAM9G20_PIOA_BASE, AT91C_PIO_PA22, 0); /* ETXER */
+ /* Setup Static Memory Controller */
+ at91_smc_setup(0, 3, &nand_smc);
+ at91_enable_nand(&nand_param);
+
+ /*
+ * This assumes
+ * - RNB is on pin PC13
+ * - CE is on pin PC14
+ *
+ * Nothing actually uses RNB right now.
+ *
+ * For CE, this currently asserts it during board setup and leaves it
+ * that way forever.
+ *
+ * All this can go away when the gpio pin-renumbering happens...
+ */
+ at91_pio_use_gpio(AT91SAM9G20_PIOC_BASE, AT91C_PIO_PC13 | AT91C_PIO_PC14);
+ at91_pio_gpio_input(AT91SAM9G20_PIOC_BASE, AT91C_PIO_PC13); /* RNB */
+ at91_pio_gpio_output(AT91SAM9G20_PIOC_BASE, AT91C_PIO_PC14, 0); /* nCS */
+ at91_pio_gpio_clear(AT91SAM9G20_PIOC_BASE, AT91C_PIO_PC14); /* Assert nCS */
+
return (at91_ramsize());
}
Modified: head/sys/arm/at91/board_sam9260ek.c
==============================================================================
--- head/sys/arm/at91/board_sam9260ek.c Sun Jan 19 17:53:51 2014 (r260885)
+++ head/sys/arm/at91/board_sam9260ek.c Sun Jan 19 17:59:34 2014 (r260886)
@@ -38,9 +38,39 @@ __FBSDID("$FreeBSD$");
#include <arm/at91/at91_piovar.h>
#include <arm/at91/at91board.h>
#include <arm/at91/at91sam9260reg.h>
+#include <arm/at91/at91_smc.h>
+#include <arm/at91/at91_gpio.h>
+#include <dev/nand/nfc_at91.h>
+
+static struct at91_smc_init nand_smc = {
+ .ncs_rd_setup = 0,
+ .nrd_setup = 1,
+ .ncs_wr_setup = 0,
+ .nwe_setup = 1,
+
+ .ncs_rd_pulse = 3,
+ .nrd_pulse = 3,
+ .ncs_wr_pulse = 3,
+ .nwe_pulse = 3,
+
+ .nrd_cycle = 5,
+ .nwe_cycle = 5,
+
+ .mode = SMC_MODE_READ | SMC_MODE_WRITE | SMC_MODE_EXNW_DISABLED,
+ .tdf_cycles = 2,
+};
+
+static struct at91_nand_params nand_param = {
+ .ale = 1u << 21,
+ .cle = 1u << 22,
+ .width = 8,
+ .rnb_pin = AT91_PIN_PC13,
+ .nce_pin = AT91_PIN_PC14,
+ .cs = 3,
+};
-BOARD_INIT long
-board_init(void)
+static void
+bi_dbgu(void)
{
/*
@@ -50,6 +80,11 @@ board_init(void)
at91_pio_use_periph_a(AT91SAM9260_PIOB_BASE, AT91C_PIO_PB14, 0);
/* DTXD */
at91_pio_use_periph_a(AT91SAM9260_PIOB_BASE, AT91C_PIO_PB15, 1);
+}
+
+static void
+bi_emac()
+{
/*
* EMAC
@@ -91,7 +126,11 @@ board_init(void)
at91_pio_use_periph_b(AT91SAM9260_PIOA_BASE, AT91C_PIO_PA28, 0);
/* ECOL */
at91_pio_use_periph_b(AT91SAM9260_PIOA_BASE, AT91C_PIO_PA29, 0);
+}
+static void
+bi_mmc(void)
+{
/*
* MMC, wired to socket B.
@@ -114,11 +153,11 @@ board_init(void)
* don't support the dataflash. But if you did, you'd have to
* use CS0 and CS1.
*/
+}
- /*
- * SPI1 is wired to a audio CODEC that we don't support, so
- * give it a pass.
- */
+static void
+bi_iic(void)
+{
/*
* TWI. Only one child on the iic bus, which we take care of
@@ -128,6 +167,11 @@ board_init(void)
at91_pio_use_periph_a(AT91SAM9260_PIOA_BASE, AT91C_PIO_PA23, 1);
/* TWCK */
at91_pio_use_periph_a(AT91SAM9260_PIOA_BASE, AT91C_PIO_PA24, 1);
+}
+
+static void
+bi_usart0(void)
+{
/*
* USART0
@@ -148,7 +192,11 @@ board_init(void)
at91_pio_use_periph_a(AT91SAM9260_PIOB_BASE, AT91C_PIO_PB26, 1);
/* CTS0 */
at91_pio_use_periph_a(AT91SAM9260_PIOB_BASE, AT91C_PIO_PB27, 0);
+}
+static void
+bi_usart1(void)
+{
/*
* USART1
*/
@@ -160,9 +208,54 @@ board_init(void)
at91_pio_use_periph_a(AT91SAM9260_PIOB_BASE, AT91C_PIO_PB6, 1);
/* RXD1 */
at91_pio_use_periph_a(AT91SAM9260_PIOB_BASE, AT91C_PIO_PB7, 0);
+}
+
+static void
+bi_nand(void)
+{
+ /* Samsung 256MB SLC Flash */
+
+ /* Setup Static Memory Controller */
+ at91_smc_setup(0, 3, &nand_smc);
+ at91_enable_nand(&nand_param);
+
+ /*
+ * This assumes
+ * - RNB is on pin PC13
+ * - CE is on pin PC14
+ *
+ * Nothing actually uses RNB right now.
+ *
+ * For CE, this currently asserts it during board setup and leaves it
+ * that way forever.
+ *
+ * All this can go away when the gpio pin-renumbering happens...
+ */
+ at91_pio_use_gpio(AT91SAM9260_PIOC_BASE, AT91C_PIO_PC13 | AT91C_PIO_PC14);
+ at91_pio_gpio_input(AT91SAM9260_PIOC_BASE, AT91C_PIO_PC13); /* RNB */
+ at91_pio_gpio_output(AT91SAM9260_PIOC_BASE, AT91C_PIO_PC14, 0); /* nCS */
+ at91_pio_gpio_clear(AT91SAM9260_PIOC_BASE, AT91C_PIO_PC14); /* Assert nCS */
+}
+
+BOARD_INIT long
+board_init(void)
+{
+ bi_dbgu();
+ bi_emac();
+ bi_mmc();
+
+ /*
+ * SPI1 is wired to a audio CODEC that we don't support, so
+ * give it a pass.
+ */
+ bi_iic();
+ bi_usart0();
+ bi_usart1();
/* USART2 - USART5 aren't wired up, except via PIO pins, ignore them. */
+ bi_nand();
+
return (at91_ramsize());
}
Modified: head/sys/arm/at91/uart_dev_at91usart.c
==============================================================================
--- head/sys/arm/at91/uart_dev_at91usart.c Sun Jan 19 17:53:51 2014 (r260885)
+++ head/sys/arm/at91/uart_dev_at91usart.c Sun Jan 19 17:59:34 2014 (r260886)
@@ -219,20 +219,6 @@ at91_usart_param(struct uart_bas *bas, i
return (0);
}
-static void
-at91_usart_grab(struct uart_bas *bas)
-{
-
- WR4(bas, USART_IDR, USART_CSR_RXRDY);
-}
-
-static void
-at91_usart_ungrab(struct uart_bas *bas)
-{
-
- WR4(bas, USART_IER, USART_CSR_RXRDY);
-}
-
static struct uart_ops at91_usart_ops = {
.probe = at91_usart_probe,
.init = at91_usart_init,
@@ -240,8 +226,6 @@ static struct uart_ops at91_usart_ops =
.putc = at91_usart_putc,
.rxready = at91_usart_rxready,
.getc = at91_usart_getc,
- .grab = at91_usart_grab,
- .ungrab = at91_usart_ungrab,
};
static int
@@ -331,6 +315,8 @@ static int at91_usart_bus_param(struct u
static int at91_usart_bus_receive(struct uart_softc *);
static int at91_usart_bus_setsig(struct uart_softc *, int);
static int at91_usart_bus_transmit(struct uart_softc *);
+static void at91_usart_bus_grab(struct uart_softc *);
+static void at91_usart_bus_ungrab(struct uart_softc *);
static kobj_method_t at91_usart_methods[] = {
KOBJMETHOD(uart_probe, at91_usart_bus_probe),
@@ -343,6 +329,8 @@ static kobj_method_t at91_usart_methods[
KOBJMETHOD(uart_receive, at91_usart_bus_receive),
KOBJMETHOD(uart_setsig, at91_usart_bus_setsig),
KOBJMETHOD(uart_transmit, at91_usart_bus_transmit),
+ KOBJMETHOD(uart_grab, at91_usart_bus_grab),
+ KOBJMETHOD(uart_ungrab, at91_usart_bus_ungrab),
KOBJMETHOD_END
};
@@ -815,6 +803,25 @@ at91_usart_bus_ioctl(struct uart_softc *
return (EINVAL);
}
+
+static void
+at91_usart_bus_grab(struct uart_softc *sc)
+{
+
+ uart_lock(sc->sc_hwmtx);
+ WR4(&sc->sc_bas, USART_IDR, USART_CSR_RXRDY);
+ uart_unlock(sc->sc_hwmtx);
+}
+
+static void
+at91_usart_bus_ungrab(struct uart_softc *sc)
+{
+
+ uart_lock(sc->sc_hwmtx);
+ WR4(&sc->sc_bas, USART_IER, USART_CSR_RXRDY);
+ uart_unlock(sc->sc_hwmtx);
+}
+
struct uart_class at91_usart_class = {
"at91_usart",
at91_usart_methods,
More information about the svn-src-all
mailing list